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Searched defs:outputMode (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_sysclk.h1767 cy_en_fll_pll_output_mode_t outputMode; /**< CLK_FLL_CONFIG3 register, BYPASS_SEL bits */ member
2056 cy_en_fll_pll_output_mode_t outputMode; /**< CLK_PLL_CONFIG register, BYPASS_SEL bits */ member
2072 cy_en_fll_pll_output_mode_t outputMode; /**< CONFIG register, BYPASS_SEL bits */ member
2140 cy_en_fll_pll_output_mode_t outputMode; /**< CONFIG register, BYPASS_SEL bits */ member
2194 cy_en_fll_pll_output_mode_t outputMode; /**< CLK_PLL_CONFIG register, BYPASS_SEL bits */ member
Dcy_lpcomp.h421 cy_en_lpcomp_out_t outputMode; /**< The low-power comparator outputMode: Direct output, member
Dcy_ctdac.h542 …cy_en_ctdac_output_mode_t outputMode; /**< Output mode: enabled (value or value + 1), hi… member
Dcy_pra_cfg.h223 …cy_en_fll_pll_output_mode_t outputMode; /**< CLK_FLL_CONFIG3 register, BYPASS_SEL bits… member
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_ctdac.c528 void Cy_CTDAC_SetOutputMode(CTDAC_Type *base, cy_en_ctdac_output_mode_t outputMode) in Cy_CTDAC_SetOutputMode()
Dcy_sysclk.c1466 …ysClk_FllConfigure(uint32_t inputFreq, uint32_t outputFreq, cy_en_fll_pll_output_mode_t outputMode) in Cy_SysClk_FllConfigure()
Dcy_sysclk_v2.c2885 …ysClk_FllConfigure(uint32_t inputFreq, uint32_t outputFreq, cy_en_fll_pll_output_mode_t outputMode) in Cy_SysClk_FllConfigure()