1 /* 2 * Copyright (c) 2016 Open-RnD Sp. z o.o. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_DRIVERS_GPIO_GPIO_STM32_H_ 8 #define ZEPHYR_DRIVERS_GPIO_GPIO_STM32_H_ 9 10 /** 11 * @file header for STM32 GPIO 12 */ 13 14 #include <zephyr/drivers/clock_control/stm32_clock_control.h> 15 #include <zephyr/drivers/gpio.h> 16 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) 17 #include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h> 18 #else 19 #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h> 20 #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */ 21 22 /* GPIO buses definitions */ 23 24 #define STM32_PORT_NOT_AVAILABLE 0xFFFFFFFF 25 26 #ifdef CONFIG_SOC_SERIES_STM32F0X 27 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 28 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 29 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 30 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 31 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 32 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 33 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 34 #elif CONFIG_SOC_SERIES_STM32F1X 35 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_APB2 36 #define STM32_PERIPH_GPIOA LL_APB2_GRP1_PERIPH_GPIOA 37 #define STM32_PERIPH_GPIOB LL_APB2_GRP1_PERIPH_GPIOB 38 #define STM32_PERIPH_GPIOC LL_APB2_GRP1_PERIPH_GPIOC 39 #define STM32_PERIPH_GPIOD LL_APB2_GRP1_PERIPH_GPIOD 40 #define STM32_PERIPH_GPIOE LL_APB2_GRP1_PERIPH_GPIOE 41 #define STM32_PERIPH_GPIOF LL_APB2_GRP1_PERIPH_GPIOF 42 #define STM32_PERIPH_GPIOG LL_APB2_GRP1_PERIPH_GPIOG 43 #elif CONFIG_SOC_SERIES_STM32F2X 44 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 45 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 46 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 47 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 48 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 49 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 50 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 51 #define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG 52 #define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH 53 #define STM32_PERIPH_GPIOI LL_AHB1_GRP1_PERIPH_GPIOI 54 #elif CONFIG_SOC_SERIES_STM32F3X 55 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 56 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 57 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 58 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 59 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 60 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 61 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 62 #define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG 63 #define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH 64 #elif CONFIG_SOC_SERIES_STM32F4X 65 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 66 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 67 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 68 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 69 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 70 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 71 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 72 #define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG 73 #define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH 74 #define STM32_PERIPH_GPIOI LL_AHB1_GRP1_PERIPH_GPIOI 75 #define STM32_PERIPH_GPIOJ LL_AHB1_GRP1_PERIPH_GPIOJ 76 #define STM32_PERIPH_GPIOK LL_AHB1_GRP1_PERIPH_GPIOK 77 #elif CONFIG_SOC_SERIES_STM32F7X 78 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 79 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 80 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 81 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 82 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 83 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 84 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 85 #define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG 86 #define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH 87 #define STM32_PERIPH_GPIOI LL_AHB1_GRP1_PERIPH_GPIOI 88 #define STM32_PERIPH_GPIOJ LL_AHB1_GRP1_PERIPH_GPIOJ 89 #define STM32_PERIPH_GPIOK LL_AHB1_GRP1_PERIPH_GPIOK 90 #elif CONFIG_SOC_SERIES_STM32H7X 91 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB4 92 #define STM32_PERIPH_GPIOA LL_AHB4_GRP1_PERIPH_GPIOA 93 #define STM32_PERIPH_GPIOB LL_AHB4_GRP1_PERIPH_GPIOB 94 #define STM32_PERIPH_GPIOC LL_AHB4_GRP1_PERIPH_GPIOC 95 #define STM32_PERIPH_GPIOD LL_AHB4_GRP1_PERIPH_GPIOD 96 #define STM32_PERIPH_GPIOE LL_AHB4_GRP1_PERIPH_GPIOE 97 #define STM32_PERIPH_GPIOF LL_AHB4_GRP1_PERIPH_GPIOF 98 #define STM32_PERIPH_GPIOG LL_AHB4_GRP1_PERIPH_GPIOG 99 #define STM32_PERIPH_GPIOH LL_AHB4_GRP1_PERIPH_GPIOH 100 #define STM32_PERIPH_GPIOI LL_AHB4_GRP1_PERIPH_GPIOI 101 #define STM32_PERIPH_GPIOJ LL_AHB4_GRP1_PERIPH_GPIOJ 102 #define STM32_PERIPH_GPIOK LL_AHB4_GRP1_PERIPH_GPIOK 103 #elif CONFIG_SOC_SERIES_STM32H7RSX 104 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB4 105 #define STM32_PERIPH_GPIOA LL_AHB4_GRP1_PERIPH_GPIOA 106 #define STM32_PERIPH_GPIOB LL_AHB4_GRP1_PERIPH_GPIOB 107 #define STM32_PERIPH_GPIOC LL_AHB4_GRP1_PERIPH_GPIOC 108 #define STM32_PERIPH_GPIOD LL_AHB4_GRP1_PERIPH_GPIOD 109 #define STM32_PERIPH_GPIOE LL_AHB4_GRP1_PERIPH_GPIOE 110 #define STM32_PERIPH_GPIOF LL_AHB4_GRP1_PERIPH_GPIOF 111 #define STM32_PERIPH_GPIOG LL_AHB4_GRP1_PERIPH_GPIOG 112 #define STM32_PERIPH_GPIOH LL_AHB4_GRP1_PERIPH_GPIOH 113 #define STM32_PERIPH_GPIOM LL_AHB4_GRP1_PERIPH_GPIOM 114 #define STM32_PERIPH_GPION LL_AHB4_GRP1_PERIPH_GPION 115 #define STM32_PERIPH_GPIOO LL_AHB4_GRP1_PERIPH_GPIOO 116 #define STM32_PERIPH_GPIOP LL_AHB4_GRP1_PERIPH_GPIOP 117 #elif CONFIG_SOC_SERIES_STM32G0X 118 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_IOP 119 #define STM32_PERIPH_GPIOA LL_IOP_GRP1_PERIPH_GPIOA 120 #define STM32_PERIPH_GPIOB LL_IOP_GRP1_PERIPH_GPIOB 121 #define STM32_PERIPH_GPIOC LL_IOP_GRP1_PERIPH_GPIOC 122 #define STM32_PERIPH_GPIOD LL_IOP_GRP1_PERIPH_GPIOD 123 #define STM32_PERIPH_GPIOE LL_IOP_GRP1_PERIPH_GPIOE 124 #define STM32_PERIPH_GPIOF LL_IOP_GRP1_PERIPH_GPIOF 125 #elif CONFIG_SOC_SERIES_STM32L0X 126 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_IOP 127 #define STM32_PERIPH_GPIOA LL_IOP_GRP1_PERIPH_GPIOA 128 #define STM32_PERIPH_GPIOB LL_IOP_GRP1_PERIPH_GPIOB 129 #define STM32_PERIPH_GPIOC LL_IOP_GRP1_PERIPH_GPIOC 130 #define STM32_PERIPH_GPIOD LL_IOP_GRP1_PERIPH_GPIOD 131 #define STM32_PERIPH_GPIOE LL_IOP_GRP1_PERIPH_GPIOE 132 #define STM32_PERIPH_GPIOH LL_IOP_GRP1_PERIPH_GPIOH 133 #elif CONFIG_SOC_SERIES_STM32L1X 134 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB1 135 #define STM32_PERIPH_GPIOA LL_AHB1_GRP1_PERIPH_GPIOA 136 #define STM32_PERIPH_GPIOB LL_AHB1_GRP1_PERIPH_GPIOB 137 #define STM32_PERIPH_GPIOC LL_AHB1_GRP1_PERIPH_GPIOC 138 #define STM32_PERIPH_GPIOD LL_AHB1_GRP1_PERIPH_GPIOD 139 #define STM32_PERIPH_GPIOE LL_AHB1_GRP1_PERIPH_GPIOE 140 #define STM32_PERIPH_GPIOF LL_AHB1_GRP1_PERIPH_GPIOF 141 #define STM32_PERIPH_GPIOG LL_AHB1_GRP1_PERIPH_GPIOG 142 #define STM32_PERIPH_GPIOH LL_AHB1_GRP1_PERIPH_GPIOH 143 #elif CONFIG_SOC_SERIES_STM32L4X 144 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2 145 #define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA 146 #define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB 147 #define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC 148 #define STM32_PERIPH_GPIOD LL_AHB2_GRP1_PERIPH_GPIOD 149 #define STM32_PERIPH_GPIOE LL_AHB2_GRP1_PERIPH_GPIOE 150 #define STM32_PERIPH_GPIOF LL_AHB2_GRP1_PERIPH_GPIOF 151 #define STM32_PERIPH_GPIOG LL_AHB2_GRP1_PERIPH_GPIOG 152 #define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH 153 #define STM32_PERIPH_GPIOI LL_AHB2_GRP1_PERIPH_GPIOI 154 #elif CONFIG_SOC_SERIES_STM32L5X 155 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2 156 #define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA 157 #define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB 158 #define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC 159 #define STM32_PERIPH_GPIOD LL_AHB2_GRP1_PERIPH_GPIOD 160 #define STM32_PERIPH_GPIOE LL_AHB2_GRP1_PERIPH_GPIOE 161 #define STM32_PERIPH_GPIOF LL_AHB2_GRP1_PERIPH_GPIOF 162 #define STM32_PERIPH_GPIOG LL_AHB2_GRP1_PERIPH_GPIOG 163 #define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH 164 #elif CONFIG_SOC_SERIES_STM32MP1X 165 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB4 166 #define STM32_PERIPH_GPIOA LL_AHB4_GRP1_PERIPH_GPIOA 167 #define STM32_PERIPH_GPIOB LL_AHB4_GRP1_PERIPH_GPIOB 168 #define STM32_PERIPH_GPIOC LL_AHB4_GRP1_PERIPH_GPIOC 169 #define STM32_PERIPH_GPIOD LL_AHB4_GRP1_PERIPH_GPIOD 170 #define STM32_PERIPH_GPIOE LL_AHB4_GRP1_PERIPH_GPIOE 171 #define STM32_PERIPH_GPIOF LL_AHB4_GRP1_PERIPH_GPIOF 172 #define STM32_PERIPH_GPIOG LL_AHB4_GRP1_PERIPH_GPIOG 173 #define STM32_PERIPH_GPIOH LL_AHB4_GRP1_PERIPH_GPIOH 174 #define STM32_PERIPH_GPIOI LL_AHB4_GRP1_PERIPH_GPIOI 175 #define STM32_PERIPH_GPIOJ LL_AHB4_GRP1_PERIPH_GPIOJ 176 #define STM32_PERIPH_GPIOK LL_AHB4_GRP1_PERIPH_GPIOK 177 #elif CONFIG_SOC_SERIES_STM32WBX 178 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2 179 #define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA 180 #define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB 181 #define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC 182 #define STM32_PERIPH_GPIOD LL_AHB2_GRP1_PERIPH_GPIOD 183 #define STM32_PERIPH_GPIOE LL_AHB2_GRP1_PERIPH_GPIOE 184 #define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH 185 #elif CONFIG_SOC_SERIES_STM32G4X 186 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2 187 #define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA 188 #define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB 189 #define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC 190 #define STM32_PERIPH_GPIOD LL_AHB2_GRP1_PERIPH_GPIOD 191 #define STM32_PERIPH_GPIOE LL_AHB2_GRP1_PERIPH_GPIOE 192 #define STM32_PERIPH_GPIOF LL_AHB2_GRP1_PERIPH_GPIOF 193 #define STM32_PERIPH_GPIOG LL_AHB2_GRP1_PERIPH_GPIOG 194 #elif CONFIG_SOC_SERIES_STM32WLX 195 #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2 196 #define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA 197 #define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB 198 #define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC 199 #define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH 200 #endif /* CONFIG_SOC_SERIES_* */ 201 202 #ifdef CONFIG_SOC_SERIES_STM32F1X 203 #define STM32_PINCFG_MODE_OUTPUT (STM32_MODE_OUTPUT \ 204 | STM32_CNF_GP_OUTPUT \ 205 | STM32_CNF_PUSH_PULL) 206 #define STM32_PINCFG_MODE_INPUT STM32_MODE_INPUT 207 #define STM32_PINCFG_MODE_ANALOG (STM32_MODE_INPUT \ 208 | STM32_CNF_IN_ANALOG) 209 #define STM32_PINCFG_PUSH_PULL STM32_CNF_PUSH_PULL 210 #define STM32_PINCFG_OPEN_DRAIN STM32_CNF_OPEN_DRAIN 211 #define STM32_PINCFG_PULL_UP (STM32_CNF_IN_PUPD | STM32_PUPD_PULL_UP) 212 #define STM32_PINCFG_PULL_DOWN (STM32_CNF_IN_PUPD | \ 213 STM32_PUPD_PULL_DOWN) 214 #define STM32_PINCFG_FLOATING (STM32_CNF_IN_FLOAT | \ 215 STM32_PUPD_NO_PULL) 216 #else 217 #define STM32_PINCFG_MODE_OUTPUT STM32_MODER_OUTPUT_MODE 218 #define STM32_PINCFG_MODE_INPUT STM32_MODER_INPUT_MODE 219 #define STM32_PINCFG_MODE_ANALOG STM32_MODER_ANALOG_MODE 220 #define STM32_PINCFG_PUSH_PULL STM32_OTYPER_PUSH_PULL 221 #define STM32_PINCFG_OPEN_DRAIN STM32_OTYPER_OPEN_DRAIN 222 #define STM32_PINCFG_PULL_UP STM32_PUPDR_PULL_UP 223 #define STM32_PINCFG_PULL_DOWN STM32_PUPDR_PULL_DOWN 224 #define STM32_PINCFG_FLOATING STM32_PUPDR_NO_PULL 225 #endif /* CONFIG_SOC_SERIES_STM32F1X */ 226 227 #if defined(CONFIG_GPIO_GET_CONFIG) && !defined(CONFIG_SOC_SERIES_STM32F1X) 228 /** 229 * @brief structure of a GPIO pin (stm32 LL values) use to get the configuration 230 */ 231 struct gpio_stm32_pin { 232 unsigned int type; /* LL_GPIO_OUTPUT_PUSHPULL or LL_GPIO_OUTPUT_OPENDRAIN */ 233 unsigned int pupd; /* LL_GPIO_PULL_NO or LL_GPIO_PULL_UP or LL_GPIO_PULL_DOWN */ 234 unsigned int mode; /* LL_GPIO_MODE_INPUT or LL_GPIO_MODE_OUTPUT or other */ 235 unsigned int out_state; /* 1 (high level) or 0 (low level) */ 236 }; 237 #endif /* CONFIG_GPIO_GET_CONFIG */ 238 239 /** 240 * @brief configuration of GPIO device 241 */ 242 struct gpio_stm32_config { 243 /* gpio_driver_config needs to be first */ 244 struct gpio_driver_config common; 245 /* port base address */ 246 uint32_t *base; 247 /* IO port */ 248 int port; 249 struct stm32_pclken pclken; 250 }; 251 252 /** 253 * @brief driver data 254 */ 255 struct gpio_stm32_data { 256 /* gpio_driver_data needs to be first */ 257 struct gpio_driver_data common; 258 /* device's owner of this data */ 259 const struct device *dev; 260 /* user ISR cb */ 261 sys_slist_t cb; 262 /* keep track of pins that are connected and need GPIO clock to be enabled */ 263 uint32_t pin_has_clock_enabled; 264 }; 265 266 /** 267 * @brief helper for configuration of GPIO pin 268 * 269 * @param dev GPIO port device pointer 270 * @param pin IO pin 271 * @param conf GPIO mode 272 * @param func Pin function 273 * 274 * @return 0 on success, negative errno code on failure 275 */ 276 int gpio_stm32_configure(const struct device *dev, gpio_pin_t pin, uint32_t conf, uint32_t func); 277 278 #endif /* ZEPHYR_DRIVERS_GPIO_GPIO_STM32_H_ */ 279
