| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | system_MIMX8MQ5_cm4.c | 83 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTPUT_DIV_… in GetFracPllFreq() local
134 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_DIV_VAL_… in GetSSCGPllFreq() local
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | system_MIMX8MQ6_cm4.c | 83 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTPUT_DIV_… in GetFracPllFreq() local
134 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_DIV_VAL_… in GetSSCGPllFreq() local
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | system_MIMX8MQ7_cm4.c | 83 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTPUT_DIV_… in GetFracPllFreq() local
134 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_DIV_VAL_… in GetSSCGPllFreq() local
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | system_MIMX8MD6_cm4.c | 83 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTPUT_DIV_… in GetFracPllFreq() local
134 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_DIV_VAL_… in GetSSCGPllFreq() local
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | system_MIMX8MD7_cm4.c | 83 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTPUT_DIV_… in GetFracPllFreq() local
134 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_VAL(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_DIV_VAL_… in GetSSCGPllFreq() local
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/ |
| D | fsl_clock.c | 838 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTP… in CLOCK_GetFracPllFreq() local
932 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_D… in CLOCK_GetSSCGPllFreq() local
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| D | fsl_clock.h | 989 …uint8_t outDiv; /*!< output clock divide, output clock range is 30MHZ to 2000MHZ, must be a … member
1011 uint8_t outDiv; /*!< A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/ |
| D | fsl_clock.c | 838 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTP… in CLOCK_GetFracPllFreq() local
932 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_D… in CLOCK_GetSSCGPllFreq() local
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| D | fsl_clock.h | 989 …uint8_t outDiv; /*!< output clock divide, output clock range is 30MHZ to 2000MHZ, must be a … member
1011 uint8_t outDiv; /*!< A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/ |
| D | fsl_clock.c | 838 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTP… in CLOCK_GetFracPllFreq() local
932 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_D… in CLOCK_GetSSCGPllFreq() local
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| D | fsl_clock.h | 989 …uint8_t outDiv; /*!< output clock divide, output clock range is 30MHZ to 2000MHZ, must be a … member
1011 uint8_t outDiv; /*!< A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/drivers/ |
| D | fsl_clock.c | 838 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTP… in CLOCK_GetFracPllFreq() local
932 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_D… in CLOCK_GetSSCGPllFreq() local
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| D | fsl_clock.h | 989 …uint8_t outDiv; /*!< output clock divide, output clock range is 30MHZ to 2000MHZ, must be a … member
1011 uint8_t outDiv; /*!< A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/drivers/ |
| D | fsl_clock.c | 838 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(fracCfg0, CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_OUTP… in CLOCK_GetFracPllFreq() local
932 …uint8_t outDiv = (uint8_t)CCM_BIT_FIELD_EXTRACTION(sscgCfg2, CCM_ANALOG_SYS_PLL1_CFG2_PLL_OUTPUT_D… in CLOCK_GetSSCGPllFreq() local
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| D | fsl_clock.h | 989 …uint8_t outDiv; /*!< output clock divide, output clock range is 30MHZ to 2000MHZ, must be a … member
1011 uint8_t outDiv; /*!< A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ */ member
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