1 /*
2  * Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 
8 /*******************************************************************************
9  * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
10  * plug-in component to the Secure Monitor, registered as a runtime service. The
11  * SPD is expected to be a functional extension of the Secure Payload (SP) that
12  * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
13  * the Trusted OS/Applications range to the dispatcher. The SPD will either
14  * handle the request locally or delegate it to the Secure Payload. It is also
15  * responsible for initialising and maintaining communication with the SP.
16  ******************************************************************************/
17 #include <assert.h>
18 #include <errno.h>
19 #include <inttypes.h>
20 #include <stddef.h>
21 
22 #include <arch_helpers.h>
23 #include <bl31/bl31.h>
24 #include <common/bl_common.h>
25 #include <common/debug.h>
26 #include <common/runtime_svc.h>
27 #include <lib/coreboot.h>
28 #include <lib/el3_runtime/context_mgmt.h>
29 #include <lib/optee_utils.h>
30 #include <lib/xlat_tables/xlat_tables_v2.h>
31 #if OPTEE_ALLOW_SMC_LOAD
32 #include <libfdt.h>
33 #endif  /* OPTEE_ALLOW_SMC_LOAD */
34 #include <plat/common/platform.h>
35 #include <tools_share/uuid.h>
36 
37 #include "opteed_private.h"
38 #include "teesmc_opteed.h"
39 
40 /*******************************************************************************
41  * Address of the entrypoint vector table in OPTEE. It is
42  * initialised once on the primary core after a cold boot.
43  ******************************************************************************/
44 struct optee_vectors *optee_vector_table;
45 
46 /*******************************************************************************
47  * Array to keep track of per-cpu OPTEE state
48  ******************************************************************************/
49 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT];
50 uint32_t opteed_rw;
51 
52 #if OPTEE_ALLOW_SMC_LOAD
53 static bool opteed_allow_load;
54 /* OP-TEE image loading service UUID */
55 DEFINE_SVC_UUID2(optee_image_load_uuid,
56 	0xb1eafba3, 0x5d31, 0x4612, 0xb9, 0x06,
57 	0xc4, 0xc7, 0xa4, 0xbe, 0x3c, 0xc0);
58 
59 #define OPTEED_FDT_SIZE 256
60 static uint8_t fdt_buf[OPTEED_FDT_SIZE] __aligned(CACHE_WRITEBACK_GRANULE);
61 
62 #else
63 static int32_t opteed_init(void);
64 #endif
65 
dual32to64(uint32_t high,uint32_t low)66 uint64_t dual32to64(uint32_t high, uint32_t low)
67 {
68 	return ((uint64_t)high << 32) | low;
69 }
70 
71 /*******************************************************************************
72  * This function is the handler registered for S-EL1 interrupts by the
73  * OPTEED. It validates the interrupt and upon success arranges entry into
74  * the OPTEE at 'optee_fiq_entry()' for handling the interrupt.
75  ******************************************************************************/
opteed_sel1_interrupt_handler(uint32_t id,uint32_t flags,void * handle,void * cookie)76 static uint64_t opteed_sel1_interrupt_handler(uint32_t id,
77 					    uint32_t flags,
78 					    void *handle,
79 					    void *cookie)
80 {
81 	uint32_t linear_id;
82 	optee_context_t *optee_ctx;
83 
84 	/* Check the security state when the exception was generated */
85 	assert(get_interrupt_src_ss(flags) == NON_SECURE);
86 
87 	/* Sanity check the pointer to this cpu's context */
88 	assert(handle == cm_get_context(NON_SECURE));
89 
90 	/* Save the non-secure context before entering the OPTEE */
91 	cm_el1_sysregs_context_save(NON_SECURE);
92 
93 	/* Get a reference to this cpu's OPTEE context */
94 	linear_id = plat_my_core_pos();
95 	optee_ctx = &opteed_sp_context[linear_id];
96 	assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
97 
98 	cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry);
99 	cm_el1_sysregs_context_restore(SECURE);
100 	cm_set_next_eret_context(SECURE);
101 
102 	/*
103 	 * Tell the OPTEE that it has to handle an FIQ (synchronously).
104 	 * Also the instruction in normal world where the interrupt was
105 	 * generated is passed for debugging purposes. It is safe to
106 	 * retrieve this address from ELR_EL3 as the secure context will
107 	 * not take effect until el3_exit().
108 	 */
109 	SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3());
110 }
111 
112 /*******************************************************************************
113  * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type
114  * (aarch32/aarch64) if not already known and initialises the context for entry
115  * into OPTEE for its initialization.
116  ******************************************************************************/
opteed_setup(void)117 static int32_t opteed_setup(void)
118 {
119 #if OPTEE_ALLOW_SMC_LOAD
120 	opteed_allow_load = true;
121 	INFO("Delaying OP-TEE setup until we receive an SMC call to load it\n");
122 	return 0;
123 #else
124 	entry_point_info_t *optee_ep_info;
125 	uint32_t linear_id;
126 	uint64_t opteed_pageable_part;
127 	uint64_t opteed_mem_limit;
128 	uint64_t dt_addr;
129 
130 	linear_id = plat_my_core_pos();
131 
132 	/*
133 	 * Get information about the Secure Payload (BL32) image. Its
134 	 * absence is a critical failure.  TODO: Add support to
135 	 * conditionally include the SPD service
136 	 */
137 	optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
138 	if (!optee_ep_info) {
139 		WARN("No OPTEE provided by BL2 boot loader, Booting device"
140 			" without OPTEE initialization. SMC`s destined for OPTEE"
141 			" will return SMC_UNK\n");
142 		return 1;
143 	}
144 
145 	/*
146 	 * If there's no valid entry point for SP, we return a non-zero value
147 	 * signalling failure initializing the service. We bail out without
148 	 * registering any handlers
149 	 */
150 	if (!optee_ep_info->pc)
151 		return 1;
152 
153 	opteed_rw = optee_ep_info->args.arg0;
154 	opteed_pageable_part = optee_ep_info->args.arg1;
155 	opteed_mem_limit = optee_ep_info->args.arg2;
156 	dt_addr = optee_ep_info->args.arg3;
157 
158 	opteed_init_optee_ep_state(optee_ep_info,
159 				opteed_rw,
160 				optee_ep_info->pc,
161 				opteed_pageable_part,
162 				opteed_mem_limit,
163 				dt_addr,
164 				&opteed_sp_context[linear_id]);
165 
166 	/*
167 	 * All OPTEED initialization done. Now register our init function with
168 	 * BL31 for deferred invocation
169 	 */
170 	bl31_register_bl32_init(&opteed_init);
171 
172 	return 0;
173 #endif  /* OPTEE_ALLOW_SMC_LOAD */
174 }
175 
176 /*******************************************************************************
177  * This function passes control to the OPTEE image (BL32) for the first time
178  * on the primary cpu after a cold boot. It assumes that a valid secure
179  * context has already been created by opteed_setup() which can be directly
180  * used.  It also assumes that a valid non-secure context has been
181  * initialised by PSCI so it does not need to save and restore any
182  * non-secure state. This function performs a synchronous entry into
183  * OPTEE. OPTEE passes control back to this routine through a SMC. This returns
184  * a non-zero value on success and zero on failure.
185  ******************************************************************************/
186 static int32_t
opteed_init_with_entry_point(entry_point_info_t * optee_entry_point)187 opteed_init_with_entry_point(entry_point_info_t *optee_entry_point)
188 {
189 	uint32_t linear_id = plat_my_core_pos();
190 	optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
191 	uint64_t rc;
192 	assert(optee_entry_point);
193 
194 	cm_init_my_context(optee_entry_point);
195 
196 	/*
197 	 * Arrange for an entry into OPTEE. It will be returned via
198 	 * OPTEE_ENTRY_DONE case
199 	 */
200 	rc = opteed_synchronous_sp_entry(optee_ctx);
201 	assert(rc != 0);
202 
203 	return rc;
204 }
205 
206 #if !OPTEE_ALLOW_SMC_LOAD
opteed_init(void)207 static int32_t opteed_init(void)
208 {
209 	entry_point_info_t *optee_entry_point;
210 	/*
211 	 * Get information about the OP-TEE (BL32) image. Its
212 	 * absence is a critical failure.
213 	 */
214 	optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
215 	return opteed_init_with_entry_point(optee_entry_point);
216 }
217 #endif  /* !OPTEE_ALLOW_SMC_LOAD */
218 
219 #if OPTEE_ALLOW_SMC_LOAD
220 #if COREBOOT
221 /*
222  * Adds a firmware/coreboot node with the coreboot table information to a device
223  * tree. Returns zero on success or if there is no coreboot table information;
224  * failure code otherwise.
225  */
add_coreboot_node(void * fdt)226 static int add_coreboot_node(void *fdt)
227 {
228 	int ret;
229 	uint64_t coreboot_table_addr;
230 	uint32_t coreboot_table_size;
231 	struct {
232 		uint64_t addr;
233 		uint32_t size;
234 	} reg_node;
235 	coreboot_get_table_location(&coreboot_table_addr, &coreboot_table_size);
236 	if (!coreboot_table_addr || !coreboot_table_size) {
237 		WARN("Unable to get coreboot table location for device tree");
238 		return 0;
239 	}
240 	ret = fdt_begin_node(fdt, "firmware");
241 	if (ret)
242 		return ret;
243 
244 	ret = fdt_property(fdt, "ranges", NULL, 0);
245 	if (ret)
246 		return ret;
247 
248 	ret = fdt_begin_node(fdt, "coreboot");
249 	if (ret)
250 		return ret;
251 
252 	ret = fdt_property_string(fdt, "compatible", "coreboot");
253 	if (ret)
254 		return ret;
255 
256 	reg_node.addr = cpu_to_fdt64(coreboot_table_addr);
257 	reg_node.size = cpu_to_fdt32(coreboot_table_size);
258 	ret = fdt_property(fdt, "reg", &reg_node,
259 				sizeof(uint64_t) + sizeof(uint32_t));
260 	if (ret)
261 		return ret;
262 
263 	ret = fdt_end_node(fdt);
264 	if (ret)
265 		return ret;
266 
267 	return fdt_end_node(fdt);
268 }
269 #endif /* COREBOOT */
270 
271 /*
272  * Creates a device tree for passing into OP-TEE. Currently is populated with
273  * the coreboot table address.
274  * Returns 0 on success, error code otherwise.
275  */
create_opteed_dt(void)276 static int create_opteed_dt(void)
277 {
278 	int ret;
279 
280 	ret = fdt_create(fdt_buf, OPTEED_FDT_SIZE);
281 	if (ret)
282 		return ret;
283 
284 	ret = fdt_finish_reservemap(fdt_buf);
285 	if (ret)
286 		return ret;
287 
288 	ret = fdt_begin_node(fdt_buf, "");
289 	if (ret)
290 		return ret;
291 
292 #if COREBOOT
293 	ret = add_coreboot_node(fdt_buf);
294 	if (ret)
295 		return ret;
296 #endif /* COREBOOT */
297 
298 	ret = fdt_end_node(fdt_buf);
299 	if (ret)
300 		return ret;
301 
302 	return fdt_finish(fdt_buf);
303 }
304 
305 /*******************************************************************************
306  * This function is responsible for handling the SMC that loads the OP-TEE
307  * binary image via a non-secure SMC call. It takes the size and physical
308  * address of the payload as parameters.
309  ******************************************************************************/
opteed_handle_smc_load(uint64_t data_size,uint32_t data_pa)310 static int32_t opteed_handle_smc_load(uint64_t data_size, uint32_t data_pa)
311 {
312 	uintptr_t data_va = data_pa;
313 	uint64_t mapped_data_pa;
314 	uintptr_t mapped_data_va;
315 	uint64_t data_map_size;
316 	int32_t rc;
317 	optee_header_t *image_header;
318 	uint8_t *image_ptr;
319 	uint64_t target_pa;
320 	uint64_t target_end_pa;
321 	uint64_t image_pa;
322 	uintptr_t image_va;
323 	optee_image_t *curr_image;
324 	uintptr_t target_va;
325 	uint64_t target_size;
326 	entry_point_info_t optee_ep_info;
327 	uint32_t linear_id = plat_my_core_pos();
328 	uint64_t dt_addr = 0;
329 
330 	mapped_data_pa = page_align(data_pa, DOWN);
331 	mapped_data_va = mapped_data_pa;
332 	data_map_size = page_align(data_size + (mapped_data_pa - data_pa), UP);
333 
334 	/*
335 	 * We do not validate the passed in address because we are trusting the
336 	 * non-secure world at this point still.
337 	 */
338 	rc = mmap_add_dynamic_region(mapped_data_pa, mapped_data_va,
339 				     data_map_size, MT_MEMORY | MT_RO | MT_NS);
340 	if (rc != 0) {
341 		return rc;
342 	}
343 
344 	image_header = (optee_header_t *)data_va;
345 	if (image_header->magic != TEE_MAGIC_NUM_OPTEE ||
346 	    image_header->version != 2 || image_header->nb_images != 1) {
347 		mmap_remove_dynamic_region(mapped_data_va, data_map_size);
348 		return -EINVAL;
349 	}
350 
351 	image_ptr = (uint8_t *)data_va + sizeof(optee_header_t) +
352 			sizeof(optee_image_t);
353 	if (image_header->arch == 1) {
354 		opteed_rw = OPTEE_AARCH64;
355 	} else {
356 		opteed_rw = OPTEE_AARCH32;
357 	}
358 
359 	curr_image = &image_header->optee_image_list[0];
360 	image_pa = dual32to64(curr_image->load_addr_hi,
361 			      curr_image->load_addr_lo);
362 	image_va = image_pa;
363 	target_end_pa = image_pa + curr_image->size;
364 
365 	/* Now also map the memory we want to copy it to. */
366 	target_pa = page_align(image_pa, DOWN);
367 	target_va = target_pa;
368 	target_size = page_align(target_end_pa, UP) - target_pa;
369 
370 	rc = mmap_add_dynamic_region(target_pa, target_va, target_size,
371 				     MT_MEMORY | MT_RW | MT_SECURE);
372 	if (rc != 0) {
373 		mmap_remove_dynamic_region(mapped_data_va, data_map_size);
374 		return rc;
375 	}
376 
377 	INFO("Loaded OP-TEE via SMC: size %d addr 0x%" PRIx64 "\n",
378 	     curr_image->size, image_va);
379 
380 	memcpy((void *)image_va, image_ptr, curr_image->size);
381 	flush_dcache_range(target_pa, target_size);
382 
383 	mmap_remove_dynamic_region(mapped_data_va, data_map_size);
384 	mmap_remove_dynamic_region(target_va, target_size);
385 
386 	/* Save the non-secure state */
387 	cm_el1_sysregs_context_save(NON_SECURE);
388 
389 	rc = create_opteed_dt();
390 	if (rc) {
391 		ERROR("Failed device tree creation %d\n", rc);
392 		return rc;
393 	}
394 	dt_addr = (uint64_t)fdt_buf;
395 	flush_dcache_range(dt_addr, OPTEED_FDT_SIZE);
396 
397 	opteed_init_optee_ep_state(&optee_ep_info,
398 				   opteed_rw,
399 				   image_pa,
400 				   0,
401 				   0,
402 				   dt_addr,
403 				   &opteed_sp_context[linear_id]);
404 	if (opteed_init_with_entry_point(&optee_ep_info) == 0) {
405 		rc = -EFAULT;
406 	}
407 
408 	/* Restore non-secure state */
409 	cm_el1_sysregs_context_restore(NON_SECURE);
410 	cm_set_next_eret_context(NON_SECURE);
411 
412 	return rc;
413 }
414 #endif  /* OPTEE_ALLOW_SMC_LOAD */
415 
416 /*******************************************************************************
417  * This function is responsible for handling all SMCs in the Trusted OS/App
418  * range from the non-secure state as defined in the SMC Calling Convention
419  * Document. It is also responsible for communicating with the Secure
420  * payload to delegate work and return results back to the non-secure
421  * state. Lastly it will also return any information that OPTEE needs to do
422  * the work assigned to it.
423  ******************************************************************************/
opteed_smc_handler(uint32_t smc_fid,u_register_t x1,u_register_t x2,u_register_t x3,u_register_t x4,void * cookie,void * handle,u_register_t flags)424 static uintptr_t opteed_smc_handler(uint32_t smc_fid,
425 			 u_register_t x1,
426 			 u_register_t x2,
427 			 u_register_t x3,
428 			 u_register_t x4,
429 			 void *cookie,
430 			 void *handle,
431 			 u_register_t flags)
432 {
433 	cpu_context_t *ns_cpu_context;
434 	uint32_t linear_id = plat_my_core_pos();
435 	optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
436 	uint64_t rc;
437 
438 	/*
439 	 * Determine which security state this SMC originated from
440 	 */
441 
442 	if (is_caller_non_secure(flags)) {
443 #if OPTEE_ALLOW_SMC_LOAD
444 		if (opteed_allow_load && smc_fid == NSSMC_OPTEED_CALL_UID) {
445 			/* Provide the UUID of the image loading service. */
446 			SMC_UUID_RET(handle, optee_image_load_uuid);
447 		}
448 		if (smc_fid == NSSMC_OPTEED_CALL_LOAD_IMAGE) {
449 			/*
450 			 * TODO: Consider wiping the code for SMC loading from
451 			 * memory after it has been invoked similar to what is
452 			 * done under RECLAIM_INIT, but extended to happen
453 			 * later.
454 			 */
455 			if (!opteed_allow_load) {
456 				SMC_RET1(handle, -EPERM);
457 			}
458 
459 			opteed_allow_load = false;
460 			uint64_t data_size = dual32to64(x1, x2);
461 			uint64_t data_pa = dual32to64(x3, x4);
462 			if (!data_size || !data_pa) {
463 				/*
464 				 * This is invoked when the OP-TEE image didn't
465 				 * load correctly in the kernel but we want to
466 				 * block off loading of it later for security
467 				 * reasons.
468 				 */
469 				SMC_RET1(handle, -EINVAL);
470 			}
471 			SMC_RET1(handle, opteed_handle_smc_load(
472 					data_size, data_pa));
473 		}
474 #endif  /* OPTEE_ALLOW_SMC_LOAD */
475 		/*
476 		 * This is a fresh request from the non-secure client.
477 		 * The parameters are in x1 and x2. Figure out which
478 		 * registers need to be preserved, save the non-secure
479 		 * state and send the request to the secure payload.
480 		 */
481 		assert(handle == cm_get_context(NON_SECURE));
482 
483 		cm_el1_sysregs_context_save(NON_SECURE);
484 
485 		/*
486 		 * We are done stashing the non-secure context. Ask the
487 		 * OP-TEE to do the work now. If we are loading vi an SMC,
488 		 * then we also need to init this CPU context if not done
489 		 * already.
490 		 */
491 		if (optee_vector_table == NULL) {
492 			SMC_RET1(handle, -EINVAL);
493 		}
494 
495 		if (get_optee_pstate(optee_ctx->state) ==
496 		    OPTEE_PSTATE_UNKNOWN) {
497 			opteed_cpu_on_finish_handler(0);
498 		}
499 
500 		/*
501 		 * Verify if there is a valid context to use, copy the
502 		 * operation type and parameters to the secure context
503 		 * and jump to the fast smc entry point in the secure
504 		 * payload. Entry into S-EL1 will take place upon exit
505 		 * from this function.
506 		 */
507 		assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
508 
509 		/* Set appropriate entry for SMC.
510 		 * We expect OPTEE to manage the PSTATE.I and PSTATE.F
511 		 * flags as appropriate.
512 		 */
513 		if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
514 			cm_set_elr_el3(SECURE, (uint64_t)
515 					&optee_vector_table->fast_smc_entry);
516 		} else {
517 			cm_set_elr_el3(SECURE, (uint64_t)
518 					&optee_vector_table->yield_smc_entry);
519 		}
520 
521 		cm_el1_sysregs_context_restore(SECURE);
522 		cm_set_next_eret_context(SECURE);
523 
524 		write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
525 			      CTX_GPREG_X4,
526 			      read_ctx_reg(get_gpregs_ctx(handle),
527 					   CTX_GPREG_X4));
528 		write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
529 			      CTX_GPREG_X5,
530 			      read_ctx_reg(get_gpregs_ctx(handle),
531 					   CTX_GPREG_X5));
532 		write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
533 			      CTX_GPREG_X6,
534 			      read_ctx_reg(get_gpregs_ctx(handle),
535 					   CTX_GPREG_X6));
536 		/* Propagate hypervisor client ID */
537 		write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
538 			      CTX_GPREG_X7,
539 			      read_ctx_reg(get_gpregs_ctx(handle),
540 					   CTX_GPREG_X7));
541 
542 		SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3);
543 	}
544 
545 	/*
546 	 * Returning from OPTEE
547 	 */
548 
549 	switch (smc_fid) {
550 	/*
551 	 * OPTEE has finished initialising itself after a cold boot
552 	 */
553 	case TEESMC_OPTEED_RETURN_ENTRY_DONE:
554 		/*
555 		 * Stash the OPTEE entry points information. This is done
556 		 * only once on the primary cpu
557 		 */
558 		assert(optee_vector_table == NULL);
559 		optee_vector_table = (optee_vectors_t *) x1;
560 
561 		if (optee_vector_table) {
562 			set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON);
563 
564 			/*
565 			 * OPTEE has been successfully initialized.
566 			 * Register power management hooks with PSCI
567 			 */
568 			psci_register_spd_pm_hook(&opteed_pm);
569 
570 			/*
571 			 * Register an interrupt handler for S-EL1 interrupts
572 			 * when generated during code executing in the
573 			 * non-secure state.
574 			 */
575 			flags = 0;
576 			set_interrupt_rm_flag(flags, NON_SECURE);
577 			rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
578 						opteed_sel1_interrupt_handler,
579 						flags);
580 			if (rc)
581 				panic();
582 		}
583 
584 		/*
585 		 * OPTEE reports completion. The OPTEED must have initiated
586 		 * the original request through a synchronous entry into
587 		 * OPTEE. Jump back to the original C runtime context.
588 		 */
589 		opteed_synchronous_sp_exit(optee_ctx, x1);
590 		break;
591 
592 
593 	/*
594 	 * These function IDs is used only by OP-TEE to indicate it has
595 	 * finished:
596 	 * 1. turning itself on in response to an earlier psci
597 	 *    cpu_on request
598 	 * 2. resuming itself after an earlier psci cpu_suspend
599 	 *    request.
600 	 */
601 	case TEESMC_OPTEED_RETURN_ON_DONE:
602 	case TEESMC_OPTEED_RETURN_RESUME_DONE:
603 
604 
605 	/*
606 	 * These function IDs is used only by the SP to indicate it has
607 	 * finished:
608 	 * 1. suspending itself after an earlier psci cpu_suspend
609 	 *    request.
610 	 * 2. turning itself off in response to an earlier psci
611 	 *    cpu_off request.
612 	 */
613 	case TEESMC_OPTEED_RETURN_OFF_DONE:
614 	case TEESMC_OPTEED_RETURN_SUSPEND_DONE:
615 	case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE:
616 	case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE:
617 
618 		/*
619 		 * OPTEE reports completion. The OPTEED must have initiated the
620 		 * original request through a synchronous entry into OPTEE.
621 		 * Jump back to the original C runtime context, and pass x1 as
622 		 * return value to the caller
623 		 */
624 		opteed_synchronous_sp_exit(optee_ctx, x1);
625 		break;
626 
627 	/*
628 	 * OPTEE is returning from a call or being preempted from a call, in
629 	 * either case execution should resume in the normal world.
630 	 */
631 	case TEESMC_OPTEED_RETURN_CALL_DONE:
632 		/*
633 		 * This is the result from the secure client of an
634 		 * earlier request. The results are in x0-x3. Copy it
635 		 * into the non-secure context, save the secure state
636 		 * and return to the non-secure state.
637 		 */
638 		assert(handle == cm_get_context(SECURE));
639 		cm_el1_sysregs_context_save(SECURE);
640 
641 		/* Get a reference to the non-secure context */
642 		ns_cpu_context = cm_get_context(NON_SECURE);
643 		assert(ns_cpu_context);
644 
645 		/* Restore non-secure state */
646 		cm_el1_sysregs_context_restore(NON_SECURE);
647 		cm_set_next_eret_context(NON_SECURE);
648 
649 		SMC_RET4(ns_cpu_context, x1, x2, x3, x4);
650 
651 	/*
652 	 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution
653 	 * should resume in the normal world.
654 	 */
655 	case TEESMC_OPTEED_RETURN_FIQ_DONE:
656 		/* Get a reference to the non-secure context */
657 		ns_cpu_context = cm_get_context(NON_SECURE);
658 		assert(ns_cpu_context);
659 
660 		/*
661 		 * Restore non-secure state. There is no need to save the
662 		 * secure system register context since OPTEE was supposed
663 		 * to preserve it during S-EL1 interrupt handling.
664 		 */
665 		cm_el1_sysregs_context_restore(NON_SECURE);
666 		cm_set_next_eret_context(NON_SECURE);
667 
668 		SMC_RET0((uint64_t) ns_cpu_context);
669 
670 	default:
671 		panic();
672 	}
673 }
674 
675 /* Define an OPTEED runtime service descriptor for fast SMC calls */
676 DECLARE_RT_SVC(
677 	opteed_fast,
678 
679 	OEN_TOS_START,
680 	OEN_TOS_END,
681 	SMC_TYPE_FAST,
682 	opteed_setup,
683 	opteed_smc_handler
684 );
685 
686 /* Define an OPTEED runtime service descriptor for yielding SMC calls */
687 DECLARE_RT_SVC(
688 	opteed_std,
689 
690 	OEN_TOS_START,
691 	OEN_TOS_END,
692 	SMC_TYPE_YIELD,
693 	NULL,
694 	opteed_smc_handler
695 );
696