1 /*
2  * Copyright (c) 2012 - 2025, Nordic Semiconductor ASA
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice, this
11  *    list of conditions and the following disclaimer.
12  *
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * 3. Neither the name of the copyright holder nor the names of its
18  *    contributors may be used to endorse or promote products derived from this
19  *    software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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32  */
33 
34 #ifndef NRFY_TEMP_H__
35 #define NRFY_TEMP_H__
36 
37 #include <nrfx.h>
38 #include <hal/nrf_temp.h>
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
44 /**
45 * @defgroup nrfy_temp TEMP HALY
46 * @{
47 * @ingroup nrf_temp
48 * @brief   Hardware access layer with cache and barrier support
49            for managing the Temperature sensor (TEMP).
50 */
51 
52 #if NRF_TEMP_HAS_CALIBRATION || defined(__NRFX_DOXYGEN__)
53 /** @refhal{NRF_TEMP_HAS_CALIBRATION} */
54 #define NRFY_TEMP_HAS_CALIBRATION 1
55 #else
56 #define NRFY_TEMP_HAS_CALIBRATION 0
57 #endif
58 
59 /**
60  * @brief Function for initializing the specified TEMP interrupts.
61  *
62  * @param[in] p_reg        Pointer to the structure of registers of the peripheral.
63  * @param[in] mask         Mask of interrupts to be initialized.
64  * @param[in] irq_priority Interrupt priority.
65  * @param[in] enable       True if the interrupts are to be enabled, false otherwise.
66  */
nrfy_temp_int_init(NRF_TEMP_Type * p_reg,uint32_t mask,uint8_t irq_priority,bool enable)67 NRFY_STATIC_INLINE void nrfy_temp_int_init(NRF_TEMP_Type * p_reg,
68                                            uint32_t        mask,
69                                            uint8_t         irq_priority,
70                                            bool            enable)
71 {
72     (void)mask;
73     nrf_temp_event_clear(p_reg, NRF_TEMP_EVENT_DATARDY);
74     nrf_barrier_w();
75 
76     NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_reg), irq_priority);
77     NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_reg));
78     if (enable)
79     {
80         nrf_temp_int_enable(p_reg, NRF_TEMP_INT_DATARDY_MASK);
81     }
82     nrf_barrier_w();
83 }
84 
85 /**
86  * @brief Function for uninitializing the TEMP interrupts.
87  *
88  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
89  */
nrfy_temp_int_uninit(NRF_TEMP_Type * p_reg)90 NRFY_STATIC_INLINE void nrfy_temp_int_uninit(NRF_TEMP_Type * p_reg)
91 {
92     NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_reg));
93     nrf_barrier_w();
94 }
95 
96 /** @refhal{nrf_temp_int_enable} */
nrfy_temp_int_enable(NRF_TEMP_Type * p_reg,uint32_t mask)97 NRFY_STATIC_INLINE void nrfy_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask)
98 {
99     nrf_temp_int_enable(p_reg, mask);
100     nrf_barrier_w();
101 }
102 
103 /** @refhal{nrf_temp_int_disable} */
nrfy_temp_int_disable(NRF_TEMP_Type * p_reg,uint32_t mask)104 NRFY_STATIC_INLINE void nrfy_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask)
105 {
106     nrf_temp_int_disable(p_reg, mask);
107     nrf_barrier_w();
108 }
109 
110 /** @refhal{nrf_temp_int_enable_check} */
nrfy_temp_int_enable_check(NRF_TEMP_Type const * p_reg,uint32_t mask)111 NRFY_STATIC_INLINE uint32_t nrfy_temp_int_enable_check(NRF_TEMP_Type const * p_reg, uint32_t mask)
112 {
113     nrf_barrier_rw();
114     uint32_t check = nrf_temp_int_enable_check(p_reg, mask);
115     nrf_barrier_r();
116     return check;
117 }
118 
119 /** @refhal{nrf_temp_task_address_get} */
nrfy_temp_task_address_get(NRF_TEMP_Type const * p_reg,nrf_temp_task_t task)120 NRFY_STATIC_INLINE uint32_t nrfy_temp_task_address_get(NRF_TEMP_Type const * p_reg,
121                                                        nrf_temp_task_t       task)
122 {
123     return nrf_temp_task_address_get(p_reg, task);
124 }
125 
126 /** @refhal{nrf_temp_task_trigger} */
nrfy_temp_task_trigger(NRF_TEMP_Type * p_reg,nrf_temp_task_t task)127 NRFY_STATIC_INLINE void nrfy_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task)
128 {
129     nrf_temp_task_trigger(p_reg, task);
130     nrf_barrier_w();
131 }
132 
133 /** @refhal{nrf_temp_event_address_get} */
nrfy_temp_event_address_get(NRF_TEMP_Type const * p_reg,nrf_temp_event_t event)134 NRFY_STATIC_INLINE uint32_t nrfy_temp_event_address_get(NRF_TEMP_Type const * p_reg,
135                                                         nrf_temp_event_t      event)
136 {
137     return nrf_temp_event_address_get(p_reg, event);
138 }
139 
140 /** @refhal{nrf_temp_event_clear} */
nrfy_temp_event_clear(NRF_TEMP_Type * p_reg,nrf_temp_event_t event)141 NRFY_STATIC_INLINE void nrfy_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event)
142 {
143     nrf_temp_event_clear(p_reg, event);
144     nrf_barrier_w();
145 }
146 
147 /** @refhal{nrf_temp_event_check} */
nrfy_temp_event_check(NRF_TEMP_Type const * p_reg,nrf_temp_event_t event)148 NRFY_STATIC_INLINE bool nrfy_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event)
149 {
150     nrf_barrier_rw();
151     uint32_t check = nrf_temp_event_check(p_reg, event);
152     nrf_barrier_r();
153     return check;
154 }
155 
156 /** @refhal{nrf_temp_result_get} */
nrfy_temp_result_get(NRF_TEMP_Type const * p_reg)157 NRFY_STATIC_INLINE int32_t nrfy_temp_result_get(NRF_TEMP_Type const * p_reg)
158 {
159     nrf_barrier_r();
160     int32_t temperature = nrf_temp_result_get(p_reg);
161     nrf_barrier_r();
162     return temperature;
163 }
164 
165 #if NRFY_TEMP_HAS_CALIBRATION
166 /** @refhal{nrf_temp_calibration_coeff_set} */
nrfy_temp_calibration_coeff_set(NRF_TEMP_Type * p_reg,uint32_t coeff)167 NRFY_STATIC_INLINE void nrfy_temp_calibration_coeff_set(NRF_TEMP_Type * p_reg, uint32_t coeff)
168 {
169     nrf_temp_calibration_coeff_set(p_reg, coeff);
170     nrf_barrier_w();
171 }
172 
173 /** @refhal{nrf_temp_calibration_coeff_get} */
nrfy_temp_calibration_coeff_get(NRF_TEMP_Type const * p_reg)174 NRFY_STATIC_INLINE uint32_t nrfy_temp_calibration_coeff_get(NRF_TEMP_Type const * p_reg)
175 {
176     nrf_barrier_rw();
177     uint32_t coeff = nrf_temp_calibration_coeff_get(p_reg);
178     nrf_barrier_r();
179     return coeff;
180 }
181 #endif
182 
183 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
184 /** @refhal{nrf_temp_subscribe_set} */
nrfy_temp_subscribe_set(NRF_TEMP_Type * p_reg,nrf_temp_task_t task,uint8_t channel)185 NRFY_STATIC_INLINE void nrfy_temp_subscribe_set(NRF_TEMP_Type * p_reg,
186                                                 nrf_temp_task_t task,
187                                                 uint8_t         channel)
188 {
189     nrf_temp_subscribe_set(p_reg, task, channel);
190     nrf_barrier_w();
191 }
192 
193 /** @refhal{nrf_temp_subscribe_clear} */
nrfy_temp_subscribe_clear(NRF_TEMP_Type * p_reg,nrf_temp_task_t task)194 NRFY_STATIC_INLINE void nrfy_temp_subscribe_clear(NRF_TEMP_Type * p_reg, nrf_temp_task_t task)
195 {
196     nrf_temp_subscribe_clear(p_reg, task);
197     nrf_barrier_w();
198 }
199 
200 /** @refhal{nrf_temp_publish_set} */
nrfy_temp_publish_set(NRF_TEMP_Type * p_reg,nrf_temp_event_t event,uint8_t channel)201 NRFY_STATIC_INLINE void nrfy_temp_publish_set(NRF_TEMP_Type *  p_reg,
202                                               nrf_temp_event_t event,
203                                               uint8_t          channel)
204 {
205     nrf_temp_publish_set(p_reg, event, channel);
206     nrf_barrier_w();
207 }
208 
209 /** @refhal{nrf_temp_publish_clear} */
nrfy_temp_publish_clear(NRF_TEMP_Type * p_reg,nrf_temp_event_t event)210 NRFY_STATIC_INLINE void nrfy_temp_publish_clear(NRF_TEMP_Type *  p_reg, nrf_temp_event_t event)
211 {
212     nrf_temp_publish_clear(p_reg, event);
213     nrf_barrier_w();
214 }
215 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
216 
217 /** @} */
218 
219 #ifdef __cplusplus
220 }
221 #endif
222 
223 #endif // NRFY_TEMP_H__
224