1 /*
2 * Copyright (c) 2021 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRFY_DPPI_H__
35 #define NRFY_DPPI_H__
36
37 #include <nrfx.h>
38 #include <hal/nrf_dppi.h>
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /**
45 * @defgroup nrfy_dppi DPPI HALY
46 * @{
47 * @ingroup nrf_dppi
48 * @brief Hardware access layer with cache and barrier support for managing the DPPI peripheral.
49 */
50
51 /**
52 * @brief Function for enabling or disabling multiple DPPI channels.
53 *
54 * The bits in @c mask value correspond to particular channels. It means that
55 * writing 1 to bit 0 enables or disables channel 0,
56 * writing 1 to bit 1 enables or disables channel 1 etc.
57 *
58 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
59 * @param[in] mask Channel mask.
60 * @param[in] enable True if specified channels are to be enabled, false otherwise.
61 */
nrfy_dppi_channels_set(NRF_DPPIC_Type * p_reg,uint32_t mask,bool enable)62 NRFY_STATIC_INLINE void nrfy_dppi_channels_set(NRF_DPPIC_Type * p_reg, uint32_t mask, bool enable)
63 {
64 if (enable == true)
65 {
66 nrf_dppi_channels_enable(p_reg, mask);
67 }
68 else
69 {
70 nrf_dppi_channels_disable(p_reg, mask);
71 }
72 nrf_barrier_w();
73 }
74
75 /** @refhal{nrf_dppi_channel_number_get} */
nrfy_dppi_channel_number_get(NRF_DPPIC_Type const * p_reg)76 NRFY_STATIC_INLINE uint8_t nrfy_dppi_channel_number_get(NRF_DPPIC_Type const * p_reg)
77 {
78 return nrf_dppi_channel_number_get(p_reg);
79 }
80
81 /** @refhal{nrf_dppi_group_number_get} */
nrfy_dppi_group_number_get(NRF_DPPIC_Type const * p_reg)82 NRFY_STATIC_INLINE uint8_t nrfy_dppi_group_number_get(NRF_DPPIC_Type const * p_reg)
83 {
84 return nrf_dppi_group_number_get(p_reg);
85 }
86
87 /** @refhal{nrf_dppi_task_trigger} */
nrfy_dppi_task_trigger(NRF_DPPIC_Type * p_reg,nrf_dppi_task_t dppi_task)88 NRFY_STATIC_INLINE void nrfy_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task)
89 {
90 nrf_dppi_task_trigger(p_reg, dppi_task);
91 nrf_barrier_w();
92 }
93
94 /** @refhal{nrf_dppi_task_address_get} */
nrfy_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,nrf_dppi_task_t task)95 NRFY_STATIC_INLINE uint32_t nrfy_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
96 nrf_dppi_task_t task)
97 {
98 return nrf_dppi_task_address_get(p_reg, task);
99 }
100
101 /** @refhal{nrf_dppi_channel_check} */
nrfy_dppi_channel_check(NRF_DPPIC_Type const * p_reg,uint8_t channel)102 NRFY_STATIC_INLINE bool nrfy_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel)
103 {
104 nrf_barrier_rw();
105 bool check = nrf_dppi_channel_check(p_reg, channel);
106 nrf_barrier_r();
107 return check;
108 }
109
110 /** @refhal{nrf_dppi_channels_enable} */
nrfy_dppi_channels_enable(NRF_DPPIC_Type * p_reg,uint32_t mask)111 NRFY_STATIC_INLINE void nrfy_dppi_channels_enable(NRF_DPPIC_Type * p_reg, uint32_t mask)
112 {
113 nrf_dppi_channels_enable(p_reg, mask);
114 nrf_barrier_w();
115 }
116
117 /** @refhal{nrf_dppi_channels_disable} */
nrfy_dppi_channels_disable(NRF_DPPIC_Type * p_reg,uint32_t mask)118 NRFY_STATIC_INLINE void nrfy_dppi_channels_disable(NRF_DPPIC_Type * p_reg, uint32_t mask)
119 {
120 nrf_dppi_channels_disable(p_reg, mask);
121 nrf_barrier_w();
122 }
123
124 /** @refhal{nrf_dppi_channels_disable_all} */
nrfy_dppi_channels_disable_all(NRF_DPPIC_Type * p_reg)125 NRFY_STATIC_INLINE void nrfy_dppi_channels_disable_all(NRF_DPPIC_Type * p_reg)
126 {
127 nrf_dppi_channels_disable_all(p_reg);
128 nrf_barrier_w();
129 }
130
131 /** @refhal{nrf_dppi_subscribe_set} */
nrfy_dppi_subscribe_set(NRF_DPPIC_Type * p_reg,nrf_dppi_task_t task,uint8_t channel)132 NRFY_STATIC_INLINE void nrfy_dppi_subscribe_set(NRF_DPPIC_Type * p_reg,
133 nrf_dppi_task_t task,
134 uint8_t channel)
135 {
136 nrf_dppi_subscribe_set(p_reg, task, channel);
137 nrf_barrier_w();
138 }
139
140 /** @refhal{nrf_dppi_subscribe_clear} */
nrfy_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg,nrf_dppi_task_t task)141 NRFY_STATIC_INLINE void nrfy_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t task)
142 {
143 nrf_dppi_subscribe_clear(p_reg, task);
144 nrf_barrier_w();
145 }
146
147 /** @refhal{nrf_dppi_channels_group_set} */
nrfy_dppi_channels_group_set(NRF_DPPIC_Type * p_reg,uint32_t channel_mask,nrf_dppi_channel_group_t channel_group)148 NRFY_STATIC_INLINE void nrfy_dppi_channels_group_set(NRF_DPPIC_Type * p_reg,
149 uint32_t channel_mask,
150 nrf_dppi_channel_group_t channel_group)
151 {
152 nrf_dppi_channels_group_set(p_reg, channel_mask, channel_group);
153 nrf_barrier_w();
154 }
155
156 /** @refhal{nrf_dppi_channels_include_in_group} */
nrfy_dppi_channels_include_in_group(NRF_DPPIC_Type * p_reg,uint32_t channel_mask,nrf_dppi_channel_group_t channel_group)157 NRFY_STATIC_INLINE void nrfy_dppi_channels_include_in_group(NRF_DPPIC_Type * p_reg,
158 uint32_t channel_mask,
159 nrf_dppi_channel_group_t channel_group)
160 {
161 nrf_dppi_channels_include_in_group(p_reg, channel_mask, channel_group);
162 nrf_barrier_w();
163 }
164
165 /** @refhal{nrf_dppi_channels_remove_from_group} */
166 NRFY_STATIC_INLINE
nrfy_dppi_channels_remove_from_group(NRF_DPPIC_Type * p_reg,uint32_t channel_mask,nrf_dppi_channel_group_t channel_group)167 void nrfy_dppi_channels_remove_from_group(NRF_DPPIC_Type * p_reg,
168 uint32_t channel_mask,
169 nrf_dppi_channel_group_t channel_group)
170 {
171 nrf_dppi_channels_remove_from_group(p_reg, channel_mask, channel_group);
172 nrf_barrier_w();
173 }
174
175 /** @refhal{nrf_dppi_group_clear} */
nrfy_dppi_group_clear(NRF_DPPIC_Type * p_reg,nrf_dppi_channel_group_t group)176 NRFY_STATIC_INLINE void nrfy_dppi_group_clear(NRF_DPPIC_Type * p_reg,
177 nrf_dppi_channel_group_t group)
178 {
179 nrf_dppi_group_clear(p_reg, group);
180 nrf_barrier_w();
181 }
182
183 /** @refhal{nrf_dppi_group_enable} */
nrfy_dppi_group_enable(NRF_DPPIC_Type * p_reg,nrf_dppi_channel_group_t group)184 NRFY_STATIC_INLINE void nrfy_dppi_group_enable(NRF_DPPIC_Type * p_reg,
185 nrf_dppi_channel_group_t group)
186 {
187 nrf_dppi_group_enable(p_reg, group);
188 nrf_barrier_w();
189 }
190
191 /** @refhal{nrf_dppi_group_disable} */
nrfy_dppi_group_disable(NRF_DPPIC_Type * p_reg,nrf_dppi_channel_group_t group)192 NRFY_STATIC_INLINE void nrfy_dppi_group_disable(NRF_DPPIC_Type * p_reg,
193 nrf_dppi_channel_group_t group)
194 {
195 nrf_dppi_group_disable(p_reg, group);
196 nrf_barrier_w();
197 }
198
199 /** @refhal{nrf_dppi_group_enable_task_get} */
nrfy_dppi_group_enable_task_get(uint8_t index)200 NRFY_STATIC_INLINE nrf_dppi_task_t nrfy_dppi_group_enable_task_get(uint8_t index)
201 {
202 return nrf_dppi_group_enable_task_get(index);
203 }
204
205 /** @refhal{nrf_dppi_group_disable_task_get} */
nrfy_dppi_group_disable_task_get(uint8_t index)206 NRFY_STATIC_INLINE nrf_dppi_task_t nrfy_dppi_group_disable_task_get(uint8_t index)
207 {
208 return nrf_dppi_group_disable_task_get(index);
209 }
210
211 /** @} */
212
213 #ifdef __cplusplus
214 }
215 #endif
216
217 #endif // NRFY_DPPI_H__
218