1 /*
2 * Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TIMER_H__
35 #define NRF_TIMER_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_timer_hal TIMER HAL
45 * @{
46 * @ingroup nrf_timer
47 * @brief Hardware access layer for managing the TIMER peripheral.
48 */
49
50 /**
51 * @brief Macro getting pointer to the structure of registers of the TIMER peripheral.
52 *
53 * @param[in] idx TIMER instance index.
54 *
55 * @return Pointer to the structure of registers of the TIMER peripheral.
56 */
57 #define NRF_TIMER_INST_GET(idx) NRFX_CONCAT_2(NRF_TIMER, idx)
58
59 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether timer has capture/compare channel 4. */
61 #define NRF_TIMER_HAS_CC4 1
62 #else
63 #define NRF_TIMER_HAS_CC4 0
64 #endif
65
66 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
67 /** @brief Symbol indicating whether timer has capture/compare channel 5. */
68 #define NRF_TIMER_HAS_CC5 1
69 #else
70 #define NRF_TIMER_HAS_CC5 0
71 #endif
72
73 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
74 /** @brief Symbol indicating whether timer has capture/compare channel 6. */
75 #define NRF_TIMER_HAS_CC6 1
76 #else
77 #define NRF_TIMER_HAS_CC6 0
78 #endif
79
80 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
81 /** @brief Symbol indicating whether timer has capture/compare channel 7. */
82 #define NRF_TIMER_HAS_CC7 1
83 #else
84 #define NRF_TIMER_HAS_CC7 0
85 #endif
86
87 #if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__)
88 /** @brief Symbol indicating whether timer supports low power mode. */
89 #define NRF_TIMER_HAS_LOW_POWER_MODE 1
90 #else
91 #define NRF_TIMER_HAS_LOW_POWER_MODE 0
92 #endif
93
94 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
95 /** @brief Symbol indicating whether timer supports one-shot operation. */
96 #define NRF_TIMER_HAS_ONE_SHOT 1
97 #else
98 #define NRF_TIMER_HAS_ONE_SHOT 0
99 #endif
100
101 /** @brief Base frequency value 320 MHz for TIMER. */
102 #define NRF_TIMER_BASE_FREQUENCY_320MHZ (NRFX_MHZ_TO_HZ(320UL))
103 /** @brief Base frequency value 64 MHz for TIMER. */
104 #define NRF_TIMER_BASE_FREQUENCY_64MHZ (NRFX_MHZ_TO_HZ(64UL))
105 /** @brief Base frequency value 32 MHz for TIMER. */
106 #define NRF_TIMER_BASE_FREQUENCY_32MHZ (NRFX_MHZ_TO_HZ(32UL))
107 /** @brief Base frequency value 16 MHz for TIMER. */
108 #define NRF_TIMER_BASE_FREQUENCY_16MHZ (NRFX_MHZ_TO_HZ(16UL))
109
110 #if !defined(NRF_TIMER_PRESCALER_MAX)
111 /** @brief Maximum value of PRESCALER register. */
112 #define NRF_TIMER_PRESCALER_MAX 9
113 #endif
114
115 /**
116 * @brief Macro for getting the maximum bit resolution of the specified timer instance.
117 *
118 * @param[in] id Index of the specified timer instance.
119 *
120 * @retval Maximum bit resolution of the specified timer instance.
121 */
122 #define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
123
124 /**
125 * @brief Macro for validating the correctness of the bit width resolution setting.
126 *
127 * @param[in] id Index of the specified timer instance.
128 * @param[in] bit_width Bit width resolution value to be checked.
129 *
130 * @retval true Timer instance supports the specified bit width resolution value.
131 * @retval false Timer instance does not support the specified bit width resolution value.
132 */
133 #define TIMER_BIT_WIDTH_MAX(id, bit_width) \
134 (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
135 (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
136 (bit_width == NRF_TIMER_BIT_WIDTH_16) : \
137 (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
138 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
139 (bit_width == NRF_TIMER_BIT_WIDTH_24) : \
140 (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
141 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
142 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
143 (bit_width == NRF_TIMER_BIT_WIDTH_32) : \
144 false))))
145
146 /**
147 * @brief Macro for checking correctness of bit width configuration for the specified timer.
148 *
149 * @param[in] p_reg Timer instance register.
150 * @param[in] bit_width Bit width resolution value to be checked.
151 *
152 * @retval true Timer instance supports the specified bit width resolution value.
153 * @retval false Timer instance does not support the specified bit width resolution value.
154 */
155 #if !defined(NRF_TIMER_IS_BIT_WIDTH_VALID)
156 #if (TIMER_COUNT == 3) || defined(__NRFX_DOXYGEN__)
157 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
158 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
159 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
160 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)))
161 #elif (TIMER_COUNT == 4)
162 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
163 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
164 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
165 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
166 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)))
167 #elif (TIMER_COUNT == 5)
168 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
169 ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width)) \
170 || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width)) \
171 || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) \
172 || ((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width)) \
173 || ((p_reg == NRF_TIMER4) && TIMER_BIT_WIDTH_MAX(4, bit_width)))
174 #else
175 #error "Not supported timer count"
176 #endif
177 #endif
178
179 #if !defined(NRF_TIMER_IS_320MHZ_TIMER)
180 /** @brief Macro for checking whether the base frequency for the specified timer is 320 MHz. */
181 #define NRF_TIMER_IS_320MHZ_TIMER(p_reg) false
182 #endif
183
184 #if !defined(NRF_TIMER_IS_64MHZ_TIMER)
185 /** @brief Macro for checking whether the base frequency for the specified timer is 64 MHz. */
186 #define NRF_TIMER_IS_64MHZ_TIMER(p_reg) false
187 #endif
188
189 #if !defined(NRF_TIMER_IS_32MHZ_TIMER)
190 /** @brief Macro for checking whether the base frequency for the specified timer is 32 MHz. */
191 #define NRF_TIMER_IS_32MHZ_TIMER(p_reg) false
192 #endif
193
194 #if !defined(NRF_TIMER_IS_16MHZ_TIMER)
195 /** @brief Macro for checking whether the base frequency for the specified timer is 16 MHz. */
196 #define NRF_TIMER_IS_16MHZ_TIMER(p_reg) true
197 #endif
198
199 /**
200 * @brief Macro for getting base frequency value in Hz for the specified timer.
201 *
202 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
203 */
204 #define NRF_TIMER_BASE_FREQUENCY_GET(p_reg) \
205 ((NRF_TIMER_IS_320MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_320MHZ): \
206 ((NRF_TIMER_IS_64MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_64MHZ): \
207 ((NRF_TIMER_IS_16MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_16MHZ) : \
208 (NRF_TIMER_BASE_FREQUENCY_32MHZ))))
209
210 /**
211 * @brief Macro for computing prescaler value for given base frequency and desired frequency.
212 *
213 * @warning Not every combination of base frequency and desired frequency is supported.
214 *
215 * @param[in] base_freq Base clock frequency for timer in Hz.
216 * @param[in] frequency Desired frequency value in Hz.
217 */
218 #define NRF_TIMER_PRESCALER_CALCULATE(base_freq, frequency) \
219 NRF_CTZ((uint32_t)(base_freq) / (uint32_t)(frequency))
220
221 /**
222 * @brief Macro for checking whether specified frequency can be achived for given timer instance.
223 *
224 * @note Macro is using compile time assertion.
225 *
226 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
227 * @param[in] frequency Desired frequency value in Hz.
228 */
229 #define NRF_TIMER_FREQUENCY_STATIC_CHECK(p_reg, frequency) \
230 NRFX_STATIC_ASSERT( \
231 (NRF_TIMER_BASE_FREQUENCY_GET(p_reg) == frequency) || \
232 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) % frequency == 0) && \
233 NRFX_IS_POWER_OF_TWO(NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / (uint32_t)frequency) && \
234 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / frequency) <= (1 << NRF_TIMER_PRESCALER_MAX))))
235
236 /**
237 * @brief Macro for getting the number of capture/compare channels available
238 * in a given timer instance.
239 *
240 * @param[in] id Index of the specified timer instance.
241 */
242 #define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
243
244 /** @brief Symbol specifying maximum number of available compare channels. */
245 #define NRF_TIMER_CC_COUNT_MAX NRFX_ARRAY_SIZE(((NRF_TIMER_Type*)0)->EVENTS_COMPARE)
246
247 /** @brief Symbol for creating the interrupt bitmask for all compare channels. */
248 #define NRF_TIMER_ALL_CHANNELS_INT_MASK \
249 ((uint32_t)((1 << NRF_TIMER_CC_COUNT_MAX) - 1) << TIMER_INTENSET_COMPARE0_Pos)
250
251 /** @brief Timer tasks. */
252 typedef enum
253 {
254 NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
255 NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
256 NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
257 NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value.
258 NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer.
259 NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0.
260 NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
261 NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
262 NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
263 #if NRF_TIMER_HAS_CC4
264 NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
265 #endif
266 #if NRF_TIMER_HAS_CC5
267 NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
268 #endif
269 #if NRF_TIMER_HAS_CC6
270 NRF_TIMER_TASK_CAPTURE6 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[6]), ///< Task for capturing the timer value on channel 6.
271 #endif
272 #if NRF_TIMER_HAS_CC7
273 NRF_TIMER_TASK_CAPTURE7 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[7]), ///< Task for capturing the timer value on channel 7.
274 #endif
275 } nrf_timer_task_t;
276
277 /** @brief Timer events. */
278 typedef enum
279 {
280 NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
281 NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
282 NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
283 NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
284 #if NRF_TIMER_HAS_CC4
285 NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
286 #endif
287 #if NRF_TIMER_HAS_CC5
288 NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
289 #endif
290 #if NRF_TIMER_HAS_CC6
291 NRF_TIMER_EVENT_COMPARE6 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[6]), ///< Event from compare channel 6.
292 #endif
293 #if NRF_TIMER_HAS_CC7
294 NRF_TIMER_EVENT_COMPARE7 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[7]), ///< Event from compare channel 7.
295 #endif
296 } nrf_timer_event_t;
297
298 /** @brief Types of timer shortcuts. */
299 typedef enum
300 {
301 NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
302 NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1.
303 NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2.
304 NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3.
305 #if NRF_TIMER_HAS_CC4
306 NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4.
307 #endif
308 #if NRF_TIMER_HAS_CC5
309 NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5.
310 #endif
311 #if NRF_TIMER_HAS_CC6
312 NRF_TIMER_SHORT_COMPARE6_STOP_MASK = TIMER_SHORTS_COMPARE6_STOP_Msk, ///< Shortcut for stopping the timer based on compare 6.
313 #endif
314 #if NRF_TIMER_HAS_CC7
315 NRF_TIMER_SHORT_COMPARE7_STOP_MASK = TIMER_SHORTS_COMPARE7_STOP_Msk, ///< Shortcut for stopping the timer based on compare 7.
316 #endif
317 NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0.
318 NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
319 NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
320 NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
321 #if NRF_TIMER_HAS_CC4
322 NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
323 #endif
324 #if NRF_TIMER_HAS_CC5
325 NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
326 #endif
327 #if NRF_TIMER_HAS_CC6
328 NRF_TIMER_SHORT_COMPARE6_CLEAR_MASK = TIMER_SHORTS_COMPARE6_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 6.
329 #endif
330 #if NRF_TIMER_HAS_CC7
331 NRF_TIMER_SHORT_COMPARE7_CLEAR_MASK = TIMER_SHORTS_COMPARE7_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 7.
332 #endif
333 } nrf_timer_short_mask_t;
334
335 /** @brief Timer modes. */
336 typedef enum
337 {
338 NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
339 NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter.
340 #if NRF_TIMER_HAS_LOW_POWER_MODE
341 NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
342 #endif
343 } nrf_timer_mode_t;
344
345 /** @brief Timer bit width. */
346 typedef enum
347 {
348 NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
349 NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit.
350 NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit.
351 NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
352 } nrf_timer_bit_width_t;
353
354 /** @brief Timer prescalers. */
355 typedef enum
356 {
357 NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
358 NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz.
359 NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz.
360 NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz.
361 NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz.
362 NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz.
363 NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz.
364 NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz.
365 NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz.
366 NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
367 } nrf_timer_frequency_t;
368
369 /** @brief Timer capture/compare channels. */
370 typedef enum
371 {
372 NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
373 NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1.
374 NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2.
375 NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3.
376 #if NRF_TIMER_HAS_CC4
377 NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4.
378 #endif
379 #if NRF_TIMER_HAS_CC5
380 NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5.
381 #endif
382 #if NRF_TIMER_HAS_CC6
383 NRF_TIMER_CC_CHANNEL6, ///< Timer capture/compare channel 6.
384 #endif
385 #if NRF_TIMER_HAS_CC7
386 NRF_TIMER_CC_CHANNEL7, ///< Timer capture/compare channel 7.
387 #endif
388 } nrf_timer_cc_channel_t;
389
390 /** @brief Timer interrupts. */
391 typedef enum
392 {
393 NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
394 NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
395 NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
396 NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
397 #if NRF_TIMER_HAS_CC4
398 NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
399 #endif
400 #if NRF_TIMER_HAS_CC5
401 NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
402 #endif
403 #if NRF_TIMER_HAS_CC6
404 NRF_TIMER_INT_COMPARE6_MASK = TIMER_INTENSET_COMPARE6_Msk, ///< Timer interrupt from compare event on channel 6.
405 #endif
406 #if NRF_TIMER_HAS_CC7
407 NRF_TIMER_INT_COMPARE7_MASK = TIMER_INTENSET_COMPARE7_Msk, ///< Timer interrupt from compare event on channel 7.
408 #endif
409 } nrf_timer_int_mask_t;
410
411
412 /**
413 * @brief Function for setting the prescaler factor.
414 *
415 * @note Prescaler value is expressed as \f$ 2^{prescaler\_factor} \f$.
416 *
417 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
418 * @param[in] prescaler_factor Prescaler factor.
419 */
420 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor);
421
422 /**
423 * @brief Function for retrieving the prescaler factor.
424 *
425 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
426 *
427 * @return Prescaler factor.
428 */
429 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg);
430
431 /**
432 * @brief Function for activating the specified timer task.
433 *
434 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
435 * @param[in] task Task to be activated.
436 */
437 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
438 nrf_timer_task_t task);
439
440 /**
441 * @brief Function for getting the address of the specified timer task register.
442 *
443 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
444 * @param[in] task The specified task.
445 *
446 * @return Address of the specified task register.
447 */
448 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
449 nrf_timer_task_t task);
450
451 /**
452 * @brief Function for clearing the specified timer event.
453 *
454 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
455 * @param[in] event Event to clear.
456 */
457 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
458 nrf_timer_event_t event);
459
460 /**
461 * @brief Function for retrieving the state of the TIMER event.
462 *
463 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
464 * @param[in] event Event to be checked.
465 *
466 * @retval true The event has been generated.
467 * @retval false The event has not been generated.
468 */
469 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
470 nrf_timer_event_t event);
471
472 /**
473 * @brief Function for getting the address of the specified timer event register.
474 *
475 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
476 * @param[in] event The specified event.
477 *
478 * @return Address of the specified event register.
479 */
480 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
481 nrf_timer_event_t event);
482
483 /**
484 * @brief Function for enabling the specified shortcuts.
485 *
486 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
487 * @param[in] mask Shortcuts to be enabled.
488 */
489 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
490 uint32_t mask);
491
492 /**
493 * @brief Function for disabling the specified shortcuts.
494 *
495 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
496 * @param[in] mask Shortcuts to be disabled.
497 */
498 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
499 uint32_t mask);
500
501 /**
502 * @brief Function for setting the specified shortcuts.
503 *
504 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
505 * @param[in] mask Shortcuts to be set.
506 */
507 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
508 uint32_t mask);
509
510 /**
511 * @brief Function for getting COMPARE_CLEAR short mask for the specified channel.
512 *
513 * @param[in] channel Channel.
514 *
515 * @return Short mask.
516 */
517 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel);
518
519 /**
520 * @brief Function for getting COMPARE_STOP short mask for the specified channel.
521 *
522 * @param[in] channel Channel.
523 *
524 * @return Short mask.
525 */
526 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel);
527
528 /**
529 * @brief Function for enabling the specified interrupts.
530 *
531 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
532 * @param[in] mask Mask of interrupts to be enabled.
533 */
534 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
535 uint32_t mask);
536
537 /**
538 * @brief Function for disabling the specified interrupts.
539 *
540 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
541 * @param[in] mask Mask of interrupts to be disabled.
542 */
543 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
544 uint32_t mask);
545
546 /**
547 * @brief Function for checking if the specified interrupts are enabled.
548 *
549 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
550 * @param[in] mask Mask of interrupts to be checked.
551 *
552 * @return Mask of enabled interrupts.
553 */
554 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask);
555
556 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
557 /**
558 * @brief Function for setting the subscribe configuration for a given
559 * TIMER task.
560 *
561 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
562 * @param[in] task Task for which to set the configuration.
563 * @param[in] channel Channel through which to subscribe events.
564 */
565 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
566 nrf_timer_task_t task,
567 uint8_t channel);
568
569 /**
570 * @brief Function for clearing the subscribe configuration for a given
571 * TIMER task.
572 *
573 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
574 * @param[in] task Task for which to clear the configuration.
575 */
576 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
577 nrf_timer_task_t task);
578
579 /**
580 * @brief Function for setting the publish configuration for a given
581 * TIMER event.
582 *
583 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
584 * @param[in] event Event for which to set the configuration.
585 * @param[in] channel Channel through which to publish the event.
586 */
587 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
588 nrf_timer_event_t event,
589 uint8_t channel);
590
591 /**
592 * @brief Function for clearing the publish configuration for a given
593 * TIMER event.
594 *
595 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
596 * @param[in] event Event for which to clear the configuration.
597 */
598 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
599 nrf_timer_event_t event);
600 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
601
602 /**
603 * @brief Function for setting the timer mode.
604 *
605 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
606 * @param[in] mode Timer mode.
607 */
608 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
609 nrf_timer_mode_t mode);
610
611 /**
612 * @brief Function for retrieving the timer mode.
613 *
614 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
615 *
616 * @return Timer mode.
617 */
618 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg);
619
620 /**
621 * @brief Function for setting the timer bit width.
622 *
623 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
624 * @param[in] bit_width Timer bit width.
625 */
626 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
627 nrf_timer_bit_width_t bit_width);
628
629 /**
630 * @brief Function for retrieving the timer bit width.
631 *
632 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
633 *
634 * @return Timer bit width.
635 */
636 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg);
637
638 /**
639 * @brief Function for setting the capture/compare register for the specified channel.
640 *
641 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
642 * @param[in] cc_channel The specified capture/compare channel.
643 * @param[in] cc_value Value to write to the capture/compare register.
644 */
645 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
646 nrf_timer_cc_channel_t cc_channel,
647 uint32_t cc_value);
648
649 /**
650 * @brief Function for retrieving the capture/compare value for a specified channel.
651 *
652 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
653 * @param[in] cc_channel The specified capture/compare channel.
654 *
655 * @return Value from the specified capture/compare register.
656 */
657 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
658 nrf_timer_cc_channel_t cc_channel);
659
660 /**
661 * @brief Function for getting the specified timer capture task.
662 *
663 * @param[in] channel Capture channel.
664 *
665 * @return Capture task.
666 */
667 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel);
668
669 /**
670 * @brief Function for getting the specified timer compare event.
671 *
672 * @param[in] channel Compare channel.
673 *
674 * @return Compare event.
675 */
676 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel);
677
678 /**
679 * @brief Function for getting the specified timer compare interrupt.
680 *
681 * @param[in] channel Compare channel.
682 *
683 * @return Compare interrupt.
684 */
685 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel);
686
687 /**
688 * @brief Function for calculating the number of timer ticks for a given time
689 * (in microseconds) and timer frequency.
690 *
691 * @param[in] time_us Time in microseconds.
692 * @param[in] frequency Timer frequency.
693 *
694 * @return Number of timer ticks.
695 */
696 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
697 nrf_timer_frequency_t frequency);
698
699 /**
700 * @brief Function for calculating the number of timer ticks for a given time
701 * (in milliseconds) and timer frequency.
702 *
703 * @param[in] time_ms Time in milliseconds.
704 * @param[in] frequency Timer frequency.
705 *
706 * @return Number of timer ticks.
707 */
708 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
709 nrf_timer_frequency_t frequency);
710
711 #if NRF_TIMER_HAS_ONE_SHOT
712 /**
713 * @brief Function for enabling one-shot operation for the specified capture/compare channel.
714 *
715 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
716 * @param[in] cc_channel Capture/compare channel.
717 */
718 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
719 nrf_timer_cc_channel_t cc_channel);
720
721 /**
722 * @brief Function for disabling one-shot operation for the specified capture/compare channel.
723 *
724 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
725 * @param[in] cc_channel Capture/compare channel.
726 */
727 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
728 nrf_timer_cc_channel_t cc_channel);
729
730 #endif // NRF_TIMER_HAS_ONE_SHOT
731
732 #ifndef NRF_DECLARE_ONLY
733
nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)734 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
735 nrf_timer_task_t task)
736 {
737 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
738 }
739
nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_task_t task)740 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
741 nrf_timer_task_t task)
742 {
743 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
744 }
745
nrf_timer_event_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)746 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
747 nrf_timer_event_t event)
748 {
749 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
750 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
751 }
752
nrf_timer_event_check(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)753 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
754 nrf_timer_event_t event)
755 {
756 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
757 }
758
nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)759 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
760 nrf_timer_event_t event)
761 {
762 return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
763 }
764
nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,uint32_t mask)765 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
766 uint32_t mask)
767 {
768 p_reg->SHORTS |= mask;
769 }
770
nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,uint32_t mask)771 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
772 uint32_t mask)
773 {
774 p_reg->SHORTS &= ~(mask);
775 }
776
nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,uint32_t mask)777 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
778 uint32_t mask)
779 {
780 p_reg->SHORTS = mask;
781 }
782
nrf_timer_short_compare_clear_get(uint8_t channel)783 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel)
784 {
785 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK << channel);
786 }
787
nrf_timer_short_compare_stop_get(uint8_t channel)788 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel)
789 {
790 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_STOP_MASK << channel);
791 }
792
nrf_timer_int_enable(NRF_TIMER_Type * p_reg,uint32_t mask)793 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
794 uint32_t mask)
795 {
796 p_reg->INTENSET = mask;
797 }
798
nrf_timer_int_disable(NRF_TIMER_Type * p_reg,uint32_t mask)799 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
800 uint32_t mask)
801 {
802 p_reg->INTENCLR = mask;
803 }
804
nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg,uint32_t mask)805 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask)
806 {
807 return p_reg->INTENSET & mask;
808 }
809
810 #if defined(DPPI_PRESENT)
nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,nrf_timer_task_t task,uint8_t channel)811 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
812 nrf_timer_task_t task,
813 uint8_t channel)
814 {
815 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
816 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
817 }
818
nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)819 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
820 nrf_timer_task_t task)
821 {
822 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
823 }
824
nrf_timer_publish_set(NRF_TIMER_Type * p_reg,nrf_timer_event_t event,uint8_t channel)825 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
826 nrf_timer_event_t event,
827 uint8_t channel)
828 {
829 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
830 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
831 }
832
nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)833 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
834 nrf_timer_event_t event)
835 {
836 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
837 }
838 #endif // defined(DPPI_PRESENT)
839
nrf_timer_mode_set(NRF_TIMER_Type * p_reg,nrf_timer_mode_t mode)840 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
841 nrf_timer_mode_t mode)
842 {
843 p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
844 ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
845 }
846
nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)847 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)
848 {
849 return (nrf_timer_mode_t)(p_reg->MODE);
850 }
851
nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,nrf_timer_bit_width_t bit_width)852 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
853 nrf_timer_bit_width_t bit_width)
854 {
855 p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
856 ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
857 TIMER_BITMODE_BITMODE_Msk);
858 }
859
nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)860 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)
861 {
862 return (nrf_timer_bit_width_t)(p_reg->BITMODE);
863 }
864
nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg,uint32_t prescaler_factor)865 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor)
866 {
867 NRFX_ASSERT(prescaler_factor <= NRF_TIMER_PRESCALER_MAX);
868 p_reg->PRESCALER = prescaler_factor;
869 }
870
nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)871 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)
872 {
873 return p_reg->PRESCALER;
874 }
875
nrf_timer_cc_set(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value)876 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
877 nrf_timer_cc_channel_t cc_channel,
878 uint32_t cc_value)
879 {
880 p_reg->CC[cc_channel] = cc_value;
881 }
882
nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,nrf_timer_cc_channel_t cc_channel)883 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
884 nrf_timer_cc_channel_t cc_channel)
885 {
886 return (uint32_t)p_reg->CC[cc_channel];
887 }
888
nrf_timer_capture_task_get(uint8_t channel)889 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel)
890 {
891 return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
892 }
893
nrf_timer_compare_event_get(uint8_t channel)894 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel)
895 {
896 return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
897 }
898
nrf_timer_compare_int_get(uint8_t channel)899 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel)
900 {
901 return (nrf_timer_int_mask_t)
902 ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel);
903 }
904
nrf_timer_us_to_ticks(uint32_t time_us,nrf_timer_frequency_t frequency)905 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
906 nrf_timer_frequency_t frequency)
907 {
908 // The "frequency" parameter here is actually the prescaler value, and the
909 // timer runs at the following frequency: f = 16 MHz / 2^prescaler.
910 uint32_t prescaler = (uint32_t)frequency;
911 uint64_t ticks = ((time_us * 16ULL) >> prescaler);
912 NRFX_ASSERT(ticks <= UINT32_MAX);
913 return (uint32_t)ticks;
914 }
915
nrf_timer_ms_to_ticks(uint32_t time_ms,nrf_timer_frequency_t frequency)916 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
917 nrf_timer_frequency_t frequency)
918 {
919 // The "frequency" parameter here is actually the prescaler value, and the
920 // timer runs at the following frequency: f = 16000 kHz / 2^prescaler.
921 uint32_t prescaler = (uint32_t)frequency;
922 uint64_t ticks = ((time_ms * 16000ULL) >> prescaler);
923 NRFX_ASSERT(ticks <= UINT32_MAX);
924 return (uint32_t)ticks;
925 }
926
927 #if NRF_TIMER_HAS_ONE_SHOT
nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)928 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
929 nrf_timer_cc_channel_t cc_channel)
930 {
931 p_reg->ONESHOTEN[cc_channel] = TIMER_ONESHOTEN_ONESHOTEN_Msk;
932 }
933
nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)934 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
935 nrf_timer_cc_channel_t cc_channel)
936 {
937 p_reg->ONESHOTEN[cc_channel] = 0;
938 }
939 #endif // NRF_TIMER_HAS_ONE_SHOT
940
941 #endif // NRF_DECLARE_ONLY
942
943 /** @} */
944
945 #ifdef __cplusplus
946 }
947 #endif
948
949 #endif // NRF_TIMER_H__
950
