1 /*
2 * Copyright (c) 2014 - 2025, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_TIMER_H__
35 #define NRF_TIMER_H__
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_timer_hal TIMER HAL
45 * @{
46 * @ingroup nrf_timer
47 * @brief Hardware access layer for managing the TIMER peripheral.
48 */
49
50 /**
51 * @brief Macro getting pointer to the structure of registers of the TIMER peripheral.
52 *
53 * @param[in] idx TIMER instance index.
54 *
55 * @return Pointer to the structure of registers of the TIMER peripheral.
56 */
57 #define NRF_TIMER_INST_GET(idx) NRFX_CONCAT(NRF_, TIMER, idx)
58
59 #if defined(TIMER_INTENSET_COMPARE4_Msk) || defined(__NRFX_DOXYGEN__)
60 /** @brief Symbol indicating whether timer has capture/compare channel 4. */
61 #define NRF_TIMER_HAS_CC4 1
62 #else
63 #define NRF_TIMER_HAS_CC4 0
64 #endif
65
66 #if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
67 /** @brief Symbol indicating whether timer has capture/compare channel 5. */
68 #define NRF_TIMER_HAS_CC5 1
69 #else
70 #define NRF_TIMER_HAS_CC5 0
71 #endif
72
73 #if defined(TIMER_INTENSET_COMPARE6_Msk) || defined(__NRFX_DOXYGEN__)
74 /** @brief Symbol indicating whether timer has capture/compare channel 6. */
75 #define NRF_TIMER_HAS_CC6 1
76 #else
77 #define NRF_TIMER_HAS_CC6 0
78 #endif
79
80 #if defined(TIMER_INTENSET_COMPARE7_Msk) || defined(__NRFX_DOXYGEN__)
81 /** @brief Symbol indicating whether timer has capture/compare channel 7. */
82 #define NRF_TIMER_HAS_CC7 1
83 #else
84 #define NRF_TIMER_HAS_CC7 0
85 #endif
86
87 #if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__NRFX_DOXYGEN__)
88 /** @brief Symbol indicating whether timer supports low power mode. */
89 #define NRF_TIMER_HAS_LOW_POWER_MODE 1
90 #else
91 #define NRF_TIMER_HAS_LOW_POWER_MODE 0
92 #endif
93
94 #if defined(TIMER_ONESHOTEN_ONESHOTEN_Msk) || defined(__NRFX_DOXYGEN__)
95 /** @brief Symbol indicating whether timer supports one-shot operation. */
96 #define NRF_TIMER_HAS_ONE_SHOT 1
97 #else
98 #define NRF_TIMER_HAS_ONE_SHOT 0
99 #endif
100
101 #if defined(TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk) || defined(__NRFX_DOXYGEN__)
102 /** @brief Symbol indicating whether timer supports shutdown task. */
103 #define NRF_TIMER_HAS_SHUTDOWN 1
104 #else
105 #define NRF_TIMER_HAS_SHUTDOWN 0
106 #endif
107
108 /** @brief Base frequency value 320 MHz for TIMER. */
109 #define NRF_TIMER_BASE_FREQUENCY_320MHZ (NRFX_MHZ_TO_HZ(320UL))
110 /** @brief Base frequency value 256 MHz for TIMER. */
111 #define NRF_TIMER_BASE_FREQUENCY_256MHZ (NRFX_MHZ_TO_HZ(256UL))
112 /** @brief Base frequency value 128 MHz for TIMER. */
113 #define NRF_TIMER_BASE_FREQUENCY_128MHZ (NRFX_MHZ_TO_HZ(128UL))
114 /** @brief Base frequency value 64 MHz for TIMER. */
115 #define NRF_TIMER_BASE_FREQUENCY_64MHZ (NRFX_MHZ_TO_HZ(64UL))
116 /** @brief Base frequency value 32 MHz for TIMER. */
117 #define NRF_TIMER_BASE_FREQUENCY_32MHZ (NRFX_MHZ_TO_HZ(32UL))
118 /** @brief Base frequency value 16 MHz for TIMER. */
119 #define NRF_TIMER_BASE_FREQUENCY_16MHZ (NRFX_MHZ_TO_HZ(16UL))
120
121 #if defined(TIMER_PRESCALER_PRESCALER_Max) || defined(__NRFX_DOXYGEN__)
122 /** @brief Maximum value of PRESCALER register. */
123 #define NRF_TIMER_PRESCALER_MAX TIMER_PRESCALER_PRESCALER_Max
124 #else
125 #define NRF_TIMER_PRESCALER_MAX 9
126 #endif
127
128 /**
129 * @brief Macro for getting the maximum bit resolution of the specified timer instance.
130 *
131 * @param[in] id Index of the specified timer instance.
132 *
133 * @retval Maximum bit resolution of the specified timer instance.
134 */
135 #define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
136
137 /**
138 * @brief Macro for validating the correctness of the bit width resolution setting.
139 *
140 * @param[in] id Index of the specified timer instance.
141 * @param[in] bit_width Bit width resolution value to be checked.
142 *
143 * @retval true Timer instance supports the specified bit width resolution value.
144 * @retval false Timer instance does not support the specified bit width resolution value.
145 */
146 #define TIMER_BIT_WIDTH_MAX(id, bit_width) \
147 (TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
148 (TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
149 (bit_width == NRF_TIMER_BIT_WIDTH_16) : \
150 (TIMER_MAX_SIZE(id) == 24 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
151 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
152 (bit_width == NRF_TIMER_BIT_WIDTH_24) : \
153 (TIMER_MAX_SIZE(id) == 32 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
154 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
155 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
156 (bit_width == NRF_TIMER_BIT_WIDTH_32) : \
157 false))))
158
159 /**
160 * @brief Macro for checking correctness of bit width configuration for the specified timer.
161 *
162 * @param[in] p_reg Timer instance register.
163 * @param[in] bit_width Bit width resolution value to be checked.
164 *
165 * @retval true Timer instance supports the specified bit width resolution value.
166 * @retval false Timer instance does not support the specified bit width resolution value.
167 */
168 #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) \
169 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER0), \
170 (((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width))), (false)) || \
171 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER1), \
172 (((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width))), (false)) || \
173 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER2), \
174 (((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width))), (false)) || \
175 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER3), \
176 (((p_reg == NRF_TIMER3) && TIMER_BIT_WIDTH_MAX(3, bit_width))), (false)) || \
177 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER4), \
178 (((p_reg == NRF_TIMER4) && TIMER_BIT_WIDTH_MAX(4, bit_width))), (false)) || \
179 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), \
180 (((p_reg == NRF_TIMER00) && TIMER_BIT_WIDTH_MAX(00, bit_width))), (false)) || \
181 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER10), \
182 (((p_reg == NRF_TIMER10) && TIMER_BIT_WIDTH_MAX(10, bit_width))), (false)) || \
183 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER20), \
184 (((p_reg == NRF_TIMER20) && TIMER_BIT_WIDTH_MAX(20, bit_width))), (false)) || \
185 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER21), \
186 (((p_reg == NRF_TIMER21) && TIMER_BIT_WIDTH_MAX(21, bit_width))), (false)) || \
187 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER22), \
188 (((p_reg == NRF_TIMER22) && TIMER_BIT_WIDTH_MAX(22, bit_width))), (false)) || \
189 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER23), \
190 (((p_reg == NRF_TIMER23) && TIMER_BIT_WIDTH_MAX(23, bit_width))), (false)) || \
191 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER24), \
192 (((p_reg == NRF_TIMER24) && TIMER_BIT_WIDTH_MAX(24, bit_width))), (false)) || \
193 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER020), \
194 (((p_reg == NRF_TIMER020) && TIMER_BIT_WIDTH_MAX(020, bit_width))), (false)) || \
195 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER021), \
196 (((p_reg == NRF_TIMER021) && TIMER_BIT_WIDTH_MAX(021, bit_width))), (false)) || \
197 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER022), \
198 (((p_reg == NRF_TIMER022) && TIMER_BIT_WIDTH_MAX(022, bit_width))), (false)) || \
199 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER120), \
200 (((p_reg == NRF_TIMER120) && TIMER_BIT_WIDTH_MAX(120, bit_width))), (false)) || \
201 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER121), \
202 (((p_reg == NRF_TIMER121) && TIMER_BIT_WIDTH_MAX(121, bit_width))), (false)) || \
203 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER130), \
204 (((p_reg == NRF_TIMER130) && TIMER_BIT_WIDTH_MAX(130, bit_width))), (false)) || \
205 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER131), \
206 (((p_reg == NRF_TIMER131) && TIMER_BIT_WIDTH_MAX(131, bit_width))), (false)) || \
207 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER132), \
208 (((p_reg == NRF_TIMER132) && TIMER_BIT_WIDTH_MAX(132, bit_width))), (false)) || \
209 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER133), \
210 (((p_reg == NRF_TIMER133) && TIMER_BIT_WIDTH_MAX(133, bit_width))), (false)) || \
211 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER134), \
212 (((p_reg == NRF_TIMER134) && TIMER_BIT_WIDTH_MAX(134, bit_width))), (false)) || \
213 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER135), \
214 (((p_reg == NRF_TIMER135) && TIMER_BIT_WIDTH_MAX(135, bit_width))), (false)) || \
215 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER136), \
216 (((p_reg == NRF_TIMER136) && TIMER_BIT_WIDTH_MAX(136, bit_width))), (false)) || \
217 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER137), \
218 (((p_reg == NRF_TIMER137) && TIMER_BIT_WIDTH_MAX(137, bit_width))), (false)))
219
220 #if !defined(NRF_TIMER_IS_320MHZ_TIMER)
221 /** @brief Macro for checking whether the base frequency for the specified timer is 320 MHz. */
222 #define NRF_TIMER_IS_320MHZ_TIMER(p_reg) \
223 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER120), (p_reg == NRF_TIMER120), (false)) || \
224 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER121), (p_reg == NRF_TIMER121), (false)))
225 #endif
226
227 #if !defined(NRF_TIMER_IS_256MHZ_TIMER)
228 /** @brief Macro for checking whether the base frequency for the specified timer is 256 MHz. */
229 #define NRF_TIMER_IS_256MHZ_TIMER(p_reg) \
230 (NRFX_COND_CODE_1(NRFX_IS_ENABLED(NRF_CPU_FREQ_IS_256MHZ), \
231 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), (p_reg == NRF_TIMER00), (false))), \
232 (false)))
233 #endif
234
235 #if !defined(NRF_TIMER_IS_128MHZ_TIMER)
236 /** @brief Macro for checking whether the base frequency for the specified timer is 128 MHz. */
237 #define NRF_TIMER_IS_128MHZ_TIMER(p_reg) \
238 (NRFX_COND_CODE_1(NRFX_IS_ENABLED(NRF_CPU_FREQ_IS_128MHZ), \
239 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), (p_reg == NRF_TIMER00), (false))), \
240 (false)))
241 #endif
242
243 #if !defined(NRF_TIMER_IS_64MHZ_TIMER)
244 /** @brief Macro for checking whether the base frequency for the specified timer is 64 MHz. */
245 #define NRF_TIMER_IS_64MHZ_TIMER(p_reg) \
246 (NRFX_COND_CODE_1(NRFX_IS_ENABLED(NRF_CPU_FREQ_IS_64MHZ), \
247 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER00), (p_reg == NRF_TIMER00), (false))), \
248 (false)))
249 #endif
250
251 #if !defined(NRF_TIMER_IS_32MHZ_TIMER)
252 /** @brief Macro for checking whether the base frequency for the specified timer is 32 MHz. */
253 #define NRF_TIMER_IS_32MHZ_TIMER(p_reg) \
254 (NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER020), (p_reg == NRF_TIMER020), (false)) || \
255 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER021), (p_reg == NRF_TIMER021), (false)) || \
256 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER022), (p_reg == NRF_TIMER022), (false)) || \
257 NRFX_COND_CODE_1(NRFX_INSTANCE_PRESENT(TIMER10), (p_reg == NRF_TIMER10), (false)))
258 #endif
259
260 /**
261 * @brief Macro for getting base frequency value in Hz for the specified timer.
262 *
263 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
264 */
265 #define NRF_TIMER_BASE_FREQUENCY_GET(p_reg) \
266 ((NRF_TIMER_IS_320MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_320MHZ): \
267 ((NRF_TIMER_IS_256MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_256MHZ): \
268 ((NRF_TIMER_IS_128MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_128MHZ): \
269 ((NRF_TIMER_IS_64MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_64MHZ) : \
270 ((NRF_TIMER_IS_32MHZ_TIMER(p_reg)) ? (NRF_TIMER_BASE_FREQUENCY_32MHZ) : \
271 (NRF_TIMER_BASE_FREQUENCY_16MHZ))))))
272
273 /**
274 * @brief Macro for computing prescaler value for given base frequency and desired frequency.
275 *
276 * @warning Not every combination of base frequency and desired frequency is supported.
277 *
278 * @param[in] base_freq Base clock frequency for timer in Hz.
279 * @param[in] frequency Desired frequency value in Hz.
280 */
281 #define NRF_TIMER_PRESCALER_CALCULATE(base_freq, frequency) \
282 NRF_CTZ((uint32_t)(base_freq) / (uint32_t)(frequency))
283
284 /**
285 * @brief Macro for checking whether specified frequency can be achived for given timer instance.
286 *
287 * @note Macro is using compile time assertion.
288 *
289 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
290 * @param[in] frequency Desired frequency value in Hz.
291 */
292 #define NRF_TIMER_FREQUENCY_STATIC_CHECK(p_reg, frequency) \
293 NRFX_STATIC_ASSERT( \
294 (NRF_TIMER_BASE_FREQUENCY_GET(p_reg) == frequency) || \
295 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) % frequency == 0) && \
296 NRFX_IS_POWER_OF_TWO(NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / (uint32_t)frequency) && \
297 ((NRF_TIMER_BASE_FREQUENCY_GET(p_reg) / frequency) <= (1 << NRF_TIMER_PRESCALER_MAX))))
298
299 /**
300 * @brief Macro for getting the number of capture/compare channels available
301 * in a given timer instance.
302 *
303 * @param[in] id Index of the specified timer instance.
304 */
305 #define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
306
307 /** @brief Symbol specifying maximum number of available compare channels. */
308 #define NRF_TIMER_CC_COUNT_MAX NRFX_ARRAY_SIZE(((NRF_TIMER_Type*)0)->EVENTS_COMPARE)
309
310 /** @brief Symbol for creating the interrupt bitmask for all compare channels. */
311 #define NRF_TIMER_ALL_CHANNELS_INT_MASK \
312 ((uint32_t)((1 << NRF_TIMER_CC_COUNT_MAX) - 1) << TIMER_INTENSET_COMPARE0_Pos)
313
314 /** @brief Timer tasks. */
315 typedef enum
316 {
317 NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
318 NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
319 NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
320 NRF_TIMER_TASK_CLEAR = offsetof(NRF_TIMER_Type, TASKS_CLEAR), ///< Task for resetting the timer value.
321 #if NRF_TIMER_HAS_SHUTDOWN
322 NRF_TIMER_TASK_SHUTDOWN = offsetof(NRF_TIMER_Type, TASKS_SHUTDOWN), ///< Task for powering off the timer.
323 #endif
324 NRF_TIMER_TASK_CAPTURE0 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[0]), ///< Task for capturing the timer value on channel 0.
325 NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
326 NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
327 NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
328 #if NRF_TIMER_HAS_CC4
329 NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
330 #endif
331 #if NRF_TIMER_HAS_CC5
332 NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
333 #endif
334 #if NRF_TIMER_HAS_CC6
335 NRF_TIMER_TASK_CAPTURE6 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[6]), ///< Task for capturing the timer value on channel 6.
336 #endif
337 #if NRF_TIMER_HAS_CC7
338 NRF_TIMER_TASK_CAPTURE7 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[7]), ///< Task for capturing the timer value on channel 7.
339 #endif
340 } nrf_timer_task_t;
341
342 /** @brief Timer events. */
343 typedef enum
344 {
345 NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
346 NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
347 NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
348 NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
349 #if NRF_TIMER_HAS_CC4
350 NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
351 #endif
352 #if NRF_TIMER_HAS_CC5
353 NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
354 #endif
355 #if NRF_TIMER_HAS_CC6
356 NRF_TIMER_EVENT_COMPARE6 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[6]), ///< Event from compare channel 6.
357 #endif
358 #if NRF_TIMER_HAS_CC7
359 NRF_TIMER_EVENT_COMPARE7 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[7]), ///< Event from compare channel 7.
360 #endif
361 } nrf_timer_event_t;
362
363 /** @brief Types of timer shortcuts. */
364 typedef enum
365 {
366 NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
367 NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk, ///< Shortcut for stopping the timer based on compare 1.
368 NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk, ///< Shortcut for stopping the timer based on compare 2.
369 NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk, ///< Shortcut for stopping the timer based on compare 3.
370 #if NRF_TIMER_HAS_CC4
371 NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk, ///< Shortcut for stopping the timer based on compare 4.
372 #endif
373 #if NRF_TIMER_HAS_CC5
374 NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk, ///< Shortcut for stopping the timer based on compare 5.
375 #endif
376 #if NRF_TIMER_HAS_CC6
377 NRF_TIMER_SHORT_COMPARE6_STOP_MASK = TIMER_SHORTS_COMPARE6_STOP_Msk, ///< Shortcut for stopping the timer based on compare 6.
378 #endif
379 #if NRF_TIMER_HAS_CC7
380 NRF_TIMER_SHORT_COMPARE7_STOP_MASK = TIMER_SHORTS_COMPARE7_STOP_Msk, ///< Shortcut for stopping the timer based on compare 7.
381 #endif
382 NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK = TIMER_SHORTS_COMPARE0_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 0.
383 NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
384 NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
385 NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
386 #if NRF_TIMER_HAS_CC4
387 NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
388 #endif
389 #if NRF_TIMER_HAS_CC5
390 NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
391 #endif
392 #if NRF_TIMER_HAS_CC6
393 NRF_TIMER_SHORT_COMPARE6_CLEAR_MASK = TIMER_SHORTS_COMPARE6_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 6.
394 #endif
395 #if NRF_TIMER_HAS_CC7
396 NRF_TIMER_SHORT_COMPARE7_CLEAR_MASK = TIMER_SHORTS_COMPARE7_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 7.
397 #endif
398 } nrf_timer_short_mask_t;
399
400 /** @brief Timer modes. */
401 typedef enum
402 {
403 NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
404 NRF_TIMER_MODE_COUNTER = TIMER_MODE_MODE_Counter, ///< Timer mode: counter.
405 #if NRF_TIMER_HAS_LOW_POWER_MODE
406 NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
407 #endif
408 } nrf_timer_mode_t;
409
410 /** @brief Timer bit width. */
411 typedef enum
412 {
413 NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
414 NRF_TIMER_BIT_WIDTH_16 = TIMER_BITMODE_BITMODE_16Bit, ///< Timer bit width 16 bit.
415 NRF_TIMER_BIT_WIDTH_24 = TIMER_BITMODE_BITMODE_24Bit, ///< Timer bit width 24 bit.
416 NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
417 } nrf_timer_bit_width_t;
418
419 /** @brief Timer prescalers. */
420 typedef enum
421 {
422 NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
423 NRF_TIMER_FREQ_8MHz, ///< Timer frequency 8 MHz.
424 NRF_TIMER_FREQ_4MHz, ///< Timer frequency 4 MHz.
425 NRF_TIMER_FREQ_2MHz, ///< Timer frequency 2 MHz.
426 NRF_TIMER_FREQ_1MHz, ///< Timer frequency 1 MHz.
427 NRF_TIMER_FREQ_500kHz, ///< Timer frequency 500 kHz.
428 NRF_TIMER_FREQ_250kHz, ///< Timer frequency 250 kHz.
429 NRF_TIMER_FREQ_125kHz, ///< Timer frequency 125 kHz.
430 NRF_TIMER_FREQ_62500Hz, ///< Timer frequency 62500 Hz.
431 NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
432 } nrf_timer_frequency_t;
433
434 /** @brief Timer capture/compare channels. */
435 typedef enum
436 {
437 NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
438 NRF_TIMER_CC_CHANNEL1, ///< Timer capture/compare channel 1.
439 NRF_TIMER_CC_CHANNEL2, ///< Timer capture/compare channel 2.
440 NRF_TIMER_CC_CHANNEL3, ///< Timer capture/compare channel 3.
441 #if NRF_TIMER_HAS_CC4
442 NRF_TIMER_CC_CHANNEL4, ///< Timer capture/compare channel 4.
443 #endif
444 #if NRF_TIMER_HAS_CC5
445 NRF_TIMER_CC_CHANNEL5, ///< Timer capture/compare channel 5.
446 #endif
447 #if NRF_TIMER_HAS_CC6
448 NRF_TIMER_CC_CHANNEL6, ///< Timer capture/compare channel 6.
449 #endif
450 #if NRF_TIMER_HAS_CC7
451 NRF_TIMER_CC_CHANNEL7, ///< Timer capture/compare channel 7.
452 #endif
453 } nrf_timer_cc_channel_t;
454
455 /** @brief Timer interrupts. */
456 typedef enum
457 {
458 NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
459 NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
460 NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
461 NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
462 #if NRF_TIMER_HAS_CC4
463 NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
464 #endif
465 #if NRF_TIMER_HAS_CC5
466 NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
467 #endif
468 #if NRF_TIMER_HAS_CC6
469 NRF_TIMER_INT_COMPARE6_MASK = TIMER_INTENSET_COMPARE6_Msk, ///< Timer interrupt from compare event on channel 6.
470 #endif
471 #if NRF_TIMER_HAS_CC7
472 NRF_TIMER_INT_COMPARE7_MASK = TIMER_INTENSET_COMPARE7_Msk, ///< Timer interrupt from compare event on channel 7.
473 #endif
474 } nrf_timer_int_mask_t;
475
476
477 /**
478 * @brief Function for setting the prescaler factor.
479 *
480 * @note Prescaler value is expressed as \f$ 2^{prescaler\_factor} \f$.
481 *
482 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
483 * @param[in] prescaler_factor Prescaler factor.
484 */
485 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor);
486
487 /**
488 * @brief Function for retrieving the prescaler factor.
489 *
490 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
491 *
492 * @return Prescaler factor.
493 */
494 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg);
495
496 /**
497 * @brief Function for activating the specified timer task.
498 *
499 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
500 * @param[in] task Task to be activated.
501 */
502 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
503 nrf_timer_task_t task);
504
505 /**
506 * @brief Function for getting the address of the specified timer task register.
507 *
508 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
509 * @param[in] task The specified task.
510 *
511 * @return Address of the specified task register.
512 */
513 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
514 nrf_timer_task_t task);
515
516 /**
517 * @brief Function for clearing the specified timer event.
518 *
519 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
520 * @param[in] event Event to clear.
521 */
522 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
523 nrf_timer_event_t event);
524
525 /**
526 * @brief Function for retrieving the state of the TIMER event.
527 *
528 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
529 * @param[in] event Event to be checked.
530 *
531 * @retval true The event has been generated.
532 * @retval false The event has not been generated.
533 */
534 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
535 nrf_timer_event_t event);
536
537 /**
538 * @brief Function for getting the address of the specified timer event register.
539 *
540 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
541 * @param[in] event The specified event.
542 *
543 * @return Address of the specified event register.
544 */
545 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
546 nrf_timer_event_t event);
547
548 /**
549 * @brief Function for enabling the specified shortcuts.
550 *
551 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
552 * @param[in] mask Shortcuts to be enabled.
553 */
554 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
555 uint32_t mask);
556
557 /**
558 * @brief Function for disabling the specified shortcuts.
559 *
560 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
561 * @param[in] mask Shortcuts to be disabled.
562 */
563 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
564 uint32_t mask);
565
566 /**
567 * @brief Function for setting the specified shortcuts.
568 *
569 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
570 * @param[in] mask Shortcuts to be set.
571 */
572 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
573 uint32_t mask);
574
575 /**
576 * @brief Function for getting COMPARE_CLEAR short mask for the specified channel.
577 *
578 * @param[in] channel Channel.
579 *
580 * @return Short mask.
581 */
582 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel);
583
584 /**
585 * @brief Function for getting COMPARE_STOP short mask for the specified channel.
586 *
587 * @param[in] channel Channel.
588 *
589 * @return Short mask.
590 */
591 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel);
592
593 /**
594 * @brief Function for enabling the specified interrupts.
595 *
596 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
597 * @param[in] mask Mask of interrupts to be enabled.
598 * Use @ref nrf_timer_int_mask_t values for bit masking.
599 */
600 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
601 uint32_t mask);
602
603 /**
604 * @brief Function for disabling the specified interrupts.
605 *
606 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
607 * @param[in] mask Mask of interrupts to be disabled.
608 * Use @ref nrf_timer_int_mask_t values for bit masking.
609 */
610 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
611 uint32_t mask);
612
613 /**
614 * @brief Function for checking if the specified interrupts are enabled.
615 *
616 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
617 * @param[in] mask Mask of interrupts to be checked.
618 * Use @ref nrf_timer_int_mask_t values for bit masking.
619 *
620 * @return Mask of enabled interrupts.
621 */
622 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask);
623
624 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
625 /**
626 * @brief Function for setting the subscribe configuration for a given
627 * TIMER task.
628 *
629 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
630 * @param[in] task Task for which to set the configuration.
631 * @param[in] channel Channel through which to subscribe events.
632 */
633 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
634 nrf_timer_task_t task,
635 uint8_t channel);
636
637 /**
638 * @brief Function for clearing the subscribe configuration for a given
639 * TIMER task.
640 *
641 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
642 * @param[in] task Task for which to clear the configuration.
643 */
644 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
645 nrf_timer_task_t task);
646
647 /**
648 * @brief Function for setting the publish configuration for a given
649 * TIMER event.
650 *
651 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
652 * @param[in] event Event for which to set the configuration.
653 * @param[in] channel Channel through which to publish the event.
654 */
655 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
656 nrf_timer_event_t event,
657 uint8_t channel);
658
659 /**
660 * @brief Function for clearing the publish configuration for a given
661 * TIMER event.
662 *
663 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
664 * @param[in] event Event for which to clear the configuration.
665 */
666 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
667 nrf_timer_event_t event);
668 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
669
670 /**
671 * @brief Function for setting the timer mode.
672 *
673 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
674 * @param[in] mode Timer mode.
675 */
676 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
677 nrf_timer_mode_t mode);
678
679 /**
680 * @brief Function for retrieving the timer mode.
681 *
682 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
683 *
684 * @return Timer mode.
685 */
686 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg);
687
688 /**
689 * @brief Function for setting the timer bit width.
690 *
691 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
692 * @param[in] bit_width Timer bit width.
693 */
694 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
695 nrf_timer_bit_width_t bit_width);
696
697 /**
698 * @brief Function for retrieving the timer bit width.
699 *
700 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
701 *
702 * @return Timer bit width.
703 */
704 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg);
705
706 /**
707 * @brief Function for setting the capture/compare register for the specified channel.
708 *
709 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
710 * @param[in] cc_channel The specified capture/compare channel.
711 * @param[in] cc_value Value to write to the capture/compare register.
712 */
713 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
714 nrf_timer_cc_channel_t cc_channel,
715 uint32_t cc_value);
716
717 /**
718 * @brief Function for retrieving the capture/compare value for a specified channel.
719 *
720 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
721 * @param[in] cc_channel The specified capture/compare channel.
722 *
723 * @return Value from the specified capture/compare register.
724 */
725 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
726 nrf_timer_cc_channel_t cc_channel);
727
728 /**
729 * @brief Function for getting the specified timer capture task.
730 *
731 * @param[in] channel Capture channel.
732 *
733 * @return Capture task.
734 */
735 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel);
736
737 /**
738 * @brief Function for getting the specified timer compare event.
739 *
740 * @param[in] channel Compare channel.
741 *
742 * @return Compare event.
743 */
744 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel);
745
746 /**
747 * @brief Function for getting the specified timer compare interrupt.
748 *
749 * @param[in] channel Compare channel.
750 *
751 * @return Compare interrupt.
752 */
753 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel);
754
755 /**
756 * @brief Function for calculating the number of timer ticks for a given time
757 * (in microseconds) and timer frequency.
758 *
759 * @param[in] time_us Time in microseconds.
760 * @param[in] frequency Timer frequency.
761 *
762 * @return Number of timer ticks.
763 */
764 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
765 nrf_timer_frequency_t frequency);
766
767 /**
768 * @brief Function for calculating the number of timer ticks for a given time
769 * (in milliseconds) and timer frequency.
770 *
771 * @param[in] time_ms Time in milliseconds.
772 * @param[in] frequency Timer frequency.
773 *
774 * @return Number of timer ticks.
775 */
776 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
777 nrf_timer_frequency_t frequency);
778
779 #if NRF_TIMER_HAS_ONE_SHOT
780 /**
781 * @brief Function for enabling one-shot operation for the specified capture/compare channel.
782 *
783 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
784 * @param[in] cc_channel Capture/compare channel.
785 */
786 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
787 nrf_timer_cc_channel_t cc_channel);
788
789 /**
790 * @brief Function for disabling one-shot operation for the specified capture/compare channel.
791 *
792 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
793 * @param[in] cc_channel Capture/compare channel.
794 */
795 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
796 nrf_timer_cc_channel_t cc_channel);
797
798 #endif // NRF_TIMER_HAS_ONE_SHOT
799
800 #ifndef NRF_DECLARE_ONLY
801
nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)802 NRF_STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
803 nrf_timer_task_t task)
804 {
805 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
806 }
807
nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_task_t task)808 NRF_STATIC_INLINE uint32_t nrf_timer_task_address_get(NRF_TIMER_Type const * p_reg,
809 nrf_timer_task_t task)
810 {
811 return nrf_task_event_address_get(p_reg, task);
812 }
813
nrf_timer_event_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)814 NRF_STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
815 nrf_timer_event_t event)
816 {
817 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
818 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
819 }
820
nrf_timer_event_check(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)821 NRF_STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type const * p_reg,
822 nrf_timer_event_t event)
823 {
824 return nrf_event_check(p_reg, event);
825 }
826
nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,nrf_timer_event_t event)827 NRF_STATIC_INLINE uint32_t nrf_timer_event_address_get(NRF_TIMER_Type const * p_reg,
828 nrf_timer_event_t event)
829 {
830 return nrf_task_event_address_get(p_reg, event);
831 }
832
nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,uint32_t mask)833 NRF_STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
834 uint32_t mask)
835 {
836 p_reg->SHORTS |= mask;
837 }
838
nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,uint32_t mask)839 NRF_STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
840 uint32_t mask)
841 {
842 p_reg->SHORTS &= ~(mask);
843 }
844
nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,uint32_t mask)845 NRF_STATIC_INLINE void nrf_timer_shorts_set(NRF_TIMER_Type * p_reg,
846 uint32_t mask)
847 {
848 p_reg->SHORTS = mask;
849 }
850
nrf_timer_short_compare_clear_get(uint8_t channel)851 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_clear_get(uint8_t channel)
852 {
853 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK << channel);
854 }
855
nrf_timer_short_compare_stop_get(uint8_t channel)856 NRF_STATIC_INLINE nrf_timer_short_mask_t nrf_timer_short_compare_stop_get(uint8_t channel)
857 {
858 return (nrf_timer_short_mask_t)((uint32_t)NRF_TIMER_SHORT_COMPARE0_STOP_MASK << channel);
859 }
860
nrf_timer_int_enable(NRF_TIMER_Type * p_reg,uint32_t mask)861 NRF_STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
862 uint32_t mask)
863 {
864 p_reg->INTENSET = mask;
865 }
866
nrf_timer_int_disable(NRF_TIMER_Type * p_reg,uint32_t mask)867 NRF_STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
868 uint32_t mask)
869 {
870 p_reg->INTENCLR = mask;
871 }
872
nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg,uint32_t mask)873 NRF_STATIC_INLINE uint32_t nrf_timer_int_enable_check(NRF_TIMER_Type const * p_reg, uint32_t mask)
874 {
875 return p_reg->INTENSET & mask;
876 }
877
878 #if defined(DPPI_PRESENT)
nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,nrf_timer_task_t task,uint8_t channel)879 NRF_STATIC_INLINE void nrf_timer_subscribe_set(NRF_TIMER_Type * p_reg,
880 nrf_timer_task_t task,
881 uint8_t channel)
882 {
883 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
884 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
885 }
886
nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,nrf_timer_task_t task)887 NRF_STATIC_INLINE void nrf_timer_subscribe_clear(NRF_TIMER_Type * p_reg,
888 nrf_timer_task_t task)
889 {
890 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
891 }
892
nrf_timer_publish_set(NRF_TIMER_Type * p_reg,nrf_timer_event_t event,uint8_t channel)893 NRF_STATIC_INLINE void nrf_timer_publish_set(NRF_TIMER_Type * p_reg,
894 nrf_timer_event_t event,
895 uint8_t channel)
896 {
897 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
898 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
899 }
900
nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,nrf_timer_event_t event)901 NRF_STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
902 nrf_timer_event_t event)
903 {
904 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
905 }
906 #endif // defined(DPPI_PRESENT)
907
nrf_timer_mode_set(NRF_TIMER_Type * p_reg,nrf_timer_mode_t mode)908 NRF_STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
909 nrf_timer_mode_t mode)
910 {
911 p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
912 ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
913 }
914
nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)915 NRF_STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type const * p_reg)
916 {
917 return (nrf_timer_mode_t)(p_reg->MODE);
918 }
919
nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,nrf_timer_bit_width_t bit_width)920 NRF_STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
921 nrf_timer_bit_width_t bit_width)
922 {
923 p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
924 ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
925 TIMER_BITMODE_BITMODE_Msk);
926 }
927
nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)928 NRF_STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type const * p_reg)
929 {
930 return (nrf_timer_bit_width_t)(p_reg->BITMODE);
931 }
932
nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg,uint32_t prescaler_factor)933 NRF_STATIC_INLINE void nrf_timer_prescaler_set(NRF_TIMER_Type * p_reg, uint32_t prescaler_factor)
934 {
935 NRFX_ASSERT(prescaler_factor <= NRF_TIMER_PRESCALER_MAX);
936 p_reg->PRESCALER = prescaler_factor;
937 }
938
nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)939 NRF_STATIC_INLINE uint32_t nrf_timer_prescaler_get(NRF_TIMER_Type const * p_reg)
940 {
941 return p_reg->PRESCALER;
942 }
943
nrf_timer_cc_set(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value)944 NRF_STATIC_INLINE void nrf_timer_cc_set(NRF_TIMER_Type * p_reg,
945 nrf_timer_cc_channel_t cc_channel,
946 uint32_t cc_value)
947 {
948 p_reg->CC[cc_channel] = cc_value;
949 }
950
nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,nrf_timer_cc_channel_t cc_channel)951 NRF_STATIC_INLINE uint32_t nrf_timer_cc_get(NRF_TIMER_Type const * p_reg,
952 nrf_timer_cc_channel_t cc_channel)
953 {
954 return (uint32_t)p_reg->CC[cc_channel];
955 }
956
nrf_timer_capture_task_get(uint8_t channel)957 NRF_STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint8_t channel)
958 {
959 return (nrf_timer_task_t)NRFX_OFFSETOF(NRF_TIMER_Type, TASKS_CAPTURE[channel]);
960 }
961
nrf_timer_compare_event_get(uint8_t channel)962 NRF_STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint8_t channel)
963 {
964 return (nrf_timer_event_t)NRFX_OFFSETOF(NRF_TIMER_Type, EVENTS_COMPARE[channel]);
965 }
966
nrf_timer_compare_int_get(uint8_t channel)967 NRF_STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint8_t channel)
968 {
969 return (nrf_timer_int_mask_t)
970 ((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << channel);
971 }
972
nrf_timer_us_to_ticks(uint32_t time_us,nrf_timer_frequency_t frequency)973 NRF_STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
974 nrf_timer_frequency_t frequency)
975 {
976 // The "frequency" parameter here is actually the prescaler value, and the
977 // timer runs at the following frequency: f = 16 MHz / 2^prescaler.
978 uint32_t prescaler = (uint32_t)frequency;
979 uint64_t ticks = ((time_us * 16ULL) >> prescaler);
980 NRFX_ASSERT(ticks <= UINT32_MAX);
981 return (uint32_t)ticks;
982 }
983
nrf_timer_ms_to_ticks(uint32_t time_ms,nrf_timer_frequency_t frequency)984 NRF_STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
985 nrf_timer_frequency_t frequency)
986 {
987 // The "frequency" parameter here is actually the prescaler value, and the
988 // timer runs at the following frequency: f = 16000 kHz / 2^prescaler.
989 uint32_t prescaler = (uint32_t)frequency;
990 uint64_t ticks = ((time_ms * 16000ULL) >> prescaler);
991 NRFX_ASSERT(ticks <= UINT32_MAX);
992 return (uint32_t)ticks;
993 }
994
995 #if NRF_TIMER_HAS_ONE_SHOT
nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)996 NRF_STATIC_INLINE void nrf_timer_one_shot_enable(NRF_TIMER_Type * p_reg,
997 nrf_timer_cc_channel_t cc_channel)
998 {
999 p_reg->ONESHOTEN[cc_channel] = TIMER_ONESHOTEN_ONESHOTEN_Msk;
1000 }
1001
nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,nrf_timer_cc_channel_t cc_channel)1002 NRF_STATIC_INLINE void nrf_timer_one_shot_disable(NRF_TIMER_Type * p_reg,
1003 nrf_timer_cc_channel_t cc_channel)
1004 {
1005 p_reg->ONESHOTEN[cc_channel] = 0;
1006 }
1007 #endif // NRF_TIMER_HAS_ONE_SHOT
1008
1009 #endif // NRF_DECLARE_ONLY
1010
1011 /** @} */
1012
1013 #ifdef __cplusplus
1014 }
1015 #endif
1016
1017 #endif // NRF_TIMER_H__
1018
