1 /**
2 *
3 * \file
4 *
5 * \brief This module contains NMC1000 bus APIs implementation.
6 *
7 * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
8 *
9 * \asf_license_start
10 *
11 * \page License
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions are met:
15 *
16 * 1. Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above copyright notice,
20 * this list of conditions and the following disclaimer in the documentation
21 * and/or other materials provided with the distribution.
22 *
23 * 3. The name of Atmel may not be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
29 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 *
38 * \asf_license_stop
39 *
40 */
41 #ifndef CORTUS_APP
42
43 #include "nmbus.h"
44 #include "nmi2c.h"
45 #include "nmspi.h"
46 #include "nmuart.h"
47
48 #define MAX_TRX_CFG_SZ 8
49
50 /**
51 * @fn nm_bus_iface_init
52 * @brief Initialize bus interface
53 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
54 * @author M. Abdelmawla
55 * @date 11 July 2012
56 * @version 1.0
57 */
nm_bus_iface_init(void * pvInitVal)58 sint8 nm_bus_iface_init(void *pvInitVal)
59 {
60 sint8 ret = M2M_SUCCESS;
61 ret = nm_bus_init(pvInitVal);
62 return ret;
63 }
64
65 /**
66 * @fn nm_bus_iface_deinit
67 * @brief Deinitialize bus interface
68 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
69 * @author Samer Sarhan
70 * @date 07 April 2014
71 * @version 1.0
72 */
nm_bus_iface_deinit(void)73 sint8 nm_bus_iface_deinit(void)
74 {
75 sint8 ret = M2M_SUCCESS;
76 ret = nm_bus_deinit();
77
78 return ret;
79 }
80
81 /**
82 * @fn nm_bus_reset
83 * @brief reset bus interface
84 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
85 * @version 1.0
86 */
nm_bus_reset(void)87 sint8 nm_bus_reset(void)
88 {
89 sint8 ret = M2M_SUCCESS;
90 #ifdef CONF_WINC_USE_UART
91 #elif defined (CONF_WINC_USE_SPI)
92 return nm_spi_reset();
93 #elif defined (CONF_WINC_USE_I2C)
94 #else
95 #error "Plesae define bus usage"
96 #endif
97
98 return ret;
99 }
100
101 /**
102 * @fn nm_bus_iface_reconfigure
103 * @brief reconfigure bus interface
104 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
105 * @author Viswanathan Murugesan
106 * @date 22 Oct 2014
107 * @version 1.0
108 */
nm_bus_iface_reconfigure(void * ptr)109 sint8 nm_bus_iface_reconfigure(void *ptr)
110 {
111 sint8 ret = M2M_SUCCESS;
112 #ifdef CONF_WINC_USE_UART
113 ret = nm_uart_reconfigure(ptr);
114 #endif
115 return ret;
116 }
117 /*
118 * @fn nm_read_reg
119 * @brief Read register
120 * @param [in] u32Addr
121 * Register address
122 * @return Register value
123 * @author M. Abdelmawla
124 * @date 11 July 2012
125 * @version 1.0
126 */
nm_read_reg(uint32 u32Addr)127 uint32 nm_read_reg(uint32 u32Addr)
128 {
129 #ifdef CONF_WINC_USE_UART
130 return nm_uart_read_reg(u32Addr);
131 #elif defined (CONF_WINC_USE_SPI)
132 return nm_spi_read_reg(u32Addr);
133 #elif defined (CONF_WINC_USE_I2C)
134 return nm_i2c_read_reg(u32Addr);
135 #else
136 #error "Plesae define bus usage"
137 #endif
138
139 }
140
141 /*
142 * @fn nm_read_reg_with_ret
143 * @brief Read register with error code return
144 * @param [in] u32Addr
145 * Register address
146 * @param [out] pu32RetVal
147 * Pointer to u32 variable used to return the read value
148 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
149 * @author M. Abdelmawla
150 * @date 11 July 2012
151 * @version 1.0
152 */
nm_read_reg_with_ret(uint32 u32Addr,uint32 * pu32RetVal)153 sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
154 {
155 #ifdef CONF_WINC_USE_UART
156 return nm_uart_read_reg_with_ret(u32Addr,pu32RetVal);
157 #elif defined (CONF_WINC_USE_SPI)
158 return nm_spi_read_reg_with_ret(u32Addr,pu32RetVal);
159 #elif defined (CONF_WINC_USE_I2C)
160 return nm_i2c_read_reg_with_ret(u32Addr,pu32RetVal);
161 #else
162 #error "Plesae define bus usage"
163 #endif
164 }
165
166 /*
167 * @fn nm_write_reg
168 * @brief write register
169 * @param [in] u32Addr
170 * Register address
171 * @param [in] u32Val
172 * Value to be written to the register
173 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
174 * @author M. Abdelmawla
175 * @date 11 July 2012
176 * @version 1.0
177 */
nm_write_reg(uint32 u32Addr,uint32 u32Val)178 sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
179 {
180 #ifdef CONF_WINC_USE_UART
181 return nm_uart_write_reg(u32Addr,u32Val);
182 #elif defined (CONF_WINC_USE_SPI)
183 return nm_spi_write_reg(u32Addr,u32Val);
184 #elif defined (CONF_WINC_USE_I2C)
185 return nm_i2c_write_reg(u32Addr,u32Val);
186 #else
187 #error "Plesae define bus usage"
188 #endif
189 }
190
p_nm_read_block(uint32 u32Addr,uint8 * puBuf,uint16 u16Sz)191 static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
192 {
193 #ifdef CONF_WINC_USE_UART
194 return nm_uart_read_block(u32Addr,puBuf,u16Sz);
195 #elif defined (CONF_WINC_USE_SPI)
196 return nm_spi_read_block(u32Addr,puBuf,u16Sz);
197 #elif defined (CONF_WINC_USE_I2C)
198 return nm_i2c_read_block(u32Addr,puBuf,u16Sz);
199 #else
200 #error "Plesae define bus usage"
201 #endif
202
203 }
204 /*
205 * @fn nm_read_block
206 * @brief Read block of data
207 * @param [in] u32Addr
208 * Start address
209 * @param [out] puBuf
210 * Pointer to a buffer used to return the read data
211 * @param [in] u32Sz
212 * Number of bytes to read. The buffer size must be >= u32Sz
213 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
214 * @author M. Abdelmawla
215 * @date 11 July 2012
216 * @version 1.0
217 */
nm_read_block(uint32 u32Addr,uint8 * puBuf,uint32 u32Sz)218 sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
219 {
220 uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
221 uint32 off = 0;
222 sint8 s8Ret = M2M_SUCCESS;
223
224 for(;;)
225 {
226 if(u32Sz <= u16MaxTrxSz)
227 {
228 s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
229 break;
230 }
231 else
232 {
233 s8Ret += p_nm_read_block(u32Addr, &puBuf[off], u16MaxTrxSz);
234 if(M2M_SUCCESS != s8Ret) break;
235 u32Sz -= u16MaxTrxSz;
236 off += u16MaxTrxSz;
237 u32Addr += u16MaxTrxSz;
238 }
239 }
240
241 return s8Ret;
242 }
243
p_nm_write_block(uint32 u32Addr,uint8 * puBuf,uint16 u16Sz)244 static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
245 {
246 #ifdef CONF_WINC_USE_UART
247 return nm_uart_write_block(u32Addr,puBuf,u16Sz);
248 #elif defined (CONF_WINC_USE_SPI)
249 return nm_spi_write_block(u32Addr,puBuf,u16Sz);
250 #elif defined (CONF_WINC_USE_I2C)
251 return nm_i2c_write_block(u32Addr,puBuf,u16Sz);
252 #else
253 #error "Plesae define bus usage"
254 #endif
255
256 }
257 /**
258 * @fn nm_write_block
259 * @brief Write block of data
260 * @param [in] u32Addr
261 * Start address
262 * @param [in] puBuf
263 * Pointer to the buffer holding the data to be written
264 * @param [in] u32Sz
265 * Number of bytes to write. The buffer size must be >= u32Sz
266 * @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
267 * @author M. Abdelmawla
268 * @date 11 July 2012
269 * @version 1.0
270 */
nm_write_block(uint32 u32Addr,uint8 * puBuf,uint32 u32Sz)271 sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
272 {
273 uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
274 uint32 off = 0;
275 sint8 s8Ret = M2M_SUCCESS;
276
277 for(;;)
278 {
279 if(u32Sz <= u16MaxTrxSz)
280 {
281 s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
282 break;
283 }
284 else
285 {
286 s8Ret += p_nm_write_block(u32Addr, &puBuf[off], u16MaxTrxSz);
287 if(M2M_SUCCESS != s8Ret) break;
288 u32Sz -= u16MaxTrxSz;
289 off += u16MaxTrxSz;
290 u32Addr += u16MaxTrxSz;
291 }
292 }
293
294 return s8Ret;
295 }
296
297 #endif
298
299
