1 /* 2 * 3 * Copyright (c) 2021-2022, Arm Limited. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 */ 8 9 #ifndef SPI_N25Q256A_FLASH_LIB_H 10 #define SPI_N25Q256A_FLASH_LIB_H 11 12 #include "xilinx_pg153_axi_qspi_controller_drv.h" 13 #include <stdbool.h> 14 15 #ifdef __cplusplus 16 extern "C" { 17 #endif 18 19 /* PMOD SF3 NOR FLASH */ 20 #define PMOD_SF3_FLASH_TOTAL_SIZE (0x02000000) /* 32 MB Nor Flash (PMOD SF3) */ 21 #define PMOD_SF3_FLASH_SECTOR_SIZE (0x00001000) /* 4 KB Sub sector size*/ 22 #define PMOD_SF3_FLASH_PAGE_SIZE (256U) /* 256 B */ 23 #define PMOD_SF3_FLASH_PROGRAM_UNIT (1U) /* 1 B */ 24 25 /** 26 * \brief SPI Flash error enumeration types 27 */ 28 enum n25q256a_error_t { 29 N25Q256A_ERR_NONE = AXI_QSPI_ERR_NONE, 30 N25Q256A_ERR_WRONG_ARGUMENT = AXI_QSPI_ERR_WRONG_ARGUMENT, 31 N25Q256A_ERR_NOT_INITIALIZED = AXI_QSPI_ERR_NOT_INITIALIZED, 32 N25Q256A_ERR_WRONG_MEMORY, 33 N25Q256A_ERR_FLASH_CMD_FAILED, 34 N25Q256A_ERR_READ_IN_PROGRESS, 35 N25Q256A_ERR_WRITE_IN_PROGRESS 36 }; 37 38 struct spi_n25q256a_dev_t { 39 struct axi_qspi_dev_t *controller; /* QSPI Flash Controller */ 40 uint32_t total_sector_cnt; 41 uint32_t page_size; 42 uint32_t sector_size; 43 uint32_t program_unit; 44 bool is_initialized; 45 }; 46 47 enum n25q256a_error_t spi_n25q256a_initialize(struct spi_n25q256a_dev_t* dev); 48 49 void spi_n25q256a_uninitialize(struct spi_n25q256a_dev_t* dev); 50 51 enum n25q256a_error_t spi_n25q256a_erase(struct spi_n25q256a_dev_t* dev, 52 uint32_t addr); 53 54 enum n25q256a_error_t spi_n25q256a_erase_chip(struct spi_n25q256a_dev_t* dev); 55 56 enum n25q256a_error_t spi_n25q256a_program(struct spi_n25q256a_dev_t* dev, 57 uint32_t addr, 58 const uint8_t *data, uint32_t cnt); 59 60 enum n25q256a_error_t spi_n25q256a_read(struct spi_n25q256a_dev_t* dev, 61 uint32_t addr, 62 uint8_t *data, uint32_t cnt); 63 #ifdef __cplusplus 64 } 65 #endif 66 67 #endif /* SPI_N25Q256A_FLASH_LIB_H */ 68