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Searched defs:n (Results 1 – 12 of 12) sorted by relevance

/hal_xtensa-3.4.0/include/xtensa/
Dxtruntime-frames.h36 #define STRUCT_AFIELD(ctype,size,pre,name,n) pre##name: .if n ; .space (size)*(n) ; .endif argument
37 #define STRUCT_AFIELD_A(ctype,size,align,pre,name,n) .balign align ; pre##name: .if n ; .space (siz… argument
42 #define STRUCT_AFIELD(ctype,size,pre,name,n) ctype name[n]; argument
43 #define STRUCT_AFIELD_A(ctype,size,align,pre,name,n) ctype name[n] __attribute__((aligned(align))); argument
Doverlay.h47 #define OVERLAY(n) argument
48 #define DECLARE_OVERLAY(n) argument
Dtrax-core-config.h69 #define BRANCH_IS_VEC(n) ((n) < VEC_COUNT) /* is known to be except/interrupt? */ argument
76 #define BRANCH_IS_CALL(n) (((n) & ~3) == 32) /* is a function call? */ argument
81 #define BRANCH_IS_RETURN(n) ((n) >= 36) /* is any kind of return? */ argument
82 #define BRANCH_IS_CALLRETURN(n) (((n) & ~1) == 36) /* is a function return? */ argument
85 #define BRANCH_IS_EIRETURN(n) ((n) >= 38) /* is an except/inter. return? */ argument
Dcorebits.h76 #define EXCCAUSE_CP_DISABLED(n) (32+(n)) /* Access to Coprocessor 'n' when disabled */ argument
93 #define PS_CALLINC(n) (((n)&3)<<PS_CALLINC_SHIFT) /* n = 0..3 */ argument
96 #define PS_OWB(n) (((n)&15)<<PS_OWB_SHIFT) /* n = 0..15 (or 0..7) */ argument
99 #define PS_RING(n) (((n)&3)<<PS_RING_SHIFT) /* n = 0..3 */ argument
108 #define PS_INTLEVEL(n) ((n)&PS_INTLEVEL_MASK) /* n = 0..15 */ argument
Dcore-macros.h352 # define _XTHAL_GET_CCOMPARE(n) ({ int __ccompare; \ argument
355 # define XTHAL_GET_CCOMPARE(n) _XTHAL_GET_CCOMPARE(n) argument
356 # define _XTHAL_SET_CCOMPARE(n,v) do { int __ccompare = (int)(v); \ argument
359 # define XTHAL_SET_CCOMPARE(n,v) _XTHAL_SET_CCOMPARE(n,v) argument
368 # define XTHAL_GET_CCOMPARE(n) 0 argument
369 # define XTHAL_SET_CCOMPARE(n,v) do {/*nothing*/} while(0) argument
Dhal.h314 #define XTHAL_DCACHE_PREFETCH(n) (0x800F0000+((n)&0xF)) /* data-side */ argument
321 #define XTHAL_ICACHE_PREFETCH(n) (0x80F00000+(((n)&0xF)<<4)) /* i-side */ argument
328 #define _XTHAL_PREFETCH_BLOCKS(n) ((n)<0?0:(n)<5?(n):(n)<15?((n)>>1)+2:9) argument
329 #define XTHAL_PREFETCH_BLOCKS(n) (0x0000000F80000000ULL + \ argument
Dxdm-regs.h89 #define XDM_PERF_PM(n) (0x101080+((n)<<2)) /* perfmon cnt n=0..7 value */ argument
98 #define XDM_PERF_PMCTRL(n) (0x101100+((n)<<2)) /* perfmon cnt n=0..7 control */ argument
107 #define XDM_PERF_PMSTAT(n) (0x101180+((n)<<2)) /* perfmon cnt n=0..7 status */ argument
/hal_xtensa-3.4.0/include/xtensa/config/
Dcore.h155 #define _XCHAL_INTLEVEL_MASK(n) XCHAL_INTLEVEL ## n ## _MASK argument
156 #define XCHAL_INTLEVEL_MASK(n) _XCHAL_INTLEVEL_MASK(n) /* n = 0 .. 15 */ argument
157 #define _XCHAL_INTLEVEL_ANDBELOWMASK(n) XCHAL_INTLEVEL ## n ## _ANDBELOW_MASK argument
158 #define XCHAL_INTLEVEL_ANDBELOW_MASK(n) _XCHAL_INTLEVEL_ANDBELOWMASK(n) /* n = 0 .. 15 */ argument
159 #define _XCHAL_INTLEVEL_NUM(n) XCHAL_INTLEVEL ## n ## _NUM argument
160 #define XCHAL_INTLEVEL_NUM(n) _XCHAL_INTLEVEL_NUM(n) /* n = 0 .. 15 */ argument
161 #define _XCHAL_INT_LEVEL(n) XCHAL_INT ## n ## _LEVEL argument
162 #define XCHAL_INT_LEVEL(n) _XCHAL_INT_LEVEL(n) /* n = 0 .. 31 */ argument
163 #define _XCHAL_INT_TYPE(n) XCHAL_INT ## n ## _TYPE argument
164 #define XCHAL_INT_TYPE(n) _XCHAL_INT_TYPE(n) /* n = 0 .. 31 */ argument
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/hal_xtensa-3.4.0/src/hal/
Ddebug.c156 unsigned char i, m, n, r, s, t, z; in xthal_inst_type() local
394 unsigned char op0, t, s, r, m, n; in xthal_get_npc() local
Ddisass.c88 int i, n; in xthal_disassemble() local
Dmisc.c142 #define MEMTRIPLET(n,mem,memcap) _MEMTRIPLET(n,mem,memcap) argument
143 #define _MEMTRIPLET(n,mem,memcap) MEMTRIPLET##n(mem,memcap) argument
Dmpu.c892 xthal_MPU_entry n; in insert_entry_if_needed_with_existing_attr() local
1230 static int check_map(const xthal_MPU_entry* fg, unsigned int n, const xthal_MPU_entry* bg) in check_map()
1519 void xthal_write_map(const xthal_MPU_entry* fg, unsigned int n) in xthal_write_map()
1543 int xthal_check_map(const xthal_MPU_entry* fg, unsigned int n) in xthal_check_map()