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/hal_ambiq-3.7.0/mcu/apollo3p/regs/
Dam_mcu_apollo3p_info0.h46 #define AM_REG_INFO0n(n) 0x50020000 argument
404 #define AM_REG_INFO0_SIGNATURE0_SIG0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
409 #define AM_REG_INFO0_SIGNATURE1_SIG1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
414 #define AM_REG_INFO0_SIGNATURE2_SIG2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
419 #define AM_REG_INFO0_SIGNATURE3_SIG3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
424 #define AM_REG_INFO0_SECURITY_SECPOL(n) (((uint32_t)(n) << 24) & 0x07000000) argument
427 #define AM_REG_INFO0_SECURITY_KEYWRAP(n) (((uint32_t)(n) << 20) & 0x00F00000) argument
430 #define AM_REG_INFO0_SECURITY_RSVD19(n) (((uint32_t)(n) << 19) & 0x00080000) argument
433 #define AM_REG_INFO0_SECURITY_SECBOOTONRST(n) (((uint32_t)(n) << 16) & 0x00070000) argument
436 #define AM_REG_INFO0_SECURITY_RSVD15(n) (((uint32_t)(n) << 15) & 0x00008000) argument
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Dam_reg.h54 #define AM_REG_ADCn(n) \ argument
64 #define AM_REG_APBDMAn(n) \ argument
74 #define AM_REG_BLEIFn(n) \ argument
84 #define AM_REG_CACHECTRLn(n) \ argument
94 #define AM_REG_CLKGENn(n) \ argument
104 #define AM_REG_CTIMERn(n) \ argument
114 #define AM_REG_FLASHCTRLn(n) \ argument
124 #define AM_REG_GPIOn(n) \ argument
134 #define AM_REG_IOMn(n) \ argument
144 #define AM_REG_IOSLAVEn(n) \ argument
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/hal_ambiq-3.7.0/mcu/apollo3/regs/
Dam_mcu_apollo3_info0.h46 #define AM_REG_INFO0n(n) 0x50020000 argument
390 #define AM_REG_INFO0_SIGNATURE0_SIG0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
395 #define AM_REG_INFO0_SIGNATURE1_SIG1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
400 #define AM_REG_INFO0_SIGNATURE2_SIG2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
405 #define AM_REG_INFO0_SIGNATURE3_SIG3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
410 #define AM_REG_INFO0_SECURITY_SECPOL(n) (((uint32_t)(n) << 24) & 0x07000000) argument
413 #define AM_REG_INFO0_SECURITY_KEYWRAP(n) (((uint32_t)(n) << 20) & 0x00F00000) argument
416 #define AM_REG_INFO0_SECURITY_RSVD19(n) (((uint32_t)(n) << 19) & 0x00080000) argument
419 #define AM_REG_INFO0_SECURITY_SECBOOTONRST(n) (((uint32_t)(n) << 16) & 0x00070000) argument
422 #define AM_REG_INFO0_SECURITY_RSVD15(n) (((uint32_t)(n) << 15) & 0x00008000) argument
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Dam_reg.h54 #define AM_REG_ADCn(n) \ argument
64 #define AM_REG_APBDMAn(n) \ argument
74 #define AM_REG_BLEIFn(n) \ argument
84 #define AM_REG_CACHECTRLn(n) \ argument
94 #define AM_REG_CLKGENn(n) \ argument
104 #define AM_REG_CTIMERn(n) \ argument
114 #define AM_REG_FLASHCTRLn(n) \ argument
124 #define AM_REG_GPIOn(n) \ argument
134 #define AM_REG_IOMn(n) \ argument
144 #define AM_REG_IOSLAVEn(n) \ argument
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/hal_ambiq-3.7.0/mcu/apollo4p/regs/
Dam_mcu_apollo4p_otp.h46 #define AM_REG_OTPn(n) 0x400C2000 argument
682 #define AM_REG_OTP_ROT0_ROT0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
689 #define AM_REG_OTP_ROT1_ROT1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
696 #define AM_REG_OTP_ROT2_ROT2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
703 #define AM_REG_OTP_ROT3_ROT3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
710 #define AM_REG_OTP_ROT4_ROT4(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
717 #define AM_REG_OTP_ROT5_ROT5(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
724 #define AM_REG_OTP_ROT6_ROT6(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
731 #define AM_REG_OTP_ROT7_ROT7(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
738 #define AM_REG_OTP_KCP0_KCP0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
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Dam_reg.h57 #define AM_REG_APBDMAn(n) \ argument
67 #define AM_REG_CLKGENn(n) \ argument
77 #define AM_REG_CRYPTOn(n) \ argument
87 #define AM_REG_RSTGENn(n) \ argument
97 #define AM_REG_RTCn(n) \ argument
107 #define AM_REG_SECURITYn(n) \ argument
117 #define AM_REG_WDTn(n) \ argument
127 #define AM_REG_I2Sn(n) \ argument
137 #define AM_REG_PDMn(n) \ argument
147 #define AM_REG_ADCn(n) \ argument
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Dam_mcu_apollo4p_info1.h46 #define AM_REG_INFO1n(n) 0x42002000 argument
142 #define AM_REG_INFO1_SBL_VERSION_0_VERSION(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
149 #define AM_REG_INFO1_SBL_VERSION_1_DATECODE(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
156 #define AM_REG_INFO1_SBR_VERSION_0_VERSION(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
163 #define AM_REG_INFO1_MAINPTR_ADDRESS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
170 #define AM_REG_INFO1_RESETSTATUS_STATUS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
177 #define AM_REG_INFO1_SBLOTA_ADDRESS(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
184 #define AM_REG_INFO1_SOCID0_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
191 #define AM_REG_INFO1_SOCID1_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
198 #define AM_REG_INFO1_SOCID2_ID(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
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Dam_mcu_apollo4p_info0.h46 #define AM_REG_INFO0n(n) 0x42000000 argument
88 #define AM_REG_INFO0_SIGNATURE0_SIG0(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
95 #define AM_REG_INFO0_SIGNATURE1_SIG1(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
102 #define AM_REG_INFO0_SIGNATURE2_SIG2(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
109 #define AM_REG_INFO0_SIGNATURE3_SIG3(n) (((uint32_t)(n) << 0) & 0xFFFFFFFF) argument
116 #define AM_REG_INFO0_CUSTOMER_TRIM_ERR001_MUSTBE_0(n) (((uint32_t)(n) << 0) & 0x00000001) argument
123 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_RSVD30(n) (((uint32_t)(n) << 30) & 0xC0000000) argument
128 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_BAUDRATE(n) (((uint32_t)(n) << 8) & 0x3FFFFF00) argument
133 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_DATALEN(n) (((uint32_t)(n) << 6) & 0x000000C0) argument
138 #define AM_REG_INFO0_SECURITY_WIRED_IFC_CFG0_2STOP(n) (((uint32_t)(n) << 5) & 0x00000020) argument
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/hal_ambiq-3.7.0/mcu/apollo3/hal/
Dam_hal_gpio.h73 #define AM_HAL_GPIO_BIT(n) (((uint64_t) 0x1) << n) /* DEPRECATED, PLEASE USE AM_HAL_GPIO_MASKBIT()… argument
90 #define AM_HAL_GPIO_MASKBIT(psMaskNm, n) psMaskNm = (((uint64_t) 0x1) << n) argument
102 #define AM_HAL_GPIO_MASKBITSMULT(psMaskNm, n) psMaskNm |= (((uint64_t) 0x1) << n) argument
797 #define AM_HAL_MASK32(n) ((uint32_t)1 << ((n) & 0x1F)) argument
833 #define am_hal_gpio_input_read(n) ((*AM_HAL_GPIO_RDn((n)) >> ((n) % 32)) & 1) argument
834 #define am_hal_gpio_output_read(n) ((*AM_HAL_GPIO_WTn((n)) >> ((n) % 32)) & 1) argument
835 #define am_hal_gpio_enable_read(n) ((*AM_HAL_GPIO_ENn((n)) >> ((n) % 32)) & 1) argument
866 #define am_hal_gpio_output_clear(n) \ argument
871 #define am_hal_gpio_output_set(n) \ argument
876 #define am_hal_gpio_output_toggle(n) \ argument
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Dam_hal_flash.h145 #define FLASH_CYCLES_US(n) ((n * CYCLESPERITER) + 0) argument
146 #define FLASH_CYCLES_US_NOCACHE(n) ( (n == 0) ? 0 : (n * CYCLESPERITER) - 5) argument
268 #define AM_HAL_FLASH_INFO_CHUNK2ADDR(n) (AM_HAL_FLASH_ADDR + (n << 14)) argument
269 #define AM_HAL_FLASH_INFO_CHUNK2INST(n) ((n >> 5) & 1 argument
270 #define AM_HAL_FLASH_INFO_ADDR2CHUNK(n) ((n) >> 14) argument
Dam_hal_stimer.h60 #define AM_REG_STIMER_COMPARE(n, r) (CTIMERADDRn(CTIMER, n, SCMPR0) + \ argument
64 #define AM_REG_STIMER_CAPTURE(n, r) (CTIMERADDRn(CTIMER, n, SCAPT0) + \ argument
68 #define AM_REG_STIMER_NVRAM(n, r) (CTIMERADDRn(CTIMER, n, SNVR0) + \ argument
Dam_hal_ctimer.c169 #define OUTCTIMN(ctx,n) (outcfg_tbl[ctx][n] & (0x7 << 0)) argument
170 #define OUTCTIMB(ctx,n) (outcfg_tbl[ctx][n] & (0x1 << 3)) argument
171 #define OUTCO2(ctx,n) (outcfg_tbl[ctx][n] & (0x1 << 4)) argument
Dam_hal_global.h98 #define STRINGIZE_VAL(n) STRINGIZE_VAL2(n) argument
99 #define STRINGIZE_VAL2(n) #n argument
/hal_ambiq-3.7.0/mcu/apollo3p/hal/
Dam_hal_gpio.h73 #define AM_HAL_GPIO_BIT(n) DEPRECATED_USE_AM_HAL_GPIO_MASKBIT // Force a compile error if… argument
230 AM_HAL_GPIO_MASKBIT(am_hal_gpio_mask_t*psMaskNm, uint32_t n) in AM_HAL_GPIO_MASKBIT()
254 AM_HAL_GPIO_MASKBITSMULT(am_hal_gpio_mask_t*psMaskNm, uint32_t n) in AM_HAL_GPIO_MASKBITSMULT()
869 #define AM_HAL_MASK32(n) ((uint32_t)1 << ((n) & 0x1F)) argument
906 #define am_hal_gpio_input_read(n) ((*AM_HAL_GPIO_RDn((n)) >> ((n) % 32)) & 1) argument
907 #define am_hal_gpio_output_read(n) ((*AM_HAL_GPIO_WTn((n)) >> ((n) % 32)) & 1) argument
908 #define am_hal_gpio_enable_read(n) ((*AM_HAL_GPIO_ENn((n)) >> ((n) % 32)) & 1) argument
940 #define am_hal_gpio_output_clear(n) \ argument
945 #define am_hal_gpio_output_set(n) \ argument
950 #define am_hal_gpio_output_toggle(n) \ argument
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Dam_hal_flash.h149 #define FLASH_CYCLES_US(n) ((n * CYCLESPERITER) + 0) argument
150 #define FLASH_CYCLES_US_NOCACHE(n) ( (n == 0) ? 0 : (n * CYCLESPERITER) - 5) argument
272 #define AM_HAL_FLASH_INFO_CHUNK2ADDR(n) (AM_HAL_FLASH_ADDR + (n << 14)) argument
273 #define AM_HAL_FLASH_INFO_CHUNK2INST(n) ((n >> 5) & 1 argument
274 #define AM_HAL_FLASH_INFO_ADDR2CHUNK(n) ((n) >> 14) argument
Dam_hal_mspi.h59 #define MSPIn(n) ((MSPI0_Type*)(MSPI0_BASE + (n * (MSPI1_BASE - MSPI0_BASE)))) argument
60 #define MSPI_IRQn(n) MSPI_IRQn_temp(n) argument
61 #define MSPI_XIP_BASEADDRn(n) MSPI_XIP_BASEADDRn_temp(n) argument
62 #define MSPI_XIPMM_BASEADDRn(n) MSPI_XIPMM_BASEADDRn_temp(n) argument
147 #define MSPI_IRQn_temp(n) (MSPI##n##_IRQn) argument
148 #define MSPI_XIP_BASEADDRn_temp(n) (MSPI##n##_XIP_BASEADDR) argument
149 #define MSPI_XIPMM_BASEADDRn_temp(n) (MSPI##n##_XIPMM_BASEADDR) argument
Dam_hal_stimer.h60 #define AM_REG_STIMER_COMPARE(n, r) (CTIMERADDRn(CTIMER, n, SCMPR0) + \ argument
64 #define AM_REG_STIMER_CAPTURE(n, r) (CTIMERADDRn(CTIMER, n, SCAPT0) + \ argument
68 #define AM_REG_STIMER_NVRAM(n, r) (CTIMERADDRn(CTIMER, n, SNVR0) + \ argument
Dam_hal_ctimer.c195 #define OUTCTIMN(ctx,n) (outcfg_tbl[ctx][n] & (0x7 << 0)) argument
196 #define OUTCTIMB(ctx,n) (outcfg_tbl[ctx][n] & (0x1 << 3)) argument
197 #define OUTCO2(ctx,n) (outcfg_tbl[ctx][n] & (0x1 << 4)) argument
Dam_hal_global.h98 #define STRINGIZE_VAL(n) STRINGIZE_VAL2(n) argument
99 #define STRINGIZE_VAL2(n) #n argument
/hal_ambiq-3.7.0/mcu/apollo4p/hal/
Dam_hal_gpio.h762 #define AM_HAL_MASK32(n) ((uint32_t)1 << ((n) & 0x1F)) argument
799 #define am_hal_gpio_input_read(n) ((*AM_HAL_GPIO_RDn((n)) >> ((n) % 32)) & 1) argument
800 #define am_hal_gpio_output_read(n) ((*AM_HAL_GPIO_WTn((n)) >> ((n) % 32)) & 1) argument
801 #define am_hal_gpio_enable_read(n) ((*AM_HAL_GPIO_ENn((n)) >> ((n) % 32)) & 1) argument
837 #define am_hal_gpio_output_clear(n) (*AM_HAL_GPIO_WTCn((n)) = AM_HAL_MASK32(n)) argument
838 #define am_hal_gpio_output_set(n) (*AM_HAL_GPIO_WTSn((n)) = AM_HAL_MASK32(n)) argument
839 #define am_hal_gpio_output_toggle(n) \ argument
847 #define am_hal_gpio_output_tristate_output_dis(n) (*AM_HAL_GPIO_ENCn((n)) = AM_HAL_MASK32(n)) argument
848 #define am_hal_gpio_output_tristate_output_en(n) (*AM_HAL_GPIO_ENSn((n)) = AM_HAL_MASK32(n)) argument
849 #define am_hal_gpio_output_tristate_output_tog(n) \ argument
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Dam_hal_stimer.h61 #define AM_REG_STIMER_COMPARE(n, r) ((&STIMER->SCMPR0) + \ argument
66 #define AM_REG_STIMER_CAPTURE(n, r) ((&STIMER->SCAPT0) + \ argument
71 #define AM_REG_STIMER_NVRAM(n, r) ((&STIMER->SNVR0) + \ argument
/hal_ambiq-3.7.0/components/bluetooth/
Dam_devices_cooper.h65 #define UINT16_TO_BYTE0(n) ((uint8_t) (n)) argument
66 #define UINT16_TO_BYTE1(n) ((uint8_t) ((n) >> 8)) argument
67 #define UINT32_TO_BYTE0(n) ((uint8_t) (n)) argument
68 #define UINT32_TO_BYTE1(n) ((uint8_t) ((n) >> 8)) argument
69 #define UINT32_TO_BYTE2(n) ((uint8_t) ((n) >> 16)) argument
70 #define UINT32_TO_BYTE3(n) ((uint8_t) ((n) >> 24)) argument
321 #define HCI_VSC_CMD_LENGTH(n) (HCI_VSC_CMD_HEADER_LENGTH + n) argument
/hal_ambiq-3.7.0/mcu/apollo4p/hal/mcu/
Dam_hal_mspi.h60 #define MSPIn(n) ((MSPI0_Type*)(MSPI0_BASE + (n * (MSPI1_BASE - MSPI0_BASE)))) argument
61 #define MSPI_IRQn(n) MSPI_IRQn_temp(n) argument
62 #define MSPI_APERTURE_START_ADDRn(n) (MSPI0_APERTURE_START_ADDR + 0x04000000*(n)) argument
63 #define MSPI_APERTURE_END_ADDRn(n) (MSPI0_APERTURE_END_ADDR + 0x04000000*(n)) argument
146 #define MSPI_IRQn_temp(n) (MSPI##n##_IRQn) argument
147 #define MSPI_APERTURE_START_ADDRn_temp(n) (MSPI##n##_APERTURE_START_ADDR) argument
148 #define MSPI_APERTURE_END_ADDRn_temp(n) (MSPI##n##_APERTURE_END_ADDR) argument
Dam_hal_mcu.h57 #define am_count_num_leading_zeros(n) __CLZ(n) argument
59 #define am_count_num_leading_zeros(n) __builtin_clz(n) argument
Dam_hal_utils.c90 #define BOOTROM_CYCLES_US(n) (((n) * CYCLESPERITER) + 0) argument
91 #define BOOTROM_CYCLES_US_NOCACHE(n) ( (n == 0) ? 0 : (n * CYCLESPERITER) - 5) argument

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