/Zephyr-Core-3.4.0/scripts/ |
D | zephyr_module.py | 173 def process_module(module): argument 205 def process_cmake(module, meta): argument 236 def process_sysbuildcmake(module, meta): argument 270 def process_settings(module, meta): argument 298 def process_blobs(module, meta): argument 332 def process_kconfig(module, meta): argument 356 def process_sysbuildkconfig(module, meta): argument 380 def process_twister(module, meta): argument
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/Zephyr-Core-3.4.0/drivers/sensor/vl53l1x/ |
D | vl53l1_platform_log.h | 161 #define _LOG_TRACE_PRINT(module, level, function, ...) \ argument 164 #define _LOG_FUNCTION_START(module, fmt, ...) \ argument 168 #define _LOG_FUNCTION_END(module, status, ...)\ argument 172 #define _LOG_FUNCTION_END_FMT(module, status, fmt, ...)\ argument 190 #define _LOG_TRACE_PRINT(module, level, function, ...) argument 191 #define _LOG_FUNCTION_START(module, fmt, ...) argument 192 #define _LOG_FUNCTION_END(module, status, ...) argument 193 #define _LOG_FUNCTION_END_FMT(module, status, fmt, ...) argument
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/Zephyr-Core-3.4.0/drivers/sensor/vl53l0x/ |
D | vl53l0x_platform_log.h | 46 #define _LOG_FUNCTION_START(module, fmt, ...) (void)0 argument 47 #define _LOG_FUNCTION_END(module, status, ...) (void)0 argument 48 #define _LOG_FUNCTION_END_FMT(module, status, fmt, ...) (void)0 argument
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/Zephyr-Core-3.4.0/include/zephyr/drivers/clock_control/ |
D | renesas_cpg_mssr.h | 17 uint32_t module; member
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/Zephyr-Core-3.4.0/drivers/clock_control/ |
D | clock_control_renesas_cpg_mssr.c | 28 int rcar_cpg_mstp_clock_endisable(uint32_t base_address, uint32_t module, bool enable) in rcar_cpg_mstp_clock_endisable()
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D | clock_control_r8a7795_cpg_mssr.c | 29 int r8a7795_cpg_core_clock_endisable(uint32_t base_address, uint32_t module, in r8a7795_cpg_core_clock_endisable()
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/Zephyr-Core-3.4.0/doc/develop/ |
D | modules.rst | 524 .. _sysbuild_module_integration: 1119 .. _changes_to_existing_module:
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/Zephyr-Core-3.4.0/soc/xtensa/intel_adsp/common/include/ |
D | manifest.h | 190 struct sof_man_module module; member
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