1 /*
2 * Copyright 2022 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/drivers/sdhc.h>
8 #include <zephyr/kernel.h>
9 #include <zephyr/logging/log.h>
10 #include <zephyr/sd/mmc.h>
11 #include <zephyr/sd/sd.h>
12 #include <zephyr/sd/sd_spec.h>
13
14 #include "sd_ops.h"
15 #include "sd_utils.h"
16
17 /* These are used as specific arguments to commands */
18 /* For switch commands, the argument structure is:
19 * [31:26] : Set to 0
20 * [25:24] : Access
21 * [23:16] : Index (byte address in EXT_CSD)
22 * [15:8] : Value (data)
23 * [7:3] : Set to 0
24 * [2:0] : Cmd Set
25 */
26 #define MMC_SWITCH_8_BIT_DDR_BUS_ARG \
27 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
28 (0x0000FF00 & (6U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
29 #define MMC_SWITCH_8_BIT_BUS_ARG \
30 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
31 (0x0000FF00 & (2U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
32 #define MMC_SWITCH_4_BIT_BUS_ARG \
33 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
34 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
35 #define MMC_SWITCH_HS_TIMING_ARG \
36 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
37 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
38 #define MMC_SWITCH_HS400_TIMING_ARG \
39 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
40 (0x0000FF00 & (3U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
41 #define MMC_SWITCH_HS200_TIMING_ARG \
42 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
43 (0x0000FF00 & (2U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
44 #define MMC_RCA_ARG (CONFIG_MMC_RCA << 16U)
45 #define MMC_REL_ADR_ARG (card->relative_addr << 16U)
46 #define MMC_SWITCH_PWR_CLASS_ARG \
47 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (187U << 16)) + \
48 (0x0000FF00 & (0U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
49 #define MMC_SWITCH_CACHE_ON_ARG \
50 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (33U << 16)) + \
51 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
52
53 LOG_MODULE_DECLARE(sd, CONFIG_SD_LOG_LEVEL);
54
mmc_write_blocks(struct sd_card * card,const uint8_t * wbuf,uint32_t start_block,uint32_t num_blocks)55 inline int mmc_write_blocks(struct sd_card *card, const uint8_t *wbuf, uint32_t start_block,
56 uint32_t num_blocks)
57 {
58 return card_write_blocks(card, wbuf, start_block, num_blocks);
59 }
60
mmc_read_blocks(struct sd_card * card,uint8_t * rbuf,uint32_t start_block,uint32_t num_blocks)61 inline int mmc_read_blocks(struct sd_card *card, uint8_t *rbuf, uint32_t start_block,
62 uint32_t num_blocks)
63 {
64 return card_read_blocks(card, rbuf, start_block, num_blocks);
65 }
66
mmc_ioctl(struct sd_card * card,uint8_t cmd,void * buf)67 inline int mmc_ioctl(struct sd_card *card, uint8_t cmd, void *buf)
68 {
69 return card_ioctl(card, cmd, buf);
70 }
71
72 /* Sends CMD1 */
73 static int mmc_send_op_cond(struct sd_card *card, int ocr);
74
75 /* Sends CMD3 */
76 static int mmc_set_rca(struct sd_card *card);
77
78 /* Sends CMD9 */
79 static int mmc_read_csd(struct sd_card *card, struct sd_csd *card_csd);
80 static inline void mmc_decode_csd(struct sd_csd *csd, uint32_t *raw_csd);
81
82 /* Sends CMD8 */
83 static int mmc_read_ext_csd(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
84 static inline void mmc_decode_ext_csd(struct mmc_ext_csd *ext_csd, uint8_t *raw);
85
86 /* Sets SDHC max frequency in legacy timing */
87 static inline int mmc_set_max_freq(struct sd_card *card, struct sd_csd *card_csd);
88
89 /* Sends CMD6 to switch bus width*/
90 static int mmc_set_bus_width(struct sd_card *card);
91
92 /* Sets card to the fastest timing mode (using CMD6) and SDHC to max frequency */
93 static int mmc_set_timing(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
94
95 /* Enable cache for emmc if applicable */
96 static int mmc_set_cache(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
97
98 /*
99 * Initialize MMC card for use with subsystem
100 */
mmc_card_init(struct sd_card * card)101 int mmc_card_init(struct sd_card *card)
102 {
103 int ret = 0;
104 uint32_t ocr_arg = 0U;
105 /* Keep CSDs on stack for reduced RAM usage */
106 struct sd_csd card_csd = {0};
107 struct mmc_ext_csd card_ext_csd = {0};
108
109 /* SPI is not supported for MMC */
110 if (card->host_props.is_spi) {
111 return -EINVAL;
112 }
113
114 /* Set OCR Arguments */
115 if (card->host_props.host_caps.vol_180_support) {
116 ocr_arg |= MMC_OCR_VDD170_195FLAG;
117 }
118 if (card->host_props.host_caps.vol_330_support ||
119 card->host_props.host_caps.vol_300_support) {
120 ocr_arg |= MMC_OCR_VDD27_36FLAG;
121 }
122 /* Modern SDHC always at least supports 512 byte block sizes,
123 * which is enough to support sectors
124 */
125 ocr_arg |= MMC_OCR_SECTOR_MODE;
126
127 /* CMD1 */
128 ret = mmc_send_op_cond(card, ocr_arg);
129 if (ret) {
130 LOG_DBG("Failed to query card OCR");
131 return ret;
132 }
133
134 /* CMD2 */
135 ret = card_read_cid(card);
136 if (ret) {
137 return ret;
138 }
139
140 /* CMD3 */
141 ret = mmc_set_rca(card);
142 if (ret) {
143 LOG_ERR("Failed on sending RCA to card");
144 return ret;
145 }
146
147 /* CMD9 */
148 ret = mmc_read_csd(card, &card_csd);
149 if (ret) {
150 return ret;
151 }
152
153 /* Set max bus clock in legacy timing to speed up initialization
154 * Currently only eMMC is supported for this command
155 * Legacy MMC cards will initialize slowly
156 */
157 ret = mmc_set_max_freq(card, &card_csd);
158 if (ret) {
159 return ret;
160 }
161
162 /* CMD7 */
163 ret = sdmmc_select_card(card);
164 if (ret) {
165 return ret;
166 }
167
168 /* CMD6: Set bus width to max supported*/
169 ret = mmc_set_bus_width(card);
170 if (ret) {
171 return ret;
172 }
173
174 /* CMD8 */
175 ret = mmc_read_ext_csd(card, &card_ext_csd);
176 if (ret) {
177 return ret;
178 }
179
180 /* Set timing to fastest supported */
181 ret = mmc_set_timing(card, &card_ext_csd);
182 if (ret) {
183 return ret;
184 }
185
186 /* Turn on cache if it exists */
187 ret = mmc_set_cache(card, &card_ext_csd);
188 if (ret) {
189 return ret;
190 }
191
192 return 0;
193 }
194
mmc_send_op_cond(struct sd_card * card,int ocr)195 static int mmc_send_op_cond(struct sd_card *card, int ocr)
196 {
197 struct sdhc_command cmd = {0};
198 int ret = 0;
199 int retries;
200
201 cmd.opcode = MMC_SEND_OP_COND;
202 cmd.arg = ocr;
203 cmd.response_type = SD_RSP_TYPE_R3;
204 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
205
206 for (retries = 0;
207 retries < CONFIG_SD_OCR_RETRY_COUNT && !(cmd.response[0] & SD_OCR_PWR_BUSY_FLAG);
208 retries++) {
209 ret = sdhc_request(card->sdhc, &cmd, NULL);
210 if (ret) {
211 /* OCR failed */
212 return ret;
213 }
214 if (retries == 0) {
215 /* Card is MMC card if no error
216 * (Only MMC protocol supports CMD1)
217 */
218 card->type = CARD_MMC;
219 }
220 sd_delay(10);
221 }
222 if (retries >= CONFIG_SD_OCR_RETRY_COUNT) {
223 /* OCR timed out */
224 LOG_ERR("Card never left busy state");
225 return -ETIMEDOUT;
226 }
227 LOG_DBG("MMC responded to CMD1 after %d attempts", retries);
228
229 if (cmd.response[0] & MMC_OCR_VDD170_195FLAG) {
230 card->flags |= SD_1800MV_FLAG;
231 }
232 if (cmd.response[0] & MMC_OCR_VDD27_36FLAG) {
233 card->flags |= SD_3000MV_FLAG;
234 }
235
236 /* Switch to 1.8V */
237 if (card->host_props.host_caps.vol_180_support && (card->flags & SD_1800MV_FLAG)) {
238 card->bus_io.signal_voltage = SD_VOL_1_8_V;
239 ret = sdhc_set_io(card->sdhc, &card->bus_io);
240 if (ret) {
241 LOG_DBG("Failed to switch MMC host to 1.8V");
242 return ret;
243 }
244 sd_delay(10);
245
246 card->card_voltage = SD_VOL_1_8_V;
247 LOG_INF("Card switched to 1.8V signaling");
248 }
249
250 /* SD high Capacity is >2GB, the same as sector supporting MMC cards. */
251 if (cmd.response[0] & MMC_OCR_SECTOR_MODE) {
252 card->flags |= SD_HIGH_CAPACITY_FLAG;
253 }
254
255 return 0;
256 }
257
mmc_set_rca(struct sd_card * card)258 static int mmc_set_rca(struct sd_card *card)
259 {
260 struct sdhc_command cmd = {0};
261 int ret;
262
263 cmd.opcode = MMC_SEND_RELATIVE_ADDR;
264 cmd.arg = MMC_RCA_ARG;
265 cmd.response_type = SD_RSP_TYPE_R1;
266 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
267
268 ret = sdhc_request(card->sdhc, &cmd, NULL);
269 if (ret) {
270 return ret;
271 }
272 ret = sd_check_response(&cmd);
273 if (ret) {
274 return ret;
275 }
276
277 card->relative_addr = CONFIG_MMC_RCA;
278
279 return 0;
280 }
281
mmc_read_csd(struct sd_card * card,struct sd_csd * card_csd)282 static int mmc_read_csd(struct sd_card *card, struct sd_csd *card_csd)
283 {
284 int ret;
285 struct sdhc_command cmd = {0};
286
287 cmd.opcode = SD_SEND_CSD;
288 cmd.arg = MMC_REL_ADR_ARG;
289 cmd.response_type = SD_RSP_TYPE_R2;
290 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
291
292 ret = sdhc_request(card->sdhc, &cmd, NULL);
293 if (ret) {
294 LOG_DBG("CMD9 failed: %d", ret);
295 return ret;
296 }
297
298 mmc_decode_csd(card_csd, cmd.response);
299 if (card_csd->csd_structure < 2) {
300 LOG_ERR("Legacy MMC cards are not supported.");
301 return -ENOTSUP;
302 }
303
304 return 0;
305 }
306
mmc_decode_csd(struct sd_csd * csd,uint32_t * raw_csd)307 static inline void mmc_decode_csd(struct sd_csd *csd, uint32_t *raw_csd)
308 {
309 csd->csd_structure = (uint8_t)((raw_csd[3U] & 0xC0000000U) >> 30U);
310 csd->read_time1 = (uint8_t)((raw_csd[3U] & 0xFF0000U) >> 16U);
311 csd->read_time2 = (uint8_t)((raw_csd[3U] & 0xFF00U) >> 8U);
312 csd->xfer_rate = (uint8_t)(raw_csd[3U] & 0xFFU);
313 csd->cmd_class = (uint16_t)((raw_csd[2U] & 0xFFF00000U) >> 20U);
314 csd->read_blk_len = (uint8_t)((raw_csd[2U] & 0xF0000U) >> 16U);
315 if (raw_csd[2U] & 0x8000U) {
316 csd->flags |= SD_CSD_READ_BLK_PARTIAL_FLAG;
317 }
318 if (raw_csd[2U] & 0x4000U) {
319 csd->flags |= SD_CSD_READ_BLK_PARTIAL_FLAG;
320 }
321 if (raw_csd[2U] & 0x2000U) {
322 csd->flags |= SD_CSD_READ_BLK_MISALIGN_FLAG;
323 }
324 if (raw_csd[2U] & 0x1000U) {
325 csd->flags |= SD_CSD_DSR_IMPLEMENTED_FLAG;
326 }
327 csd->device_size =
328 (uint16_t)(((raw_csd[2U] & 0x3FFU) << 2U) + ((raw_csd[1U] & 0xC0000000U) >> 30U));
329 csd->read_current_min = (uint8_t)((raw_csd[1U] & 0x38000000U) >> 27U);
330 csd->read_current_max = (uint8_t)((raw_csd[1U] & 0x07000000U) >> 24U);
331 csd->write_current_min = (uint8_t)((raw_csd[1U] & 0x00E00000U) >> 21U);
332 csd->write_current_max = (uint8_t)((raw_csd[1U] & 0x001C0000U) >> 18U);
333 csd->dev_size_mul = (uint8_t)((raw_csd[1U] & 0x00038000U) >> 15U);
334 csd->erase_size = (uint8_t)((raw_csd[1U] & 0x00007C00U) >> 10U);
335 csd->write_prtect_size = (uint8_t)(raw_csd[1U] & 0x0000001FU);
336 csd->write_speed_factor = (uint8_t)((raw_csd[0U] & 0x1C000000U) >> 26U);
337 csd->write_blk_len = (uint8_t)((raw_csd[0U] & 0x03C00000U) >> 22U);
338 csd->file_fmt = (uint8_t)((raw_csd[0U] & 0x00000C00U) >> 10U);
339 }
340
mmc_set_max_freq(struct sd_card * card,struct sd_csd * card_csd)341 static inline int mmc_set_max_freq(struct sd_card *card, struct sd_csd *card_csd)
342 {
343 int ret;
344 enum mmc_csd_freq frequency_code = (card_csd->xfer_rate & 0x7);
345 enum mmc_csd_freq multiplier_code = (card_csd->xfer_rate & 0x78);
346
347 /* 4.3 - 5.1 emmc spec says 26 MHz */
348 if (frequency_code == MMC_MAXFREQ_10MHZ && multiplier_code == MMC_MAXFREQ_MULT_26) {
349 card->bus_io.clock = 26000000U;
350 card->bus_io.timing = SDHC_TIMING_LEGACY;
351 }
352 /* 4.0 - 4.2 emmc spec says 20 MHz */
353 else if (frequency_code == MMC_MAXFREQ_10MHZ && multiplier_code == MMC_MAXFREQ_MULT_20) {
354 card->bus_io.clock = 20000000U;
355 card->bus_io.timing = SDHC_TIMING_LEGACY;
356 } else {
357 LOG_INF("Using Legacy MMC will have slow initialization");
358 return 0;
359 }
360
361 ret = sdhc_set_io(card->sdhc, &card->bus_io);
362 if (ret) {
363 LOG_ERR("Error seetting initial clock frequency");
364 return ret;
365 }
366
367 return 0;
368 }
369
mmc_set_bus_width(struct sd_card * card)370 static int mmc_set_bus_width(struct sd_card *card)
371 {
372 int ret;
373 struct sdhc_command cmd = {0};
374
375 if (card->host_props.host_caps.bus_8_bit_support && card->bus_width == 8) {
376 cmd.arg = MMC_SWITCH_8_BIT_BUS_ARG;
377 card->bus_io.bus_width = SDHC_BUS_WIDTH8BIT;
378 } else if (card->host_props.host_caps.bus_4_bit_support && card->bus_width >= 4) {
379 cmd.arg = MMC_SWITCH_4_BIT_BUS_ARG;
380 card->bus_io.bus_width = SDHC_BUS_WIDTH4BIT;
381 } else {
382 /* If only 1 bit bus is supported, nothing to be done */
383 return 0;
384 }
385
386 /* Set Card Bus Width */
387 cmd.opcode = SD_SWITCH;
388 cmd.response_type = SD_RSP_TYPE_R1b;
389 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
390 ret = sdhc_request(card->sdhc, &cmd, NULL);
391 sdmmc_wait_ready(card);
392 if (ret) {
393 LOG_ERR("Setting card data bus width failed: %d", ret);
394 return ret;
395 }
396
397 /* Set host controller bus width */
398 ret = sdhc_set_io(card->sdhc, &card->bus_io);
399 if (ret) {
400 LOG_ERR("Setting SDHC data bus width failed: %d", ret);
401 return ret;
402 }
403
404 return ret;
405 }
406
mmc_set_hs_timing(struct sd_card * card)407 static int mmc_set_hs_timing(struct sd_card *card)
408 {
409 int ret = 0;
410 struct sdhc_command cmd = {0};
411
412 /* Change Card Timing Mode */
413 cmd.opcode = SD_SWITCH;
414 cmd.arg = MMC_SWITCH_HS_TIMING_ARG;
415 cmd.response_type = SD_RSP_TYPE_R1b;
416 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
417 ret = sdhc_request(card->sdhc, &cmd, NULL);
418 if (ret) {
419 LOG_DBG("Error setting bus timing: %d", ret);
420 return ret;
421 }
422 sdmmc_wait_ready(card);
423
424 /* Max frequency in HS mode is 52 MHz */
425 card->bus_io.clock = MMC_CLOCK_52MHZ;
426 card->bus_io.timing = SDHC_TIMING_HS;
427 /* Change SDHC bus timing */
428 ret = sdhc_set_io(card->sdhc, &card->bus_io);
429 if (ret) {
430 return ret;
431 }
432
433 return ret;
434 }
435
mmc_set_power_class_HS200(struct sd_card * card,struct mmc_ext_csd * ext)436 static int mmc_set_power_class_HS200(struct sd_card *card, struct mmc_ext_csd *ext)
437 {
438 int ret = 0;
439 struct sdhc_command cmd = {0};
440
441 cmd.opcode = SD_SWITCH;
442 cmd.arg = ((MMC_SWITCH_PWR_CLASS_ARG) | (ext->pwr_class_200MHZ_VCCQ195 << 8));
443 cmd.response_type = SD_RSP_TYPE_R1b;
444 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
445 ret = sdhc_request(card->sdhc, &cmd, NULL);
446 sdmmc_wait_ready(card);
447 return ret;
448 }
449
mmc_set_timing(struct sd_card * card,struct mmc_ext_csd * ext)450 static int mmc_set_timing(struct sd_card *card, struct mmc_ext_csd *ext)
451 {
452 int ret = 0;
453 struct sdhc_command cmd = {0};
454
455 /* Timing depends on EXT_CSD register information */
456 if ((ext->device_type.MMC_HS200_SDR_1200MV || ext->device_type.MMC_HS200_SDR_1800MV) &&
457 (card->host_props.host_caps.hs200_support) &&
458 (card->bus_io.signal_voltage == SD_VOL_1_8_V) &&
459 (card->bus_io.bus_width >= SDHC_BUS_WIDTH4BIT)) {
460 ret = mmc_set_hs_timing(card);
461 if (ret) {
462 return ret;
463 }
464 cmd.arg = MMC_SWITCH_HS200_TIMING_ARG;
465 card->bus_io.clock = MMC_CLOCK_HS200;
466 card->bus_io.timing = SDHC_TIMING_HS200;
467 } else if (ext->device_type.MMC_HS_52_DV) {
468 return mmc_set_hs_timing(card);
469 } else if (ext->device_type.MMC_HS_26_DV) {
470 /* Nothing to do, card is already configured for this */
471 return 0;
472 } else {
473 return -ENOTSUP;
474 }
475
476 /* Set card timing mode */
477 cmd.opcode = SD_SWITCH;
478 cmd.response_type = SD_RSP_TYPE_R1b;
479 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
480 ret = sdhc_request(card->sdhc, &cmd, NULL);
481 if (ret) {
482 LOG_DBG("Error setting bus timing: %d", ret);
483 return ret;
484 }
485 ret = sdmmc_wait_ready(card);
486 if (ret) {
487 return ret;
488 }
489 card->card_speed = ((cmd.arg & 0xFF << 8) >> 8);
490
491 /* Set power class to match timing mode */
492 if (card->card_speed == MMC_HS200_TIMING) {
493 ret = mmc_set_power_class_HS200(card, ext);
494 if (ret) {
495 return ret;
496 }
497 }
498
499 /* Set SDHC bus io parameters */
500 ret = sdhc_set_io(card->sdhc, &card->bus_io);
501 if (ret) {
502 return ret;
503 }
504
505 /* Execute Tuning for HS200 */
506 if (card->card_speed == MMC_HS200_TIMING) {
507 ret = sdhc_execute_tuning(card->sdhc);
508 if (ret) {
509 LOG_ERR("MMC Tuning failed: %d", ret);
510 return ret;
511 }
512 }
513
514 /* Switch to HS400 if applicable */
515 if ((ext->device_type.MMC_HS400_DDR_1200MV || ext->device_type.MMC_HS400_DDR_1800MV) &&
516 (card->host_props.host_caps.hs400_support) &&
517 (card->bus_io.bus_width == SDHC_BUS_WIDTH8BIT)) {
518 /* Switch back to regular HS timing */
519 ret = mmc_set_hs_timing(card);
520 if (ret) {
521 LOG_ERR("Switching MMC back to HS from HS200 during HS400 init failed.");
522 return ret;
523 }
524 /* Set bus width to DDR 8 bit */
525 cmd.opcode = SD_SWITCH;
526 cmd.arg = MMC_SWITCH_8_BIT_DDR_BUS_ARG;
527 cmd.response_type = SD_RSP_TYPE_R1b;
528 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
529 ret = sdhc_request(card->sdhc, &cmd, NULL);
530 sdmmc_wait_ready(card);
531 if (ret) {
532 LOG_ERR("Setting DDR data bus width failed during HS400 init: %d", ret);
533 return ret;
534 }
535 /* Set card timing mode to HS400 */
536 cmd.opcode = SD_SWITCH;
537 cmd.arg = MMC_SWITCH_HS400_TIMING_ARG;
538 cmd.response_type = SD_RSP_TYPE_R1b;
539 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
540 ret = sdhc_request(card->sdhc, &cmd, NULL);
541 if (ret) {
542 LOG_DBG("Error setting card to HS400 bus timing: %d", ret);
543 return ret;
544 }
545 ret = sdmmc_wait_ready(card);
546 if (ret) {
547 return ret;
548 }
549 /* Set SDHC bus io parameters */
550 card->bus_io.clock = MMC_CLOCK_HS400;
551 card->bus_io.timing = SDHC_TIMING_HS400;
552 ret = sdhc_set_io(card->sdhc, &card->bus_io);
553 if (ret) {
554 return ret;
555 }
556 card->card_speed = ((cmd.arg & 0xFF << 8) >> 8);
557 }
558 return ret;
559 }
560
mmc_read_ext_csd(struct sd_card * card,struct mmc_ext_csd * card_ext_csd)561 static int mmc_read_ext_csd(struct sd_card *card, struct mmc_ext_csd *card_ext_csd)
562 {
563 int ret;
564 struct sdhc_command cmd = {0};
565 struct sdhc_data data = {0};
566
567 cmd.opcode = MMC_SEND_EXT_CSD;
568 cmd.arg = 0;
569 cmd.response_type = SD_RSP_TYPE_R1;
570 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
571
572 data.block_size = MMC_EXT_CSD_BYTES;
573 data.blocks = 1;
574 data.data = card->card_buffer;
575 data.timeout_ms = CONFIG_SD_DATA_TIMEOUT;
576
577 ret = sdhc_request(card->sdhc, &cmd, &data);
578 if (ret) {
579 LOG_ERR("CMD8 (send_ext_csd) failed: %d", ret);
580 return ret;
581 }
582
583 mmc_decode_ext_csd(card_ext_csd, card->card_buffer);
584 card->block_count = card_ext_csd->sec_count;
585 card->block_size = SDMMC_DEFAULT_BLOCK_SIZE;
586
587 LOG_INF("Card block count is %d, block size is %d", card->block_count, card->block_size);
588
589 return 0;
590 }
591
mmc_decode_ext_csd(struct mmc_ext_csd * ext,uint8_t * raw)592 static inline void mmc_decode_ext_csd(struct mmc_ext_csd *ext, uint8_t *raw)
593 {
594 ext->sec_count =
595 (raw[215U] << 24U) + (raw[214U] << 16U) + (raw[213U] << 8U) + (raw[212U] << 0U);
596 ext->bus_width = raw[183U];
597 ext->hs_timing = raw[185U];
598 ext->device_type.MMC_HS400_DDR_1200MV = ((1 << 7U) & raw[196U]);
599 ext->device_type.MMC_HS400_DDR_1800MV = ((1 << 6U) & raw[196U]);
600 ext->device_type.MMC_HS200_SDR_1200MV = ((1 << 5U) & raw[196U]);
601 ext->device_type.MMC_HS200_SDR_1800MV = ((1 << 4U) & raw[196U]);
602 ext->device_type.MMC_HS_DDR_1200MV = ((1 << 3U) & raw[196U]);
603 ext->device_type.MMC_HS_DDR_1800MV = ((1 << 2U) & raw[196U]);
604 ext->device_type.MMC_HS_52_DV = ((1 << 1U) & raw[196U]);
605 ext->device_type.MMC_HS_26_DV = ((1 << 0U) & raw[196U]);
606 ext->rev = raw[192U];
607 ext->power_class = (raw[187] & 0x0F);
608 ext->mmc_driver_strengths = raw[197U];
609 ext->pwr_class_200MHZ_VCCQ195 = raw[237U];
610 ext->cache_size =
611 (raw[252] << 24U) + (raw[251] << 16U) + (raw[250] << 8U) + (raw[249] << 0U);
612 }
613
mmc_set_cache(struct sd_card * card,struct mmc_ext_csd * card_ext_csd)614 static int mmc_set_cache(struct sd_card *card, struct mmc_ext_csd *card_ext_csd)
615 {
616 int ret = 0;
617 struct sdhc_command cmd = {0};
618
619 /* If there is no cache, don't use cache */
620 if (card_ext_csd->cache_size == 0) {
621 return 0;
622 }
623 /* CMD6 to write to EXT CSD to turn on cache */
624 cmd.opcode = SD_SWITCH;
625 cmd.arg = MMC_SWITCH_CACHE_ON_ARG;
626 cmd.response_type = SD_RSP_TYPE_R1b;
627 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
628 ret = sdhc_request(card->sdhc, &cmd, NULL);
629 if (ret) {
630 LOG_DBG("Error turning on card cache: %d", ret);
631 return ret;
632 }
633 ret = sdmmc_wait_ready(card);
634 return ret;
635 }
636
