1 /*
2 * Copyright 2022 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/drivers/sdhc.h>
8 #include <zephyr/kernel.h>
9 #include <zephyr/logging/log.h>
10 #include <zephyr/sd/mmc.h>
11 #include <zephyr/sd/sd.h>
12 #include <zephyr/sd/sd_spec.h>
13
14 #include "sd_ops.h"
15 #include "sd_utils.h"
16
17 /* These are used as specific arguments to commands */
18 /* For switch commands, the argument structure is:
19 * [31:26] : Set to 0
20 * [25:24] : Access
21 * [23:16] : Index (byte address in EXT_CSD)
22 * [15:8] : Value (data)
23 * [7:3] : Set to 0
24 * [2:0] : Cmd Set
25 */
26 #define MMC_SWITCH_8_BIT_DDR_BUS_ARG \
27 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
28 (0x0000FF00 & (6U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
29 #define MMC_SWITCH_8_BIT_BUS_ARG \
30 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
31 (0x0000FF00 & (2U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
32 #define MMC_SWITCH_4_BIT_BUS_ARG \
33 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (183U << 16)) + \
34 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
35 #define MMC_SWITCH_HS_TIMING_ARG \
36 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
37 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
38 #define MMC_SWITCH_HS400_TIMING_ARG \
39 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
40 (0x0000FF00 & (3U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
41 #define MMC_SWITCH_HS200_TIMING_ARG \
42 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (185U << 16)) + \
43 (0x0000FF00 & (2U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
44 #define MMC_RCA_ARG (CONFIG_MMC_RCA << 16U)
45 #define MMC_REL_ADR_ARG (card->relative_addr << 16U)
46 #define MMC_SWITCH_PWR_CLASS_ARG \
47 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (187U << 16)) + \
48 (0x0000FF00 & (0U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
49 #define MMC_SWITCH_CACHE_ON_ARG \
50 (0xFC000000 & (0U << 26)) + (0x03000000 & (0b11 << 24)) + (0x00FF0000 & (33U << 16)) + \
51 (0x0000FF00 & (1U << 8)) + (0x000000F7 & (0U << 3)) + (0x00000000 & (3U << 0))
52
53 LOG_MODULE_DECLARE(sd, CONFIG_SD_LOG_LEVEL);
54
mmc_write_blocks(struct sd_card * card,const uint8_t * wbuf,uint32_t start_block,uint32_t num_blocks)55 inline int mmc_write_blocks(struct sd_card *card, const uint8_t *wbuf, uint32_t start_block,
56 uint32_t num_blocks)
57 {
58 return card_write_blocks(card, wbuf, start_block, num_blocks);
59 }
60
mmc_read_blocks(struct sd_card * card,uint8_t * rbuf,uint32_t start_block,uint32_t num_blocks)61 inline int mmc_read_blocks(struct sd_card *card, uint8_t *rbuf, uint32_t start_block,
62 uint32_t num_blocks)
63 {
64 return card_read_blocks(card, rbuf, start_block, num_blocks);
65 }
66
mmc_ioctl(struct sd_card * card,uint8_t cmd,void * buf)67 inline int mmc_ioctl(struct sd_card *card, uint8_t cmd, void *buf)
68 {
69 return card_ioctl(card, cmd, buf);
70 }
71
72 /* Sends CMD1 */
73 static int mmc_send_op_cond(struct sd_card *card, int ocr);
74
75 /* Sends CMD3 */
76 static int mmc_set_rca(struct sd_card *card);
77
78 /* Sends CMD9 */
79 static int mmc_read_csd(struct sd_card *card, struct sd_csd *card_csd);
80 static inline void mmc_decode_csd(struct sd_csd *csd, uint32_t *raw_csd);
81
82 /* Sends CMD8 */
83 static int mmc_read_ext_csd(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
84 static inline void mmc_decode_ext_csd(struct mmc_ext_csd *ext_csd, uint8_t *raw);
85
86 /* Sets SDHC max frequency in legacy timing */
87 static inline int mmc_set_max_freq(struct sd_card *card, struct sd_csd *card_csd);
88
89 /* Sends CMD6 to switch bus width*/
90 static int mmc_set_bus_width(struct sd_card *card);
91
92 /* Sets card to the fastest timing mode (using CMD6) and SDHC to max frequency */
93 static int mmc_set_timing(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
94
95 /* Enable cache for emmc if applicable */
96 static int mmc_set_cache(struct sd_card *card, struct mmc_ext_csd *card_ext_csd);
97
98 /*
99 * Initialize MMC card for use with subsystem
100 */
mmc_card_init(struct sd_card * card)101 int mmc_card_init(struct sd_card *card)
102 {
103 int ret = 0;
104 uint32_t ocr_arg = 0U;
105 /* Keep CSDs on stack for reduced RAM usage */
106 struct sd_csd card_csd = {0};
107 struct mmc_ext_csd card_ext_csd = {0};
108
109 /* SPI is not supported for MMC */
110 if (card->host_props.is_spi) {
111 return -EINVAL;
112 }
113
114 /* Probe to see if card is an MMC card */
115 ret = mmc_send_op_cond(card, ocr_arg);
116 if (ret) {
117 return ret;
118 }
119 /* Card is MMC card if no error
120 * (Only MMC protocol supports CMD1)
121 */
122 card->type = CARD_MMC;
123
124 /* Set OCR Arguments */
125 if (card->host_props.host_caps.vol_180_support) {
126 ocr_arg |= MMC_OCR_VDD170_195FLAG;
127 }
128 if (card->host_props.host_caps.vol_330_support ||
129 card->host_props.host_caps.vol_300_support) {
130 ocr_arg |= MMC_OCR_VDD27_36FLAG;
131 }
132 /* Modern SDHC always at least supports 512 byte block sizes,
133 * which is enough to support sectors
134 */
135 ocr_arg |= MMC_OCR_SECTOR_MODE;
136
137 /* CMD1 */
138 ret = mmc_send_op_cond(card, ocr_arg);
139 if (ret) {
140 LOG_ERR("Failed to query card OCR");
141 return ret;
142 }
143
144 /* CMD2 */
145 ret = card_read_cid(card);
146 if (ret) {
147 return ret;
148 }
149
150 /* CMD3 */
151 ret = mmc_set_rca(card);
152 if (ret) {
153 LOG_ERR("Failed on sending RCA to card");
154 return ret;
155 }
156
157 /* CMD9 */
158 ret = mmc_read_csd(card, &card_csd);
159 if (ret) {
160 return ret;
161 }
162
163 /* Set max bus clock in legacy timing to speed up initialization
164 * Currently only eMMC is supported for this command
165 * Legacy MMC cards will initialize slowly
166 */
167 ret = mmc_set_max_freq(card, &card_csd);
168 if (ret) {
169 return ret;
170 }
171
172 /* CMD7 */
173 ret = sdmmc_select_card(card);
174 if (ret) {
175 return ret;
176 }
177
178 /* CMD6: Set bus width to max supported*/
179 ret = mmc_set_bus_width(card);
180 if (ret) {
181 return ret;
182 }
183
184 /* CMD8 */
185 ret = mmc_read_ext_csd(card, &card_ext_csd);
186 if (ret) {
187 return ret;
188 }
189
190 /* Set timing to fastest supported */
191 ret = mmc_set_timing(card, &card_ext_csd);
192 if (ret) {
193 return ret;
194 }
195
196 /* Turn on cache if it exists */
197 ret = mmc_set_cache(card, &card_ext_csd);
198 if (ret) {
199 return ret;
200 }
201
202 return 0;
203 }
204
mmc_send_op_cond(struct sd_card * card,int ocr)205 static int mmc_send_op_cond(struct sd_card *card, int ocr)
206 {
207 struct sdhc_command cmd = {0};
208 int ret = 0;
209 int retries;
210
211 cmd.opcode = MMC_SEND_OP_COND;
212 cmd.arg = ocr;
213 cmd.response_type = SD_RSP_TYPE_R3;
214 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
215
216 for (retries = 0;
217 retries < CONFIG_SD_OCR_RETRY_COUNT && !(cmd.response[0] & SD_OCR_PWR_BUSY_FLAG);
218 retries++) {
219 ret = sdhc_request(card->sdhc, &cmd, NULL);
220 if (ret) {
221 /* OCR failed */
222 return ret;
223 }
224 if (ocr == 0) {
225 /* Just probing */
226 return 0;
227 }
228 sd_delay(10);
229 }
230 if (retries >= CONFIG_SD_OCR_RETRY_COUNT) {
231 /* OCR timed out */
232 LOG_ERR("Card never left busy state");
233 return -ETIMEDOUT;
234 }
235 LOG_DBG("MMC responded to CMD1 after %d attempts", retries);
236
237 if (cmd.response[0] & MMC_OCR_VDD170_195FLAG) {
238 card->flags |= SD_1800MV_FLAG;
239 }
240 if (cmd.response[0] & MMC_OCR_VDD27_36FLAG) {
241 card->flags |= SD_3000MV_FLAG;
242 }
243
244 /* Switch to 1.8V */
245 if (card->host_props.host_caps.vol_180_support && (card->flags & SD_1800MV_FLAG)) {
246 card->bus_io.signal_voltage = SD_VOL_1_8_V;
247 ret = sdhc_set_io(card->sdhc, &card->bus_io);
248 if (ret) {
249 LOG_DBG("Failed to switch MMC host to 1.8V");
250 return ret;
251 }
252 sd_delay(10);
253
254 card->card_voltage = SD_VOL_1_8_V;
255 LOG_INF("Card switched to 1.8V signaling");
256 }
257
258 /* SD high Capacity is >2GB, the same as sector supporting MMC cards. */
259 if (cmd.response[0] & MMC_OCR_SECTOR_MODE) {
260 card->flags |= SD_HIGH_CAPACITY_FLAG;
261 }
262
263 return 0;
264 }
265
mmc_set_rca(struct sd_card * card)266 static int mmc_set_rca(struct sd_card *card)
267 {
268 struct sdhc_command cmd = {0};
269 int ret;
270
271 cmd.opcode = MMC_SEND_RELATIVE_ADDR;
272 cmd.arg = MMC_RCA_ARG;
273 cmd.response_type = SD_RSP_TYPE_R1;
274 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
275
276 ret = sdhc_request(card->sdhc, &cmd, NULL);
277 if (ret) {
278 return ret;
279 }
280 ret = sd_check_response(&cmd);
281 if (ret) {
282 return ret;
283 }
284
285 card->relative_addr = CONFIG_MMC_RCA;
286
287 return 0;
288 }
289
mmc_read_csd(struct sd_card * card,struct sd_csd * card_csd)290 static int mmc_read_csd(struct sd_card *card, struct sd_csd *card_csd)
291 {
292 int ret;
293 struct sdhc_command cmd = {0};
294
295 cmd.opcode = SD_SEND_CSD;
296 cmd.arg = MMC_REL_ADR_ARG;
297 cmd.response_type = SD_RSP_TYPE_R2;
298 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
299
300 ret = sdhc_request(card->sdhc, &cmd, NULL);
301 if (ret) {
302 LOG_DBG("CMD9 failed: %d", ret);
303 return ret;
304 }
305
306 mmc_decode_csd(card_csd, cmd.response);
307 if (card_csd->csd_structure < 2) {
308 LOG_ERR("Legacy MMC cards are not supported.");
309 return -ENOTSUP;
310 }
311
312 return 0;
313 }
314
mmc_decode_csd(struct sd_csd * csd,uint32_t * raw_csd)315 static inline void mmc_decode_csd(struct sd_csd *csd, uint32_t *raw_csd)
316 {
317 csd->csd_structure = (uint8_t)((raw_csd[3U] & 0xC0000000U) >> 30U);
318 csd->read_time1 = (uint8_t)((raw_csd[3U] & 0xFF0000U) >> 16U);
319 csd->read_time2 = (uint8_t)((raw_csd[3U] & 0xFF00U) >> 8U);
320 csd->xfer_rate = (uint8_t)(raw_csd[3U] & 0xFFU);
321 csd->cmd_class = (uint16_t)((raw_csd[2U] & 0xFFF00000U) >> 20U);
322 csd->read_blk_len = (uint8_t)((raw_csd[2U] & 0xF0000U) >> 16U);
323 if (raw_csd[2U] & 0x8000U) {
324 csd->flags |= SD_CSD_READ_BLK_PARTIAL_FLAG;
325 }
326 if (raw_csd[2U] & 0x4000U) {
327 csd->flags |= SD_CSD_READ_BLK_PARTIAL_FLAG;
328 }
329 if (raw_csd[2U] & 0x2000U) {
330 csd->flags |= SD_CSD_READ_BLK_MISALIGN_FLAG;
331 }
332 if (raw_csd[2U] & 0x1000U) {
333 csd->flags |= SD_CSD_DSR_IMPLEMENTED_FLAG;
334 }
335 csd->device_size =
336 (uint16_t)(((raw_csd[2U] & 0x3FFU) << 2U) + ((raw_csd[1U] & 0xC0000000U) >> 30U));
337 csd->read_current_min = (uint8_t)((raw_csd[1U] & 0x38000000U) >> 27U);
338 csd->read_current_max = (uint8_t)((raw_csd[1U] & 0x07000000U) >> 24U);
339 csd->write_current_min = (uint8_t)((raw_csd[1U] & 0x00E00000U) >> 21U);
340 csd->write_current_max = (uint8_t)((raw_csd[1U] & 0x001C0000U) >> 18U);
341 csd->dev_size_mul = (uint8_t)((raw_csd[1U] & 0x00038000U) >> 15U);
342 csd->erase_size = (uint8_t)((raw_csd[1U] & 0x00007C00U) >> 10U);
343 csd->write_prtect_size = (uint8_t)(raw_csd[1U] & 0x0000001FU);
344 csd->write_speed_factor = (uint8_t)((raw_csd[0U] & 0x1C000000U) >> 26U);
345 csd->write_blk_len = (uint8_t)((raw_csd[0U] & 0x03C00000U) >> 22U);
346 csd->file_fmt = (uint8_t)((raw_csd[0U] & 0x00000C00U) >> 10U);
347 }
348
mmc_set_max_freq(struct sd_card * card,struct sd_csd * card_csd)349 static inline int mmc_set_max_freq(struct sd_card *card, struct sd_csd *card_csd)
350 {
351 int ret;
352 enum mmc_csd_freq frequency_code = (card_csd->xfer_rate & 0x7);
353 enum mmc_csd_freq multiplier_code = (card_csd->xfer_rate & 0x78);
354
355 /* 4.3 - 5.1 emmc spec says 26 MHz */
356 if (frequency_code == MMC_MAXFREQ_10MHZ && multiplier_code == MMC_MAXFREQ_MULT_26) {
357 card->bus_io.clock = 26000000U;
358 card->bus_io.timing = SDHC_TIMING_LEGACY;
359 }
360 /* 4.0 - 4.2 emmc spec says 20 MHz */
361 else if (frequency_code == MMC_MAXFREQ_10MHZ && multiplier_code == MMC_MAXFREQ_MULT_20) {
362 card->bus_io.clock = 20000000U;
363 card->bus_io.timing = SDHC_TIMING_LEGACY;
364 } else {
365 LOG_INF("Using Legacy MMC will have slow initialization");
366 return 0;
367 }
368
369 ret = sdhc_set_io(card->sdhc, &card->bus_io);
370 if (ret) {
371 LOG_ERR("Error seetting initial clock frequency");
372 return ret;
373 }
374
375 return 0;
376 }
377
mmc_set_bus_width(struct sd_card * card)378 static int mmc_set_bus_width(struct sd_card *card)
379 {
380 int ret;
381 struct sdhc_command cmd = {0};
382
383 if (card->host_props.host_caps.bus_8_bit_support && card->bus_width == 8) {
384 cmd.arg = MMC_SWITCH_8_BIT_BUS_ARG;
385 card->bus_io.bus_width = SDHC_BUS_WIDTH8BIT;
386 } else if (card->host_props.host_caps.bus_4_bit_support && card->bus_width >= 4) {
387 cmd.arg = MMC_SWITCH_4_BIT_BUS_ARG;
388 card->bus_io.bus_width = SDHC_BUS_WIDTH4BIT;
389 } else {
390 /* If only 1 bit bus is supported, nothing to be done */
391 return 0;
392 }
393
394 /* Set Card Bus Width */
395 cmd.opcode = SD_SWITCH;
396 cmd.response_type = SD_RSP_TYPE_R1b;
397 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
398 ret = sdhc_request(card->sdhc, &cmd, NULL);
399 sdmmc_wait_ready(card);
400 if (ret) {
401 LOG_ERR("Setting card data bus width failed: %d", ret);
402 return ret;
403 }
404
405 /* Set host controller bus width */
406 ret = sdhc_set_io(card->sdhc, &card->bus_io);
407 if (ret) {
408 LOG_ERR("Setting SDHC data bus width failed: %d", ret);
409 return ret;
410 }
411
412 return ret;
413 }
414
mmc_set_hs_timing(struct sd_card * card)415 static int mmc_set_hs_timing(struct sd_card *card)
416 {
417 int ret = 0;
418 struct sdhc_command cmd = {0};
419
420 /* Change Card Timing Mode */
421 cmd.opcode = SD_SWITCH;
422 cmd.arg = MMC_SWITCH_HS_TIMING_ARG;
423 cmd.response_type = SD_RSP_TYPE_R1b;
424 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
425 ret = sdhc_request(card->sdhc, &cmd, NULL);
426 if (ret) {
427 LOG_DBG("Error setting bus timing: %d", ret);
428 return ret;
429 }
430 sdmmc_wait_ready(card);
431
432 /* Max frequency in HS mode is 52 MHz */
433 card->bus_io.clock = MMC_CLOCK_52MHZ;
434 card->bus_io.timing = SDHC_TIMING_HS;
435 /* Change SDHC bus timing */
436 ret = sdhc_set_io(card->sdhc, &card->bus_io);
437 if (ret) {
438 return ret;
439 }
440
441 return ret;
442 }
443
mmc_set_power_class_HS200(struct sd_card * card,struct mmc_ext_csd * ext)444 static int mmc_set_power_class_HS200(struct sd_card *card, struct mmc_ext_csd *ext)
445 {
446 int ret = 0;
447 struct sdhc_command cmd = {0};
448
449 cmd.opcode = SD_SWITCH;
450 cmd.arg = ((MMC_SWITCH_PWR_CLASS_ARG) | (ext->pwr_class_200MHZ_VCCQ195 << 8));
451 cmd.response_type = SD_RSP_TYPE_R1b;
452 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
453 ret = sdhc_request(card->sdhc, &cmd, NULL);
454 sdmmc_wait_ready(card);
455 return ret;
456 }
457
mmc_set_timing(struct sd_card * card,struct mmc_ext_csd * ext)458 static int mmc_set_timing(struct sd_card *card, struct mmc_ext_csd *ext)
459 {
460 int ret = 0;
461 struct sdhc_command cmd = {0};
462
463 /* Timing depends on EXT_CSD register information */
464 if ((ext->device_type.MMC_HS200_SDR_1200MV || ext->device_type.MMC_HS200_SDR_1800MV) &&
465 (card->host_props.host_caps.hs200_support) &&
466 (card->bus_io.signal_voltage == SD_VOL_1_8_V) &&
467 (card->bus_io.bus_width >= SDHC_BUS_WIDTH4BIT)) {
468 ret = mmc_set_hs_timing(card);
469 if (ret) {
470 return ret;
471 }
472 cmd.arg = MMC_SWITCH_HS200_TIMING_ARG;
473 card->bus_io.clock = MMC_CLOCK_HS200;
474 card->bus_io.timing = SDHC_TIMING_HS200;
475 } else if (ext->device_type.MMC_HS_52_DV) {
476 return mmc_set_hs_timing(card);
477 } else if (ext->device_type.MMC_HS_26_DV) {
478 /* Nothing to do, card is already configured for this */
479 return 0;
480 } else {
481 return -ENOTSUP;
482 }
483
484 /* Set card timing mode */
485 cmd.opcode = SD_SWITCH;
486 cmd.response_type = SD_RSP_TYPE_R1b;
487 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
488 ret = sdhc_request(card->sdhc, &cmd, NULL);
489 if (ret) {
490 LOG_DBG("Error setting bus timing: %d", ret);
491 return ret;
492 }
493 ret = sdmmc_wait_ready(card);
494 if (ret) {
495 return ret;
496 }
497 card->card_speed = ((cmd.arg & 0xFF << 8) >> 8);
498
499 /* Set power class to match timing mode */
500 if (card->card_speed == MMC_HS200_TIMING) {
501 ret = mmc_set_power_class_HS200(card, ext);
502 if (ret) {
503 return ret;
504 }
505 }
506
507 /* Set SDHC bus io parameters */
508 ret = sdhc_set_io(card->sdhc, &card->bus_io);
509 if (ret) {
510 return ret;
511 }
512
513 /* Execute Tuning for HS200 */
514 if (card->card_speed == MMC_HS200_TIMING) {
515 ret = sdhc_execute_tuning(card->sdhc);
516 if (ret) {
517 LOG_ERR("MMC Tuning failed: %d", ret);
518 return ret;
519 }
520 }
521
522 /* Switch to HS400 if applicable */
523 if ((ext->device_type.MMC_HS400_DDR_1200MV || ext->device_type.MMC_HS400_DDR_1800MV) &&
524 (card->host_props.host_caps.hs400_support) &&
525 (card->bus_io.bus_width == SDHC_BUS_WIDTH8BIT)) {
526 /* Switch back to regular HS timing */
527 ret = mmc_set_hs_timing(card);
528 if (ret) {
529 LOG_ERR("Switching MMC back to HS from HS200 during HS400 init failed.");
530 return ret;
531 }
532 /* Set bus width to DDR 8 bit */
533 cmd.opcode = SD_SWITCH;
534 cmd.arg = MMC_SWITCH_8_BIT_DDR_BUS_ARG;
535 cmd.response_type = SD_RSP_TYPE_R1b;
536 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
537 ret = sdhc_request(card->sdhc, &cmd, NULL);
538 sdmmc_wait_ready(card);
539 if (ret) {
540 LOG_ERR("Setting DDR data bus width failed during HS400 init: %d", ret);
541 return ret;
542 }
543 /* Set card timing mode to HS400 */
544 cmd.opcode = SD_SWITCH;
545 cmd.arg = MMC_SWITCH_HS400_TIMING_ARG;
546 cmd.response_type = SD_RSP_TYPE_R1b;
547 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
548 ret = sdhc_request(card->sdhc, &cmd, NULL);
549 if (ret) {
550 LOG_DBG("Error setting card to HS400 bus timing: %d", ret);
551 return ret;
552 }
553 ret = sdmmc_wait_ready(card);
554 if (ret) {
555 return ret;
556 }
557 /* Set SDHC bus io parameters */
558 card->bus_io.clock = MMC_CLOCK_HS400;
559 card->bus_io.timing = SDHC_TIMING_HS400;
560 ret = sdhc_set_io(card->sdhc, &card->bus_io);
561 if (ret) {
562 return ret;
563 }
564 card->card_speed = ((cmd.arg & 0xFF << 8) >> 8);
565 }
566 return ret;
567 }
568
mmc_read_ext_csd(struct sd_card * card,struct mmc_ext_csd * card_ext_csd)569 static int mmc_read_ext_csd(struct sd_card *card, struct mmc_ext_csd *card_ext_csd)
570 {
571 int ret;
572 struct sdhc_command cmd = {0};
573 struct sdhc_data data = {0};
574
575 cmd.opcode = MMC_SEND_EXT_CSD;
576 cmd.arg = 0;
577 cmd.response_type = SD_RSP_TYPE_R1;
578 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
579
580 data.block_size = MMC_EXT_CSD_BYTES;
581 data.blocks = 1;
582 data.data = card->card_buffer;
583 data.timeout_ms = CONFIG_SD_DATA_TIMEOUT;
584
585 ret = sdhc_request(card->sdhc, &cmd, &data);
586 if (ret) {
587 LOG_ERR("CMD8 (send_ext_csd) failed: %d", ret);
588 return ret;
589 }
590
591 mmc_decode_ext_csd(card_ext_csd, card->card_buffer);
592 card->block_count = card_ext_csd->sec_count;
593 card->block_size = SDMMC_DEFAULT_BLOCK_SIZE;
594
595 LOG_INF("Card block count is %d, block size is %d", card->block_count, card->block_size);
596
597 return 0;
598 }
599
mmc_decode_ext_csd(struct mmc_ext_csd * ext,uint8_t * raw)600 static inline void mmc_decode_ext_csd(struct mmc_ext_csd *ext, uint8_t *raw)
601 {
602 ext->sec_count =
603 (raw[215U] << 24U) + (raw[214U] << 16U) + (raw[213U] << 8U) + (raw[212U] << 0U);
604 ext->bus_width = raw[183U];
605 ext->hs_timing = raw[185U];
606 ext->device_type.MMC_HS400_DDR_1200MV = ((1 << 7U) & raw[196U]);
607 ext->device_type.MMC_HS400_DDR_1800MV = ((1 << 6U) & raw[196U]);
608 ext->device_type.MMC_HS200_SDR_1200MV = ((1 << 5U) & raw[196U]);
609 ext->device_type.MMC_HS200_SDR_1800MV = ((1 << 4U) & raw[196U]);
610 ext->device_type.MMC_HS_DDR_1200MV = ((1 << 3U) & raw[196U]);
611 ext->device_type.MMC_HS_DDR_1800MV = ((1 << 2U) & raw[196U]);
612 ext->device_type.MMC_HS_52_DV = ((1 << 1U) & raw[196U]);
613 ext->device_type.MMC_HS_26_DV = ((1 << 0U) & raw[196U]);
614 ext->rev = raw[192U];
615 ext->power_class = (raw[187] & 0x0F);
616 ext->mmc_driver_strengths = raw[197U];
617 ext->pwr_class_200MHZ_VCCQ195 = raw[237U];
618 ext->cache_size =
619 (raw[252] << 24U) + (raw[251] << 16U) + (raw[250] << 8U) + (raw[249] << 0U);
620 }
621
mmc_set_cache(struct sd_card * card,struct mmc_ext_csd * card_ext_csd)622 static int mmc_set_cache(struct sd_card *card, struct mmc_ext_csd *card_ext_csd)
623 {
624 int ret = 0;
625 struct sdhc_command cmd = {0};
626
627 /* If there is no cache, don't use cache */
628 if (card_ext_csd->cache_size == 0) {
629 return 0;
630 }
631 /* CMD6 to write to EXT CSD to turn on cache */
632 cmd.opcode = SD_SWITCH;
633 cmd.arg = MMC_SWITCH_CACHE_ON_ARG;
634 cmd.response_type = SD_RSP_TYPE_R1b;
635 cmd.timeout_ms = CONFIG_SD_CMD_TIMEOUT;
636 ret = sdhc_request(card->sdhc, &cmd, NULL);
637 if (ret) {
638 LOG_DBG("Error turning on card cache: %d", ret);
639 return ret;
640 }
641 ret = sdmmc_wait_ready(card);
642 return ret;
643 }
644
