1 /* 2 * Copyright (c) 2017-2019 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #if defined(CONFIG_BT_CTLR_DF_ADV_CTE_TX) 8 struct lll_df_adv_cfg; 9 #endif /* CONFIG_BT_CTLR_DF_ADV_CTE_TX */ 10 11 struct ll_adv_set { 12 struct ull_hdr ull; 13 struct lll_adv lll; 14 15 #if defined(CONFIG_BT_CTLR_AD_DATA_BACKUP) 16 /* Legacy AD Data backup when switching to legacy directed advertising 17 * or to Extended Advertising. 18 */ 19 struct { 20 uint8_t len; 21 uint8_t data[PDU_AC_LEG_DATA_SIZE_MAX]; 22 } ad_data_backup; 23 #endif /* CONFIG_BT_CTLR_AD_DATA_BACKUP */ 24 25 #if defined(CONFIG_BT_PERIPHERAL) 26 memq_link_t *link_cc_free; 27 struct node_rx_pdu *node_rx_cc_free; 28 #endif /* CONFIG_BT_PERIPHERAL */ 29 30 #if defined(CONFIG_BT_CTLR_ADV_EXT) 31 uint32_t interval; 32 uint8_t rnd_addr[BDADDR_SIZE]; 33 uint8_t sid:4; 34 uint8_t is_created:1; 35 uint8_t is_ad_data_cmplt:1; 36 #if defined(CONFIG_BT_CTLR_HCI_ADV_HANDLE_MAPPING) 37 uint8_t hci_handle; 38 #endif 39 uint8_t max_skip; 40 uint16_t event_counter; 41 uint16_t max_events; 42 uint32_t remain_duration_us; 43 #else /* !CONFIG_BT_CTLR_ADV_EXT */ 44 uint16_t interval; 45 #endif /* !CONFIG_BT_CTLR_ADV_EXT */ 46 47 uint8_t is_enabled:1; 48 49 #if defined(CONFIG_BT_CTLR_PRIVACY) 50 uint8_t own_addr_type:2; 51 uint8_t peer_addr_type:1; 52 uint8_t peer_addr[BDADDR_SIZE]; 53 #endif /* CONFIG_BT_CTLR_PRIVACY */ 54 55 #if defined(CONFIG_BT_CTLR_CHECK_SAME_PEER_CONN) 56 uint8_t own_id_addr[BDADDR_SIZE]; 57 #endif /* CONFIG_BT_CTLR_CHECK_SAME_PEER_CONN */ 58 59 #if defined(CONFIG_BT_CTLR_DF_ADV_CTE_TX) 60 struct lll_df_adv_cfg *df_cfg; 61 #endif /* CONFIG_BT_CTLR_DF_ADV_CTE_TX */ 62 63 64 #if defined(CONFIG_BT_CTLR_JIT_SCHEDULING) || \ 65 (defined(CONFIG_BT_CTLR_ADV_EXT) && \ 66 (CONFIG_BT_CTLR_ADV_AUX_SET > 0) && \ 67 !defined(CONFIG_BT_TICKER_EXT_EXPIRE_INFO)) 68 #if defined(CONFIG_BT_CTLR_JIT_SCHEDULING) 69 uint32_t delay; 70 uint32_t delay_at_expire; 71 #endif /* CONFIG_BT_CTLR_JIT_SCHEDULING */ 72 73 uint32_t ticks_at_expire; 74 #endif /* CONFIG_BT_CTLR_JIT_SCHEDULING || 75 * (CONFIG_BT_CTLR_ADV_EXT && 76 * (CONFIG_BT_CTLR_ADV_AUX_SET > 0) && 77 * !CONFIG_BT_TICKER_EXT_EXPIRE_INFO) 78 */ 79 }; 80 81 struct ll_adv_aux_set { 82 struct ull_hdr ull; 83 struct lll_adv_aux lll; 84 85 uint16_t interval; 86 87 uint16_t data_chan_id; 88 struct { 89 uint8_t data_chan_map[PDU_CHANNEL_MAP_SIZE]; 90 uint8_t data_chan_count:6; 91 } chm[DOUBLE_BUFFER_SIZE]; 92 uint8_t chm_first; 93 uint8_t chm_last; 94 95 uint8_t is_started:1; 96 }; 97 98 struct ll_adv_sync_set { 99 struct ull_hdr ull; 100 struct lll_adv_sync lll; 101 102 uint16_t interval; 103 104 uint8_t is_enabled:1; 105 uint8_t is_started:1; 106 uint8_t is_data_cmplt:1; 107 108 #if !defined(CONFIG_BT_TICKER_EXT_EXPIRE_INFO) 109 uint32_t aux_remainder; 110 #endif /* !CONFIG_BT_TICKER_EXT_EXPIRE_INFO */ 111 }; 112 113 struct ll_adv_iso_set { 114 struct ull_hdr ull; 115 struct lll_adv_iso lll; 116 117 uint32_t big_ref_point; /* Previously elapsed BIG reference point in 118 * microseconds of the free running Controller 119 * clock. 120 */ 121 122 struct node_rx_pdu node_rx_complete; 123 124 struct { 125 struct node_rx_pdu rx; 126 /* Dummy declaration to ensure space allocated to hold one pdu bytes */ 127 uint8_t dummy; 128 } node_rx_terminate; 129 130 #if defined(CONFIG_BT_CTLR_HCI_ADV_HANDLE_MAPPING) 131 uint8_t hci_handle; 132 #endif /* CONFIG_BT_CTLR_HCI_ADV_HANDLE_MAPPING */ 133 }; 134
