1 /** 2 * @file 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_SPI_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_SPI_H_ 28 29 /***** includes *******/ 30 #include <stdbool.h> 31 #include "spi_regs.h" 32 #include "mxc_sys.h" 33 #include "mxc_assert.h" 34 #include "gpio.h" 35 #include "mxc_pins.h" 36 #include "mxc_lock.h" 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 /** 43 * @defgroup spi SPI 44 * @ingroup periphlibs 45 * @{ 46 */ 47 48 /***** Definitions *****/ 49 50 /** 51 * @brief The list of SPI Widths supported 52 * 53 * The SPI Width can be set on a per-transaction basis. 54 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 55 * given. 56 * 57 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 58 * The IC requires a SPI Read to be executed as 59 * 1. Assert SS 60 * 2. Write an 8bit register address 61 * 3. Read back the 8 bit register 62 * 4. Deassert SS 63 * This can be accomplished with the STANDARD_HALFDUPLEX width 64 * 1. set txData to the address, txLen=1 65 * 2. set rxData to a buffer of 1 byte, rxLen=1 66 * 3. The driver will transmit the txData, and after completion of 67 * txData begin to recieve data, padding MOSI with DefaultTXData 68 * 69 */ 70 typedef enum { 71 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 72 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 73 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 74 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 75 } mxc_spi_width_t; 76 77 /** 78 * @brief The list of SPI modes 79 * 80 * SPI supports four combinations of clock and phase polarity 81 * 82 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 83 * and determines if the clock is active high or active low 84 * 85 * Clock phase determines when the data must be stable for sampling 86 * 87 */ 88 typedef enum { 89 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 90 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 91 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 92 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 93 } mxc_spi_mode_t; 94 95 typedef struct _mxc_spi_pins_t mxc_spi_pins_t; 96 97 /** 98 * @brief Structure used to initialize SPI pins. 99 * 100 * @note All values must be initialized. 101 * 102 * @note True equals pin is set for the spi function false the pin is left to its latest state. 103 */ 104 struct _mxc_spi_pins_t { 105 bool clock; ///< Clock pin 106 bool ss0; ///< Slave select pin 0 107 bool rsv0; ///< Reserved pin selection 0 108 bool rsv1; ///< Reserved pin selection 1 109 bool miso; ///< miso pin 110 bool mosi; ///< mosi pin 111 bool rsv2; ///< Reserved pin selection 2 112 bool rsv3; ///< Reserved pin selection 3 113 bool vssel; ///< VSSEL 114 bool map_a; ///< For SPI1, true = MAP_A pins, false = MAP_B pins 115 }; 116 117 typedef struct _mxc_spi_req_t mxc_spi_req_t; 118 /** 119 * @brief The callback routine used to indicate the transaction has terminated. 120 * 121 * @param req The details of the transaction. 122 * @param result See \ref MXC_Error_Codes for the list of error codes. 123 */ 124 typedef void (*spi_complete_cb_t)(void *req, int result); 125 126 /** 127 * @brief The information required to perform a complete SPI transaction 128 * 129 * This structure is used by blocking, async, and DMA based transactions. 130 * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. 131 */ 132 struct _mxc_spi_req_t { 133 mxc_spi_regs_t *spi; ///<Point to SPI registers 134 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 135 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 136 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 137 ///< < 8 bits, pad the MSB of each byte with zeros. For 138 ///< character sizes > 8 bits, use two bytes per character 139 ///< and pad the MSB of the upper byte with zeros 140 uint8_t *rxData; ///< Buffer to store received data For character sizes 141 ///< < 8 bits, pad the MSB of each byte with zeros. For 142 ///< character sizes > 8 bits, use two bytes per character 143 ///< and pad the MSB of the upper byte with zeros 144 uint32_t txLen; ///< Number of bytes to be sent from txData 145 uint32_t rxLen; ///< Number of bytes to be stored in rxData 146 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 147 uint32_t rxCnt; ///< Number of bytes stored in rxData 148 149 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 150 }; 151 152 /* ************************************************************************* */ 153 /* Control/Configuration functions */ 154 /* ************************************************************************* */ 155 156 /** 157 * @brief Initialize and enable SPI peripheral. 158 * 159 * This function initializes everything necessary to call a SPI transaction function. 160 * Some parameters are set to defaults as follows: 161 * SPI Mode - 0 162 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 163 * 164 * These parameters can be modified after initialization using low level functions 165 * 166 * @note On default this function enables SPI peripheral clock and spi gpio pins. 167 * if you wish to manage clock and gpio related things in upper level instead of here. 168 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 169 * By this flag this function will remove clock and gpio related codes from file. 170 * 171 * @param spi Pointer to SPI registers (selects the SPI block used.) 172 * @param masterMode Whether to put the device in master or slave mode. Use 173 * non-zero for master mode, and zero for slave mode. 174 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 175 * non-zero if the pins are needed (if Quad Mode will 176 * be used), and zero if they are not needed (quad mode 177 * will never be used). 178 * @param numSlaves The number of slaves used, if in master mode. This 179 * is used to obtain control of the necessary SS pins. 180 * In slave mode this is ignored and SS1 is used. 181 * @param ssPolarity This field sets the SS active polarity for each 182 * slave, each bit position corresponds to each SS line. 183 * @param hz The requested clock frequency. The actual clock frequency 184 * will be returned by the function if successful. Used in 185 * master mode only. 186 * @param pins SPI pin structure. Pins selected as true will be initialized 187 * for the requested SPI block. 188 * 189 * @return If successful, the actual clock frequency is returned. Otherwise, see 190 * \ref MXC_Error_Codes for a list of return codes. 191 */ 192 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 193 unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins); 194 195 /** 196 * @brief Disable and shutdown SPI peripheral. 197 * 198 * @param spi Pointer to SPI registers (selects the SPI block used.) 199 * 200 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 201 */ 202 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 203 204 /** 205 * @brief Checks if the given SPI bus can be placed in sleep mode. 206 * 207 * This functions checks to see if there are any on-going SPI transactions in 208 * progress. If there are transactions in progress, the application should 209 * wait until the SPI bus is free before entering a low-power state. 210 * 211 * @param spi Pointer to SPI registers (selects the SPI block used.) 212 * 213 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 214 * MXC_Error_Codes for the list of error return codes. 215 */ 216 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 217 218 /** 219 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 220 * 221 * @param spi Pointer to SPI registers (selects the SPI block used.) 222 * 223 * @return Frequency of the clock used as the bit rate generator 224 */ 225 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 226 227 /** 228 * @brief Set the frequency of the SPI interface. 229 * 230 * This function is applicable in Master mode only 231 * 232 * @param spi Pointer to SPI registers (selects the SPI block used.) 233 * @param hz The desired frequency in Hertz. 234 * 235 * @return Negative if error, otherwise actual speed set. See \ref 236 * MXC_Error_Codes for the list of error return codes. 237 */ 238 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 239 240 /** 241 * @brief Get the frequency of the SPI interface. 242 * 243 * This function is applicable in Master mode only 244 * 245 * @param spi Pointer to SPI registers (selects the SPI block used.) 246 * 247 * @return The SPI bus frequency in Hertz 248 */ 249 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 250 251 /** 252 * @brief Sets the number of bits per character 253 * 254 * @param spi Pointer to SPI registers (selects the SPI block used.) 255 * @param dataSize The number of bits per character 256 * 257 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 258 */ 259 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 260 261 /** 262 * @brief Gets the number of bits per character 263 * 264 * @param spi Pointer to SPI registers (selects the SPI block used.) 265 * 266 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 267 */ 268 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 269 270 /* ************************************************************************* */ 271 /* Low-level functions */ 272 /* ************************************************************************* */ 273 274 /** 275 * @brief Sets the slave select (SS) line used for transmissions 276 * 277 * This function is applicable in Master mode only 278 * 279 * @param spi Pointer to SPI registers (selects the SPI block used.) 280 * @param ssIdx Slave select index 281 * 282 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 283 */ 284 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 285 286 /** 287 * @brief Gets the slave select (SS) line used for transmissions 288 * 289 * This function is applicable in Master mode only 290 * 291 * @param spi Pointer to SPI registers (selects the SPI block used.) 292 * 293 * @return slave slect 294 */ 295 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 296 297 /** 298 * @brief Sets the SPI width used for transmissions 299 * 300 * @param spi Pointer to SPI registers (selects the SPI block used.) 301 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 302 * 303 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 304 */ 305 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 306 307 /** 308 * @brief Gets the SPI width used for transmissions 309 * 310 * @param spi Pointer to SPI registers (selects the SPI block used.) 311 * 312 * @return Spi Width 313 */ 314 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 315 316 /** 317 * @brief Sets the spi mode using clock polarity and clock phase 318 * 319 * @param spi Pointer to SPI registers (selects the SPI block used.) 320 * @param spiMode \ref mxc_spi_mode_t 321 * 322 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 323 */ 324 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 325 326 /** 327 * @brief Gets the spi mode 328 * 329 * @param spi Pointer to SPI registers (selects the SPI block used.) 330 * 331 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 332 */ 333 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 334 335 /** 336 * @brief Starts a SPI Transmission 337 * 338 * This function is applicable in Master mode only 339 * 340 * The user must ensure that there are no ongoing transmissions before 341 * calling this function 342 * 343 * @param spi Pointer to SPI registers (selects the SPI block used.) 344 * 345 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 346 */ 347 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 348 349 /** 350 * @brief Checks the SPI Peripheral for an ongoing transmission 351 * 352 * This function is applicable in Master mode only 353 * 354 * @param spi Pointer to SPI registers (selects the SPI block used.) 355 * 356 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 357 */ 358 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 359 360 /** 361 * @brief Aborts an ongoing SPI Transmission 362 * 363 * This function is applicable in Master mode only 364 * 365 * @param spi Pointer to SPI registers (selects the SPI block used.) 366 * 367 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 368 */ 369 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 370 371 /** 372 * @brief Unloads bytes from the receive FIFO. 373 * 374 * @param spi Pointer to SPI registers (selects the SPI block used.) 375 * @param bytes The buffer to read the data into. 376 * @param len The number of bytes to read. 377 * 378 * @return The number of bytes actually read. 379 */ 380 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 381 382 /** 383 * @brief Get the number of bytes currently available in the receive FIFO. 384 * 385 * @param spi Pointer to SPI registers (selects the SPI block used.) 386 * 387 * @return The number of bytes available. 388 */ 389 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 390 391 /** 392 * @brief Loads bytes into the transmit FIFO. 393 * 394 * @param spi Pointer to SPI registers (selects the SPI block used.) 395 * @param bytes The buffer containing the bytes to write 396 * @param len The number of bytes to write. 397 * 398 * @return The number of bytes actually written. 399 */ 400 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 401 402 /** 403 * @brief Get the amount of free space available in the transmit FIFO. 404 * 405 * @param spi Pointer to SPI registers (selects the SPI block used.) 406 * 407 * @return The number of bytes available. 408 */ 409 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 410 411 /** 412 * @brief Removes and discards all bytes currently in the receive FIFO. 413 * 414 * @param spi Pointer to SPI registers (selects the SPI block used.) 415 */ 416 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 417 418 /** 419 * @brief Removes and discards all bytes currently in the transmit FIFO. 420 * 421 * @param spi Pointer to SPI registers (selects the SPI block used.) 422 */ 423 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 424 425 /** 426 * @brief Set the receive threshold level. 427 * 428 * RX FIFO Receive threshold. Smaller values will cause 429 * interrupts to occur more often, but reduce the possibility 430 * of losing data because of a FIFO overflow. Larger values 431 * will reduce the time required by the ISR, but increase the 432 * possibility of data loss. Passing an invalid value will 433 * cause the driver to use the value already set in the 434 * appropriate register. 435 * 436 * @param spi Pointer to SPI registers (selects the SPI block used.) 437 * @param numBytes The threshold level to set. This value must be 438 * between 0 and 8 inclusive. 439 * 440 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 441 */ 442 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 443 444 /** 445 * @brief Get the current receive threshold level. 446 * 447 * @param spi Pointer to SPI registers (selects the SPI block used.) 448 * 449 * @return The receive threshold value (in bytes). 450 */ 451 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 452 453 /** 454 * @brief Set the transmit threshold level. 455 * 456 * TX FIFO threshold. Smaller values will cause interrupts 457 * to occur more often, but reduce the possibility of terminating 458 * a transaction early in master mode, or transmitting invalid data 459 * in slave mode. Larger values will reduce the time required by 460 * the ISR, but increase the possibility errors occurring. Passing 461 * an invalid value will cause the driver to use the value already 462 * set in the appropriate register. 463 * 464 * @param spi Pointer to SPI registers (selects the SPI block used.) 465 * @param numBytes The threshold level to set. This value must be 466 * between 0 and 8 inclusive. 467 * 468 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 469 */ 470 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 471 472 /** 473 * @brief Get the current transmit threshold level. 474 * 475 * @param spi Pointer to SPI registers (selects the SPI block used.) 476 * 477 * @return The transmit threshold value (in bytes). 478 */ 479 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 480 481 /** 482 * @brief Gets the interrupt flags that are currently set 483 * 484 * These functions should not be used while using non-blocking Transaction Level 485 * functions (Async or DMA) 486 * 487 * @param spi Pointer to SPI registers (selects the SPI block used.) 488 * 489 * @return The interrupt flags 490 */ 491 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 492 493 /** 494 * @brief Clears the interrupt flags that are currently set 495 * 496 * These functions should not be used while using non-blocking Transaction Level 497 * functions (Async or DMA) 498 * 499 * @param spi Pointer to SPI registers (selects the SPI block used.) 500 * 501 */ 502 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 503 504 /** 505 * @brief Enables specific interrupts 506 * 507 * These functions should not be used while using non-blocking Transaction Level 508 * functions (Async or DMA) 509 * 510 * @param spi Pointer to SPI registers (selects the SPI block used.) 511 * @param intEn The interrupts to be enabled 512 */ 513 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); 514 515 /** 516 * @brief Disables specific interrupts 517 * 518 * These functions should not be used while using non-blocking Transaction Level 519 * functions (Async or DMA) 520 * 521 * @param spi Pointer to SPI registers (selects the SPI block used.) 522 * @param intDis The interrupts to be disabled 523 */ 524 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); 525 526 /* ************************************************************************* */ 527 /* Transaction level functions */ 528 /* ************************************************************************* */ 529 530 /** 531 * @brief Performs a blocking SPI transaction. 532 * 533 * Performs a blocking SPI transaction. 534 * These actions will be performed in Master Mode: 535 * 1. Assert the specified SS 536 * 2. In Full Duplex Modes, send TX data while receiving RX Data 537 * if rxLen > txLen, pad txData with DefaultTXData 538 * if txLen > rxLen, discard rxData where rxCnt > rxLen 539 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 540 * 4. Deassert the specified SS 541 * 542 * These actions will be performed in Slave Mode: 543 * 1. Fill FIFO with txData 544 * 2. Wait for SS Assert 545 * 3. If needed, pad txData with DefaultTXData 546 * 4. Unload RX FIFO as needed 547 * 5. On SS Deassert, return 548 * 549 * @param req Pointer to details of the transaction 550 * 551 * @return See \ref MXC_Error_Codes for the list of error return codes. 552 */ 553 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 554 555 /** 556 * @brief Setup an interrupt-driven SPI transaction 557 * 558 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 559 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 560 * 561 * @param req Pointer to details of the transaction 562 * 563 * @return See \ref MXC_Error_Codes for the list of error return codes. 564 */ 565 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 566 567 /** 568 * @brief Setup a DMA driven SPI transaction 569 * 570 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 571 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 572 * 573 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 574 * set up to load/unload the FIFOs with as few interrupt-based events as 575 * possible. The channel will be reset and returned to the system at the end of 576 * the transaction. 577 * 578 * @param req Pointer to details of the transaction 579 * 580 * @return See \ref MXC_Error_Codes for the list of error return codes. 581 */ 582 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 583 584 /** 585 * @brief Performs a blocking SPI transaction. 586 * 587 * Performs a blocking SPI transaction. 588 * These actions will be performed in Slave Mode: 589 * 1. Fill FIFO with txData 590 * 2. Wait for SS Assert 591 * 3. If needed, pad txData with DefaultTXData 592 * 4. Unload RX FIFO as needed 593 * 5. On SS Deassert, return 594 * 595 * @param req Pointer to details of the transaction 596 * 597 * @return See \ref MXC_Error_Codes for the list of error return codes. 598 */ 599 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 600 601 /** 602 * @brief Setup an interrupt-driven SPI transaction 603 * 604 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 605 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 606 * 607 * @param req Pointer to details of the transactionz 608 * 609 * @return See \ref MXC_Error_Codes for the list of error return codes. 610 */ 611 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 612 613 /** 614 * @brief Setup a DMA driven SPI transaction 615 * 616 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 617 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 618 * 619 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 620 * set up to load/unload the FIFOs with as few interrupt-based events as 621 * possible. The channel will be reset and returned to the system at the end of 622 * the transaction. 623 * 624 * @param req Pointer to details of the transaction 625 * 626 * @return See \ref MXC_Error_Codes for the list of error return codes. 627 */ 628 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 629 630 /** 631 * @brief Sets the TX data to transmit as a 'dummy' byte 632 * 633 * In single wire master mode, this data is transmitted on MOSI when performing 634 * an RX (MISO) only transaction. This defaults to 0. 635 * 636 * @param spi Pointer to SPI registers (selects the SPI block used.) 637 * @param defaultTXData Data to shift out in RX-only transactions 638 * 639 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 640 */ 641 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 642 643 /** 644 * @brief Abort any asynchronous requests in progress. 645 * 646 * Abort any asynchronous requests in progress. Any callbacks associated with 647 * the active transaction will be executed to indicate when the transaction 648 * has been terminated. 649 * 650 * @param spi Pointer to SPI registers (selects the SPI block used.) 651 */ 652 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 653 654 /** 655 * @brief The processing function for asynchronous transactions. 656 * 657 * When using the asynchronous functions, the application must call this 658 * function periodically. This can be done from within the SPI interrupt 659 * handler or periodically by the application if SPI interrupts are disabled. 660 * 661 * @param spi Pointer to SPI registers (selects the SPI block used.) 662 */ 663 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 664 665 /** 666 * @brief Enable/Disable HW CS control feature. 667 * 668 * Depending on the application, the user might need to manually drive the slave select pin. 669 * The SPI driver automatically drives the SS pin and this function enables/disables this 670 * feature. 671 * 672 * @param spi Pointer to SPI registers (selects the SPI block used.) 673 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 674 */ 675 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 676 677 /**@} end of group spi */ 678 679 #ifdef __cplusplus 680 } 681 #endif 682 683 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_SPI_H_ 684
