1 /**
2 ******************************************************************************
3 * @file lsm303ah_reg.c
4 * @author Sensors Software Solution Team
5 * @brief LSM303AH driver file
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2021 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #include "lsm303ah_reg.h"
21
22 /**
23 * @defgroup LSM303AH
24 * @brief This file provides a set of functions needed to drive the
25 * lsm303ah enhanced inertial module.
26 * @{
27 *
28 */
29
30 /**
31 * @defgroup LSM303AH_Interfaces_Functions
32 * @brief This section provide a set of functions used to read and
33 * write a generic register of the device.
34 * MANDATORY: return 0 -> no Error.
35 * @{
36 *
37 */
38
39 /**
40 * @brief Read generic device register
41 *
42 * @param ctx read / write interface definitions(ptr)
43 * @param reg register to read
44 * @param data pointer to buffer that store the data read(ptr)
45 * @param len number of consecutive register to read
46 * @retval interface status (MANDATORY: return 0 -> no Error)
47 *
48 */
lsm303ah_read_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)49 int32_t __weak lsm303ah_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
50 uint8_t *data,
51 uint16_t len)
52 {
53 int32_t ret;
54
55 if (ctx == NULL)
56 {
57 return -1;
58 }
59
60 ret = ctx->read_reg(ctx->handle, reg, data, len);
61
62 return ret;
63 }
64
65 /**
66 * @brief Write generic device register
67 *
68 * @param ctx read / write interface definitions(ptr)
69 * @param reg register to write
70 * @param data pointer to data to write in register reg(ptr)
71 * @param len number of consecutive register to write
72 * @retval interface status (MANDATORY: return 0 -> no Error)
73 *
74 */
lsm303ah_write_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)75 int32_t __weak lsm303ah_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
76 uint8_t *data,
77 uint16_t len)
78 {
79 int32_t ret;
80
81 if (ctx == NULL)
82 {
83 return -1;
84 }
85
86 ret = ctx->write_reg(ctx->handle, reg, data, len);
87
88 return ret;
89 }
90
91 /**
92 * @}
93 *
94 */
95
96 /**
97 * @defgroup LSM303AH_Sensitivity
98 * @brief These functions convert raw-data into engineering units.
99 * @{
100 *
101 */
102
lsm303ah_from_fs2g_to_mg(int16_t lsb)103 float_t lsm303ah_from_fs2g_to_mg(int16_t lsb)
104 {
105 return ((float_t)lsb * 0.061f);
106 }
107
lsm303ah_from_fs4g_to_mg(int16_t lsb)108 float_t lsm303ah_from_fs4g_to_mg(int16_t lsb)
109 {
110 return ((float_t)lsb * 0.122f);
111 }
112
lsm303ah_from_fs8g_to_mg(int16_t lsb)113 float_t lsm303ah_from_fs8g_to_mg(int16_t lsb)
114 {
115 return ((float_t)lsb * 0.244f);
116 }
117
lsm303ah_from_fs16g_to_mg(int16_t lsb)118 float_t lsm303ah_from_fs16g_to_mg(int16_t lsb)
119 {
120 return ((float_t)lsb * 0.488f);
121 }
122
lsm303ah_from_lsb_to_mgauss(int16_t lsb)123 float_t lsm303ah_from_lsb_to_mgauss(int16_t lsb)
124 {
125 return ((float_t)lsb * 1.5f);
126 }
127
lsm303ah_from_lsb_to_celsius(int16_t lsb)128 float_t lsm303ah_from_lsb_to_celsius(int16_t lsb)
129 {
130 return (((float_t)lsb / 256.0f) + 25.0f);
131 }
132
133 /**
134 * @}
135 *
136 */
137
138 /**
139 * @defgroup Data Generation
140 * @brief This section groups all the functions concerning data generation.
141 * @{
142 *
143 */
144
145 /**
146 * @brief Read all the interrupt/status flag of the device.[get]
147 *
148 * @param ctx read / write interface definitions.(ptr)
149 * @param val get FIFO_SRC, STATUS_DUP, WAKE_UP_SRC,
150 * TAP_SRC, 6D_SRC, FUNC_CK_GATE, FUNC_SRC.(ptr)
151 * @retval Interface status (MANDATORY: return 0 -> no Error).
152 *
153 */
lsm303ah_xl_all_sources_get(const stmdev_ctx_t * ctx,lsm303ah_xl_all_sources_t * val)154 int32_t lsm303ah_xl_all_sources_get(const stmdev_ctx_t *ctx,
155 lsm303ah_xl_all_sources_t *val)
156 {
157 int32_t ret;
158
159 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A,
160 (uint8_t *) & (val->fifo_src_a), 1);
161
162 if (ret == 0)
163 {
164 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_DUP_A,
165 (uint8_t *) & (val->status_dup_a), 1);
166 }
167
168 if (ret == 0)
169 {
170 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_SRC_A,
171 (uint8_t *) & (val->wake_up_src_a), 1);
172 }
173
174 if (ret == 0)
175 {
176 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_SRC_A,
177 (uint8_t *) & (val->tap_src_a), 1);
178 }
179
180 if (ret == 0)
181 {
182 ret = lsm303ah_read_reg(ctx, LSM303AH_6D_SRC_A,
183 (uint8_t *) & (val->_6d_src_a), 1);
184 }
185
186 if (ret == 0)
187 {
188 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CK_GATE_A,
189 (uint8_t *) & (val->func_ck_gate_a), 1);
190 }
191
192 if (ret == 0)
193 {
194 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_SRC_A,
195 (uint8_t *) & (val->func_src_a), 1);
196 }
197
198 return ret;
199 }
200
201 /**
202 * @brief Block data update.[set]
203 *
204 * @param ctx read / write interface definitions.(ptr)
205 * @param val Change the values of bdu in reg CTRL1
206 * @retval Interface status (MANDATORY: return 0 -> no Error).
207 *
208 */
lsm303ah_xl_block_data_update_set(const stmdev_ctx_t * ctx,uint8_t val)209 int32_t lsm303ah_xl_block_data_update_set(const stmdev_ctx_t *ctx,
210 uint8_t val)
211 {
212 lsm303ah_ctrl1_a_t ctrl1_a;
213 int32_t ret;
214
215 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
216
217 if (ret == 0)
218 {
219 ctrl1_a.bdu = val;
220 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
221 }
222
223 return ret;
224 }
225
226 /**
227 * @brief Block data update.[get]
228 *
229 * @param ctx read / write interface definitions.(ptr)
230 * @param val get the values of bdu in reg CTRL1.(ptr)
231 * @retval Interface status (MANDATORY: return 0 -> no Error).
232 *
233 */
lsm303ah_xl_block_data_update_get(const stmdev_ctx_t * ctx,uint8_t * val)234 int32_t lsm303ah_xl_block_data_update_get(const stmdev_ctx_t *ctx,
235 uint8_t *val)
236 {
237 lsm303ah_ctrl1_a_t ctrl1_a;
238 int32_t ret;
239
240 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
241 *val = ctrl1_a.bdu;
242
243 return ret;
244 }
245
246 /**
247 * @brief Block data update.[set]
248 *
249 * @param ctx read / write interface definitions.(ptr)
250 * @param val Change the values of bdu in reg CFG_REG_C
251 * @retval Interface status (MANDATORY: return 0 -> no Error).
252 *
253 */
lsm303ah_mg_block_data_update_set(const stmdev_ctx_t * ctx,uint8_t val)254 int32_t lsm303ah_mg_block_data_update_set(const stmdev_ctx_t *ctx,
255 uint8_t val)
256 {
257 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
258 int32_t ret;
259
260 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
261 (uint8_t *)&cfg_reg_c_m, 1);
262
263 if (ret == 0)
264 {
265 cfg_reg_c_m.bdu = val;
266 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
267 (uint8_t *)&cfg_reg_c_m, 1);
268 }
269
270 return ret;
271 }
272
273 /**
274 * @brief Block data update.[get]
275 *
276 * @param ctx read / write interface definitions.(ptr)
277 * @param val get the values of bdu in reg CFG_REG_C.(ptr)
278 * @retval Interface status (MANDATORY: return 0 -> no Error).
279 *
280 */
lsm303ah_mg_block_data_update_get(const stmdev_ctx_t * ctx,uint8_t * val)281 int32_t lsm303ah_mg_block_data_update_get(const stmdev_ctx_t *ctx,
282 uint8_t *val)
283 {
284 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
285 int32_t ret;
286
287 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
288 (uint8_t *)&cfg_reg_c_m, 1);
289 *val = cfg_reg_c_m.bdu;
290
291 return ret;
292 }
293
294 /**
295 * @brief Big/Little Endian data selection.[set]
296 *
297 * @param ctx read / write interface definitions.(ptr)
298 * @param val Change the values of ble in reg CFG_REG_C
299 * @retval Interface status (MANDATORY: return 0 -> no Error).
300 *
301 */
lsm303ah_mg_data_format_set(const stmdev_ctx_t * ctx,lsm303ah_mg_ble_t val)302 int32_t lsm303ah_mg_data_format_set(const stmdev_ctx_t *ctx,
303 lsm303ah_mg_ble_t val)
304 {
305 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
306 int32_t ret;
307
308 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
309 (uint8_t *)&cfg_reg_c_m, 1);
310
311 if (ret == 0)
312 {
313 cfg_reg_c_m.ble = (uint8_t)val;
314 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
315 (uint8_t *)&cfg_reg_c_m, 1);
316 }
317
318 return ret;
319 }
320
321 /**
322 * @brief Big/Little Endian data selection.[get]
323 *
324 * @param ctx read / write interface definitions.(ptr)
325 * @param val Get the values of ble in reg CFG_REG_C.(ptr)
326 * @retval Interface status (MANDATORY: return 0 -> no Error).
327 *
328 */
lsm303ah_mg_data_format_get(const stmdev_ctx_t * ctx,lsm303ah_mg_ble_t * val)329 int32_t lsm303ah_mg_data_format_get(const stmdev_ctx_t *ctx,
330 lsm303ah_mg_ble_t *val)
331 {
332 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
333 int32_t ret;
334
335 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
336 (uint8_t *)&cfg_reg_c_m, 1);
337
338 switch (cfg_reg_c_m.ble)
339 {
340 case LSM303AH_MG_LSB_AT_LOW_ADD:
341 *val = LSM303AH_MG_LSB_AT_LOW_ADD;
342 break;
343
344 case LSM303AH_MG_MSB_AT_LOW_ADD:
345 *val = LSM303AH_MG_MSB_AT_LOW_ADD;
346 break;
347
348 default:
349 *val = LSM303AH_MG_LSB_AT_LOW_ADD;
350 break;
351 }
352
353 return ret;
354 }
355
356 /**
357 * @brief Accelerometer full-scale selection.[set]
358 *
359 * @param ctx read / write interface definitions.(ptr)
360 * @param val Change the values of fs in reg CTRL1
361 * @retval Interface status (MANDATORY: return 0 -> no Error).
362 *
363 */
lsm303ah_xl_full_scale_set(const stmdev_ctx_t * ctx,lsm303ah_xl_fs_t val)364 int32_t lsm303ah_xl_full_scale_set(const stmdev_ctx_t *ctx,
365 lsm303ah_xl_fs_t val)
366 {
367 lsm303ah_ctrl1_a_t ctrl1_a;
368 int32_t ret;
369
370 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
371
372 if (ret == 0)
373 {
374 ctrl1_a.fs = (uint8_t)val;
375 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
376 }
377
378 return ret;
379 }
380
381 /**
382 * @brief Accelerometer full-scale selection.[get]
383 *
384 * @param ctx read / write interface definitions.(ptr)
385 * @param val Get the values of fs in reg CTRL1.(ptr)
386 * @retval Interface status (MANDATORY: return 0 -> no Error).
387 *
388 */
lsm303ah_xl_full_scale_get(const stmdev_ctx_t * ctx,lsm303ah_xl_fs_t * val)389 int32_t lsm303ah_xl_full_scale_get(const stmdev_ctx_t *ctx,
390 lsm303ah_xl_fs_t *val)
391 {
392 lsm303ah_ctrl1_a_t ctrl1_a;
393 int32_t ret;
394
395 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
396
397 switch (ctrl1_a.fs)
398 {
399 case LSM303AH_XL_2g:
400 *val = LSM303AH_XL_2g;
401 break;
402
403 case LSM303AH_XL_16g:
404 *val = LSM303AH_XL_16g;
405 break;
406
407 case LSM303AH_XL_4g:
408 *val = LSM303AH_XL_4g;
409 break;
410
411 case LSM303AH_XL_8g:
412 *val = LSM303AH_XL_8g;
413 break;
414
415 default:
416 *val = LSM303AH_XL_2g;
417 break;
418 }
419
420 return ret;
421 }
422
423 /**
424 * @brief Accelerometer data rate selection.[set]
425 *
426 * @param ctx read / write interface definitions.(ptr)
427 * @param val Change the values of odr in reg CTRL1
428 * @retval Interface status (MANDATORY: return 0 -> no Error).
429 *
430 */
lsm303ah_xl_data_rate_set(const stmdev_ctx_t * ctx,lsm303ah_xl_odr_t val)431 int32_t lsm303ah_xl_data_rate_set(const stmdev_ctx_t *ctx,
432 lsm303ah_xl_odr_t val)
433 {
434 lsm303ah_ctrl1_a_t ctrl1_a;
435 int32_t ret;
436
437 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
438
439 if (ret == 0)
440 {
441 ctrl1_a.odr = (uint8_t)val & 0x0FU;
442 ctrl1_a.hf_odr = ((uint8_t)val & 0x10U) >> 4;
443 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
444 }
445
446 return ret;
447 }
448
449 /**
450 * @brief Accelerometer data rate selection.[get]
451 *
452 * @param ctx read / write interface definitions.(ptr)
453 * @param val Get the values of odr in reg CTRL1.(ptr)
454 * @retval Interface status (MANDATORY: return 0 -> no Error).
455 *
456 */
lsm303ah_xl_data_rate_get(const stmdev_ctx_t * ctx,lsm303ah_xl_odr_t * val)457 int32_t lsm303ah_xl_data_rate_get(const stmdev_ctx_t *ctx,
458 lsm303ah_xl_odr_t *val)
459 {
460 lsm303ah_ctrl1_a_t ctrl1_a;
461 int32_t ret;
462
463 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL1_A, (uint8_t *)&ctrl1_a, 1);
464
465 switch ((ctrl1_a.hf_odr << 4) + ctrl1_a.odr)
466 {
467 case LSM303AH_XL_ODR_OFF:
468 *val = LSM303AH_XL_ODR_OFF;
469 break;
470
471 case LSM303AH_XL_ODR_1Hz_LP:
472 *val = LSM303AH_XL_ODR_1Hz_LP;
473 break;
474
475 case LSM303AH_XL_ODR_12Hz5_LP:
476 *val = LSM303AH_XL_ODR_12Hz5_LP;
477 break;
478
479 case LSM303AH_XL_ODR_25Hz_LP:
480 *val = LSM303AH_XL_ODR_25Hz_LP;
481 break;
482
483 case LSM303AH_XL_ODR_50Hz_LP:
484 *val = LSM303AH_XL_ODR_50Hz_LP;
485 break;
486
487 case LSM303AH_XL_ODR_100Hz_LP:
488 *val = LSM303AH_XL_ODR_100Hz_LP;
489 break;
490
491 case LSM303AH_XL_ODR_200Hz_LP:
492 *val = LSM303AH_XL_ODR_200Hz_LP;
493 break;
494
495 case LSM303AH_XL_ODR_400Hz_LP:
496 *val = LSM303AH_XL_ODR_400Hz_LP;
497 break;
498
499 case LSM303AH_XL_ODR_800Hz_LP:
500 *val = LSM303AH_XL_ODR_800Hz_LP;
501 break;
502
503 case LSM303AH_XL_ODR_12Hz5_HR:
504 *val = LSM303AH_XL_ODR_12Hz5_HR;
505 break;
506
507 case LSM303AH_XL_ODR_25Hz_HR:
508 *val = LSM303AH_XL_ODR_25Hz_HR;
509 break;
510
511 case LSM303AH_XL_ODR_50Hz_HR:
512 *val = LSM303AH_XL_ODR_50Hz_HR;
513 break;
514
515 case LSM303AH_XL_ODR_100Hz_HR:
516 *val = LSM303AH_XL_ODR_100Hz_HR;
517 break;
518
519 case LSM303AH_XL_ODR_200Hz_HR:
520 *val = LSM303AH_XL_ODR_200Hz_HR;
521 break;
522
523 case LSM303AH_XL_ODR_400Hz_HR:
524 *val = LSM303AH_XL_ODR_400Hz_HR;
525 break;
526
527 case LSM303AH_XL_ODR_800Hz_HR:
528 *val = LSM303AH_XL_ODR_800Hz_HR;
529 break;
530
531 case LSM303AH_XL_ODR_1k6Hz_HF:
532 *val = LSM303AH_XL_ODR_1k6Hz_HF;
533 break;
534
535 case LSM303AH_XL_ODR_3k2Hz_HF:
536 *val = LSM303AH_XL_ODR_3k2Hz_HF;
537 break;
538
539 case LSM303AH_XL_ODR_6k4Hz_HF:
540 *val = LSM303AH_XL_ODR_6k4Hz_HF;
541 break;
542
543 default:
544 *val = LSM303AH_XL_ODR_OFF;
545 break;
546 }
547
548 return ret;
549 }
550
551 /**
552 * @brief The STATUS_REG register.[get]
553 *
554 * @param ctx read / write interface definitions.(ptr)
555 * @param val Get registers STATUS.(ptr)
556 * @retval Interface status (MANDATORY: return 0 -> no Error).
557 *
558 */
lsm303ah_xl_status_reg_get(const stmdev_ctx_t * ctx,lsm303ah_status_a_t * val)559 int32_t lsm303ah_xl_status_reg_get(const stmdev_ctx_t *ctx,
560 lsm303ah_status_a_t *val)
561 {
562 int32_t ret;
563
564 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_A, (uint8_t *) val, 1);
565
566 return ret;
567 }
568
569 /**
570 * @brief Info about device status.[get]
571 *
572 * @param ctx read / write interface definitions.(ptr)
573 * @param val Get registers STATUS_REG.(ptr)
574 * @retval Interface status (MANDATORY: return 0 -> no Error).
575 *
576 */
lsm303ah_mg_status_get(const stmdev_ctx_t * ctx,lsm303ah_status_reg_m_t * val)577 int32_t lsm303ah_mg_status_get(const stmdev_ctx_t *ctx,
578 lsm303ah_status_reg_m_t *val)
579 {
580 int32_t ret;
581
582 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_REG_M, (uint8_t *) val, 1);
583
584 return ret;
585 }
586
587 /**
588 * @brief Accelerometer new data available.[get]
589 *
590 * @param ctx read / write interface definitions.(ptr)
591 * @param val Get the values of drdy in reg STATUS.(ptr)
592 * @retval Interface status (MANDATORY: return 0 -> no Error).
593 *
594 */
lsm303ah_xl_flag_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)595 int32_t lsm303ah_xl_flag_data_ready_get(const stmdev_ctx_t *ctx,
596 uint8_t *val)
597 {
598 lsm303ah_status_a_t status_a;
599 int32_t ret;
600
601 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_A, (uint8_t *)&status_a, 1);
602 *val = status_a.drdy;
603
604 return ret;
605 }
606
607 /**
608 * @brief Magnetic set of data available.[get]
609 *
610 * @param ctx read / write interface definitions.(ptr)
611 * @param val Get the values of zyxda in reg STATUS_REG.(ptr)
612 * @retval Interface status (MANDATORY: return 0 -> no Error).
613 *
614 */
lsm303ah_mg_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)615 int32_t lsm303ah_mg_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
616 {
617 lsm303ah_status_reg_m_t status_reg_m;
618 int32_t ret;
619
620 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_REG_M,
621 (uint8_t *)&status_reg_m, 1);
622 *val = status_reg_m.zyxda;
623
624 return ret;
625 }
626
627 /**
628 * @brief Magnetic set of data overrun.[get]
629 *
630 * @param ctx read / write interface definitions.(ptr)
631 * @param val Get the values of zyxor in reg STATUS_REG.(ptr)
632 * @retval Interface status (MANDATORY: return 0 -> no Error).
633 *
634 */
lsm303ah_mg_data_ovr_get(const stmdev_ctx_t * ctx,uint8_t * val)635 int32_t lsm303ah_mg_data_ovr_get(const stmdev_ctx_t *ctx, uint8_t *val)
636 {
637 lsm303ah_status_reg_m_t status_reg_m;
638 int32_t ret;
639
640 ret = lsm303ah_read_reg(ctx, LSM303AH_STATUS_REG_M,
641 (uint8_t *)&status_reg_m, 1);
642 *val = status_reg_m.zyxor;
643
644 return ret;
645 }
646
647 /**
648 * @brief These registers comprise a 3 group of 16-bit number and represent
649 * hard-iron offset in order to compensate environmental effects. Data
650 * format is the same of output data raw: two’s complement with
651 * 1LSb = 1.5mG. These values act on the magnetic output data value in
652 * order to delete the environmental offset.[set]
653 *
654 * @param ctx read / write interface definitions.(ptr)
655 * @param buff buffer that contains data to write.(ptr)
656 * @retval Interface status (MANDATORY: return 0 -> no Error).
657 *
658 */
lsm303ah_mg_user_offset_set(const stmdev_ctx_t * ctx,int16_t * val)659 int32_t lsm303ah_mg_user_offset_set(const stmdev_ctx_t *ctx, int16_t *val)
660 {
661 uint8_t buff[6];
662 int32_t ret;
663
664 buff[1] = (uint8_t)((uint16_t)val[0] / 256U);
665 buff[0] = (uint8_t)((uint16_t)val[0] - (buff[1] * 256U));
666 buff[3] = (uint8_t)((uint16_t)val[1] / 256U);
667 buff[2] = (uint8_t)((uint16_t)val[1] - (buff[3] * 256U));
668 buff[5] = (uint8_t)((uint16_t)val[2] / 256U);
669 buff[4] = (uint8_t)((uint16_t)val[2] - (buff[5] * 256U));
670 ret = lsm303ah_write_reg(ctx, LSM303AH_OFFSET_X_REG_L_M, buff, 6);
671
672 return ret;
673 }
674
675 /**
676 * @brief These registers comprise a 3 group of 16-bit number and represent
677 * hard-iron offset in order to compensate environmental effects. Data
678 * format is the same of output data raw: two’s complement with
679 * 1LSb = 1.5mG. These values act on the magnetic output data value in
680 * order to delete the environmental offset.[get]
681 *
682 * @param ctx read / write interface definitions.(ptr)
683 * @param buff buffer that stores data read.(ptr)
684 * @retval Interface status (MANDATORY: return 0 -> no Error).
685 *
686 */
lsm303ah_mg_user_offset_get(const stmdev_ctx_t * ctx,int16_t * val)687 int32_t lsm303ah_mg_user_offset_get(const stmdev_ctx_t *ctx, int16_t *val)
688 {
689 uint8_t buff[6];
690 int32_t ret;
691
692 ret = lsm303ah_read_reg(ctx, LSM303AH_OFFSET_X_REG_L_M, buff, 6);
693 val[0] = (int16_t)buff[1];
694 val[0] = (val[0] * 256) + (int16_t)buff[0];
695 val[1] = (int16_t)buff[3];
696 val[1] = (val[1] * 256) + (int16_t)buff[2];
697 val[2] = (int16_t)buff[5];
698 val[2] = (val[2] * 256) + (int16_t)buff[4];
699
700 return ret;
701 }
702
703 /**
704 * @brief Operating mode selection.[set]
705 *
706 * @param ctx read / write interface definitions.(ptr)
707 * @param val Change the values of md in reg CFG_REG_A
708 * @retval Interface status (MANDATORY: return 0 -> no Error).
709 *
710 */
lsm303ah_mg_operating_mode_set(const stmdev_ctx_t * ctx,lsm303ah_mg_md_t val)711 int32_t lsm303ah_mg_operating_mode_set(const stmdev_ctx_t *ctx,
712 lsm303ah_mg_md_t val)
713 {
714 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
715 int32_t ret;
716
717 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
718 (uint8_t *)&cfg_reg_a_m, 1);
719
720 if (ret == 0)
721 {
722 cfg_reg_a_m.md = (uint8_t)val;
723 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
724 (uint8_t *)&cfg_reg_a_m, 1);
725 }
726
727 return ret;
728 }
729
730 /**
731 * @brief Operating mode selection.[get]
732 *
733 * @param ctx read / write interface definitions.(ptr)
734 * @param val Get the values of md in reg CFG_REG_A.(ptr)
735 * @retval Interface status (MANDATORY: return 0 -> no Error).
736 *
737 */
lsm303ah_mg_operating_mode_get(const stmdev_ctx_t * ctx,lsm303ah_mg_md_t * val)738 int32_t lsm303ah_mg_operating_mode_get(const stmdev_ctx_t *ctx,
739 lsm303ah_mg_md_t *val)
740 {
741 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
742 int32_t ret;
743
744 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
745 (uint8_t *)&cfg_reg_a_m, 1);
746
747 switch (cfg_reg_a_m.md)
748 {
749 case LSM303AH_MG_CONTINUOUS_MODE:
750 *val = LSM303AH_MG_CONTINUOUS_MODE;
751 break;
752
753 case LSM303AH_MG_SINGLE_TRIGGER:
754 *val = LSM303AH_MG_SINGLE_TRIGGER;
755 break;
756
757 case LSM303AH_MG_POWER_DOWN:
758 *val = LSM303AH_MG_POWER_DOWN;
759 break;
760
761 default:
762 *val = LSM303AH_MG_CONTINUOUS_MODE;
763 break;
764 }
765
766 return ret;
767 }
768
769 /**
770 * @brief Output data rate selection.[set]
771 *
772 * @param ctx read / write interface definitions.(ptr)
773 * @param val Change the values of odr in reg CFG_REG_A
774 * @retval Interface status (MANDATORY: return 0 -> no Error).
775 *
776 */
lsm303ah_mg_data_rate_set(const stmdev_ctx_t * ctx,lsm303ah_mg_odr_t val)777 int32_t lsm303ah_mg_data_rate_set(const stmdev_ctx_t *ctx,
778 lsm303ah_mg_odr_t val)
779 {
780 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
781 int32_t ret;
782
783 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
784 (uint8_t *)&cfg_reg_a_m, 1);
785
786 if (ret == 0)
787 {
788 cfg_reg_a_m.odr = (uint8_t)val;
789 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
790 (uint8_t *)&cfg_reg_a_m, 1);
791 }
792
793 return ret;
794 }
795
796 /**
797 * @brief Output data rate selection.[get]
798 *
799 * @param ctx read / write interface definitions.(ptr)
800 * @param val Get the values of odr in reg CFG_REG_A.(ptr)
801 * @retval Interface status (MANDATORY: return 0 -> no Error).
802 *
803 */
lsm303ah_mg_data_rate_get(const stmdev_ctx_t * ctx,lsm303ah_mg_odr_t * val)804 int32_t lsm303ah_mg_data_rate_get(const stmdev_ctx_t *ctx,
805 lsm303ah_mg_odr_t *val)
806 {
807 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
808 int32_t ret;
809
810 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
811 (uint8_t *)&cfg_reg_a_m, 1);
812
813 switch (cfg_reg_a_m.odr)
814 {
815 case LSM303AH_MG_ODR_10Hz:
816 *val = LSM303AH_MG_ODR_10Hz;
817 break;
818
819 case LSM303AH_MG_ODR_20Hz:
820 *val = LSM303AH_MG_ODR_20Hz;
821 break;
822
823 case LSM303AH_MG_ODR_50Hz:
824 *val = LSM303AH_MG_ODR_50Hz;
825 break;
826
827 case LSM303AH_MG_ODR_100Hz:
828 *val = LSM303AH_MG_ODR_100Hz;
829 break;
830
831 default:
832 *val = LSM303AH_MG_ODR_10Hz;
833 break;
834 }
835
836 return ret;
837 }
838
839 /**
840 * @brief Enables high-resolution/low-power mode.[set]
841 *
842 * @param ctx read / write interface definitions.(ptr)
843 * @param val Change the values of lp in reg CFG_REG_A
844 * @retval Interface status (MANDATORY: return 0 -> no Error).
845 *
846 */
lsm303ah_mg_power_mode_set(const stmdev_ctx_t * ctx,lsm303ah_mg_lp_t val)847 int32_t lsm303ah_mg_power_mode_set(const stmdev_ctx_t *ctx,
848 lsm303ah_mg_lp_t val)
849 {
850 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
851 int32_t ret;
852
853 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
854 (uint8_t *)&cfg_reg_a_m, 1);
855
856 if (ret == 0)
857 {
858 cfg_reg_a_m.lp = (uint8_t)val;
859 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
860 (uint8_t *)&cfg_reg_a_m, 1);
861 }
862
863 return ret;
864 }
865
866 /**
867 * @brief Enables high-resolution/low-power mode.[get]
868 *
869 * @param ctx read / write interface definitions.(ptr)
870 * @param val Get the values of lp in reg CFG_REG_A.(ptr)
871 * @retval Interface status (MANDATORY: return 0 -> no Error).
872 *
873 */
lsm303ah_mg_power_mode_get(const stmdev_ctx_t * ctx,lsm303ah_mg_lp_t * val)874 int32_t lsm303ah_mg_power_mode_get(const stmdev_ctx_t *ctx,
875 lsm303ah_mg_lp_t *val)
876 {
877 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
878 int32_t ret;
879
880 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
881 (uint8_t *)&cfg_reg_a_m, 1);
882
883 switch (cfg_reg_a_m.lp)
884 {
885 case LSM303AH_MG_HIGH_RESOLUTION:
886 *val = LSM303AH_MG_HIGH_RESOLUTION;
887 break;
888
889 case LSM303AH_MG_LOW_POWER:
890 *val = LSM303AH_MG_LOW_POWER;
891 break;
892
893 default:
894 *val = LSM303AH_MG_HIGH_RESOLUTION;
895 break;
896 }
897
898 return ret;
899 }
900
901 /**
902 * @brief Enables the magnetometer temperature compensation.[set]
903 *
904 * @param ctx read / write interface definitions.(ptr)
905 * @param val Change the values of comp_temp_en in reg CFG_REG_A
906 * @retval Interface status (MANDATORY: return 0 -> no Error).
907 *
908 */
lsm303ah_mg_offset_temp_comp_set(const stmdev_ctx_t * ctx,uint8_t val)909 int32_t lsm303ah_mg_offset_temp_comp_set(const stmdev_ctx_t *ctx,
910 uint8_t val)
911 {
912 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
913 int32_t ret;
914
915 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
916 (uint8_t *)&cfg_reg_a_m, 1);
917
918 if (ret == 0)
919 {
920 cfg_reg_a_m.comp_temp_en = val;
921 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
922 (uint8_t *)&cfg_reg_a_m, 1);
923 }
924
925 return ret;
926 }
927
928 /**
929 * @brief Enables the magnetometer temperature compensation.[get]
930 *
931 * @param ctx read / write interface definitions.(ptr)
932 * @param val Get the values of comp_temp_en in reg CFG_REG_A.(ptr)
933 * @retval Interface status (MANDATORY: return 0 -> no Error).
934 *
935 */
lsm303ah_mg_offset_temp_comp_get(const stmdev_ctx_t * ctx,uint8_t * val)936 int32_t lsm303ah_mg_offset_temp_comp_get(const stmdev_ctx_t *ctx,
937 uint8_t *val)
938 {
939 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
940 int32_t ret;
941
942 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
943 (uint8_t *)&cfg_reg_a_m, 1);
944 *val = cfg_reg_a_m.comp_temp_en;
945
946 return ret;
947 }
948
949 /**
950 * @brief Set/Reset mode.[set]
951 *
952 * @param ctx read / write interface definitions.(ptr)
953 * @param val Change the values of set_rst in reg CFG_REG_B
954 * @retval Interface status (MANDATORY: return 0 -> no Error).
955 *
956 */
lsm303ah_mg_set_rst_mode_set(const stmdev_ctx_t * ctx,lsm303ah_mg_set_rst_t val)957 int32_t lsm303ah_mg_set_rst_mode_set(const stmdev_ctx_t *ctx,
958 lsm303ah_mg_set_rst_t val)
959 {
960 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
961 int32_t ret;
962
963 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
964 (uint8_t *)&cfg_reg_b_m, 1);
965
966 if (ret == 0)
967 {
968 cfg_reg_b_m.set_rst = (uint8_t)val;
969 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_B_M,
970 (uint8_t *)&cfg_reg_b_m, 1);
971 }
972
973 return ret;
974 }
975
976 /**
977 * @brief Set/Reset mode.[get]
978 *
979 * @param ctx read / write interface definitions.(ptr)
980 * @param val Get the values of set_rst in reg CFG_REG_B.(ptr)
981 * @retval Interface status (MANDATORY: return 0 -> no Error).
982 *
983 */
lsm303ah_mg_set_rst_mode_get(const stmdev_ctx_t * ctx,lsm303ah_mg_set_rst_t * val)984 int32_t lsm303ah_mg_set_rst_mode_get(const stmdev_ctx_t *ctx,
985 lsm303ah_mg_set_rst_t *val)
986 {
987 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
988 int32_t ret;
989
990 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
991 (uint8_t *)&cfg_reg_b_m, 1);
992
993 switch (cfg_reg_b_m.set_rst)
994 {
995 case LSM303AH_MG_SET_SENS_ODR_DIV_63:
996 *val = LSM303AH_MG_SET_SENS_ODR_DIV_63;
997 break;
998
999 case LSM303AH_MG_SENS_OFF_CANC_EVERY_ODR:
1000 *val = LSM303AH_MG_SENS_OFF_CANC_EVERY_ODR;
1001 break;
1002
1003 case LSM303AH_MG_SET_SENS_ONLY_AT_POWER_ON:
1004 *val = LSM303AH_MG_SET_SENS_ONLY_AT_POWER_ON;
1005 break;
1006
1007 default:
1008 *val = LSM303AH_MG_SET_SENS_ODR_DIV_63;
1009 break;
1010 }
1011
1012 return ret;
1013 }
1014
1015 /**
1016 * @brief Enables offset cancellation in single measurement mode. The
1017 * OFF_CANC bit must be set to 1 when enabling offset cancellation
1018 * in single measurement mode this means a call function:
1019 * set_rst_mode(SENS_OFF_CANC_EVERY_ODR) is need.[set]
1020 *
1021 * @param ctx read / write interface definitions.(ptr)
1022 * @param val Change the values of off_canc_one_shot in reg CFG_REG_B
1023 * @retval Interface status (MANDATORY: return 0 -> no Error).
1024 *
1025 */
lsm303ah_mg_set_rst_sensor_single_set(const stmdev_ctx_t * ctx,uint8_t val)1026 int32_t lsm303ah_mg_set_rst_sensor_single_set(const stmdev_ctx_t *ctx,
1027 uint8_t val)
1028 {
1029 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
1030 int32_t ret;
1031
1032 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
1033 (uint8_t *)&cfg_reg_b_m, 1);
1034
1035 if (ret == 0)
1036 {
1037 cfg_reg_b_m.off_canc_one_shot = val;
1038 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_B_M,
1039 (uint8_t *)&cfg_reg_b_m, 1);
1040 }
1041
1042 return ret;
1043 }
1044
1045 /**
1046 * @brief Enables offset cancellation in single measurement mode. The
1047 * OFF_CANC bit must be set to 1 when enabling offset cancellation
1048 * in single measurement mode this means a call function:
1049 * set_rst_mode(SENS_OFF_CANC_EVERY_ODR) is need.[get]
1050 *
1051 * @param ctx read / write interface definitions.(ptr)
1052 * @param val Get the values of off_canc_one_shot in reg CFG_REG_B.(ptr)
1053 * @retval Interface status (MANDATORY: return 0 -> no Error).
1054 *
1055 */
lsm303ah_mg_set_rst_sensor_single_get(const stmdev_ctx_t * ctx,uint8_t * val)1056 int32_t lsm303ah_mg_set_rst_sensor_single_get(const stmdev_ctx_t *ctx,
1057 uint8_t *val)
1058 {
1059 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
1060 int32_t ret;
1061
1062 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
1063 (uint8_t *)&cfg_reg_b_m, 1);
1064 *val = cfg_reg_b_m.off_canc_one_shot;
1065
1066 return ret;
1067 }
1068
1069 /**
1070 * @}
1071 *
1072 */
1073
1074 /**
1075 * @defgroup Dataoutput
1076 * @brief This section groups all the data output functions.
1077 * @{
1078 *
1079 */
1080
1081 /**
1082 * @brief Module output value (8-bit).[get]
1083 *
1084 * @param ctx read / write interface definitions.(ptr)
1085 * @param buff buffer that stores data read.(ptr)
1086 * @retval Interface status (MANDATORY: return 0 -> no Error).
1087 *
1088 */
lsm303ah_acceleration_module_raw_get(const stmdev_ctx_t * ctx,uint8_t * buff)1089 int32_t lsm303ah_acceleration_module_raw_get(const stmdev_ctx_t *ctx,
1090 uint8_t *buff)
1091 {
1092 int32_t ret;
1093
1094 ret = lsm303ah_read_reg(ctx, LSM303AH_MODULE_8BIT_A, buff, 1);
1095
1096 return ret;
1097 }
1098
1099 /**
1100 * @brief Temperature data output register (r). L and H registers together
1101 * express a 16-bit word in two’s complement.[get]
1102 *
1103 * @param ctx read / write interface definitions.(ptr)
1104 * @param buff buffer that stores data read.(ptr)
1105 * @retval Interface status (MANDATORY: return 0 -> no Error).
1106 *
1107 */
lsm303ah_xl_temperature_raw_get(const stmdev_ctx_t * ctx,uint8_t * buff)1108 int32_t lsm303ah_xl_temperature_raw_get(const stmdev_ctx_t *ctx,
1109 uint8_t *buff)
1110 {
1111 int32_t ret;
1112
1113 ret = lsm303ah_read_reg(ctx, LSM303AH_OUT_T_A, buff, 1);
1114
1115 return ret;
1116 }
1117
1118 /**
1119 * @brief Linear acceleration output register.
1120 * The value is expressed as a 16-bit word in two’s complement.[get]
1121 *
1122 * @param ctx read / write interface definitions.(ptr)
1123 * @param buff buffer that stores data read.(ptr)
1124 * @retval Interface status (MANDATORY: return 0 -> no Error).
1125 *
1126 */
lsm303ah_acceleration_raw_get(const stmdev_ctx_t * ctx,int16_t * val)1127 int32_t lsm303ah_acceleration_raw_get(const stmdev_ctx_t *ctx, int16_t *val)
1128 {
1129 uint8_t buff[6];
1130 int32_t ret;
1131
1132 ret = lsm303ah_read_reg(ctx, LSM303AH_OUT_X_L_A, buff, 6);
1133 val[0] = (int16_t)buff[1];
1134 val[0] = (val[0] * 256) + (int16_t)buff[0];
1135 val[1] = (int16_t)buff[3];
1136 val[1] = (val[1] * 256) + (int16_t)buff[2];
1137 val[2] = (int16_t)buff[5];
1138 val[2] = (val[2] * 256) + (int16_t)buff[4];
1139
1140 return ret;
1141 }
1142
1143 /**
1144 * @brief Magnetic output value.[get]
1145 *
1146 * @param ctx read / write interface definitions.(ptr)
1147 * @param buff buffer that stores data read.(ptr)
1148 * @retval Interface status (MANDATORY: return 0 -> no Error).
1149 *
1150 */
lsm303ah_magnetic_raw_get(const stmdev_ctx_t * ctx,int16_t * val)1151 int32_t lsm303ah_magnetic_raw_get(const stmdev_ctx_t *ctx, int16_t *val)
1152 {
1153 uint8_t buff[6];
1154 int32_t ret;
1155
1156 ret = lsm303ah_read_reg(ctx, LSM303AH_OUTX_L_REG_M, buff, 6);
1157 val[0] = (int16_t)buff[1];
1158 val[0] = (val[0] * 256) + (int16_t)buff[0];
1159 val[1] = (int16_t)buff[3];
1160 val[1] = (val[1] * 256) + (int16_t)buff[2];
1161 val[2] = (int16_t)buff[5];
1162 val[2] = (val[2] * 256) + (int16_t)buff[4];
1163
1164 return ret;
1165 }
1166
1167 /**
1168 * @brief Number of steps detected by step counter routine.[get]
1169 *
1170 * @param ctx read / write interface definitions.(ptr)
1171 * @param buff buffer that stores data read.(ptr)
1172 * @retval Interface status (MANDATORY: return 0 -> no Error).
1173 *
1174 */
lsm303ah_number_of_steps_get(const stmdev_ctx_t * ctx,uint16_t * val)1175 int32_t lsm303ah_number_of_steps_get(const stmdev_ctx_t *ctx, uint16_t *val)
1176 {
1177 uint8_t buff[2];
1178 int32_t ret;
1179
1180 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_L_A, buff, 2);
1181 *val = buff[1];
1182 *val = (*val * 256U) + buff[0];
1183
1184 return ret;
1185 }
1186
1187 /**
1188 * @}
1189 *
1190 */
1191
1192 /**
1193 * @defgroup common
1194 * @brief This section groups common useful functions.
1195 * @{
1196 *
1197 */
1198
1199 /**
1200 * @brief DeviceWhoamI.[get]
1201 *
1202 * @param ctx read / write interface definitions.(ptr)
1203 * @param buff buffer that stores data read.(ptr)
1204 * @retval Interface status (MANDATORY: return 0 -> no Error).
1205 *
1206 */
lsm303ah_xl_device_id_get(const stmdev_ctx_t * ctx,uint8_t * buff)1207 int32_t lsm303ah_xl_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
1208 {
1209 int32_t ret;
1210
1211 ret = lsm303ah_read_reg(ctx, LSM303AH_WHO_AM_I_A, buff, 1);
1212
1213 return ret;
1214 }
1215
1216 /**
1217 * @brief DeviceWhoamI.[get]
1218 *
1219 * @param ctx read / write interface definitions.(ptr)
1220 * @param buff buffer that stores data read.(ptr)
1221 * @retval Interface status (MANDATORY: return 0 -> no Error).
1222 *
1223 */
lsm303ah_mg_device_id_get(const stmdev_ctx_t * ctx,uint8_t * buff)1224 int32_t lsm303ah_mg_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
1225 {
1226 int32_t ret;
1227
1228 ret = lsm303ah_read_reg(ctx, LSM303AH_WHO_AM_I_M, buff, 1);
1229
1230 return ret;
1231 }
1232
1233 /**
1234 * @brief Register address automatically incremented during a multiple byte
1235 * access with a serial interface.[set]
1236 *
1237 * @param ctx read / write interface definitions.(ptr)
1238 * @param val Change the values of if_add_inc in reg CTRL2
1239 * @retval Interface status (MANDATORY: return 0 -> no Error).
1240 *
1241 */
lsm303ah_xl_auto_increment_set(const stmdev_ctx_t * ctx,uint8_t val)1242 int32_t lsm303ah_xl_auto_increment_set(const stmdev_ctx_t *ctx, uint8_t val)
1243 {
1244 lsm303ah_ctrl2_a_t ctrl2_a;
1245 int32_t ret;
1246
1247 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1248
1249 if (ret == 0)
1250 {
1251 ctrl2_a.if_add_inc = val;
1252 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1253 }
1254
1255 return ret;
1256 }
1257
1258 /**
1259 * @brief Register address automatically incremented during a multiple byte
1260 * access with a serial interface.[get]
1261 *
1262 * @param ctx read / write interface definitions.(ptr)
1263 * @param val Get the values of if_add_inc in reg CTRL2.(ptr)
1264 * @retval Interface status (MANDATORY: return 0 -> no Error).
1265 *
1266 */
lsm303ah_xl_auto_increment_get(const stmdev_ctx_t * ctx,uint8_t * val)1267 int32_t lsm303ah_xl_auto_increment_get(const stmdev_ctx_t *ctx,
1268 uint8_t *val)
1269 {
1270 lsm303ah_ctrl2_a_t ctrl2_a;
1271 int32_t ret;
1272
1273 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1274 *val = ctrl2_a.if_add_inc;
1275
1276 return ret;
1277 }
1278
1279 /**
1280 * @brief Enable access to the embedded functions/sensor
1281 * hub configuration registers.[set]
1282 *
1283 * @param ctx read / write interface definitions.(ptr)
1284 * @param val Change the values of func_cfg_en in reg CTRL2
1285 * @retval Interface status (MANDATORY: return 0 -> no Error).
1286 *
1287 */
lsm303ah_xl_mem_bank_set(const stmdev_ctx_t * ctx,lsm303ah_xl_func_cfg_en_t val)1288 int32_t lsm303ah_xl_mem_bank_set(const stmdev_ctx_t *ctx,
1289 lsm303ah_xl_func_cfg_en_t val)
1290 {
1291 lsm303ah_ctrl2_a_t ctrl2_a;
1292 lsm303ah_ctrl2_adv_a_t ctrl2_adv_a;
1293 int32_t ret;
1294
1295
1296 if (val == LSM303AH_XL_ADV_BANK)
1297 {
1298 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1299
1300 if (ret == 0)
1301 {
1302 ctrl2_a.func_cfg_en = (uint8_t)val;
1303 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1304 }
1305 }
1306
1307 else
1308 {
1309 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_ADV_A,
1310 (uint8_t *)&ctrl2_adv_a, 1);
1311
1312 if (ret == 0)
1313 {
1314 ctrl2_adv_a.func_cfg_en = (uint8_t)val;
1315 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_ADV_A,
1316 (uint8_t *)&ctrl2_adv_a, 1);
1317 }
1318 }
1319
1320 return ret;
1321 }
1322
1323 /**
1324 * @brief Software reset. Restore the default values in user registers.[set]
1325 *
1326 * @param ctx read / write interface definitions.(ptr)
1327 * @param val Change the values of soft_reset in reg CTRL2
1328 * @retval Interface status (MANDATORY: return 0 -> no Error).
1329 *
1330 */
lsm303ah_xl_reset_set(const stmdev_ctx_t * ctx,uint8_t val)1331 int32_t lsm303ah_xl_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
1332 {
1333 lsm303ah_ctrl2_a_t ctrl2_a;
1334 int32_t ret;
1335
1336 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1337
1338 if (ret == 0)
1339 {
1340 ctrl2_a.soft_reset = val;
1341 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1342 }
1343
1344 return ret;
1345 }
1346
1347 /**
1348 * @brief Software reset. Restore the default values in user registers.[get]
1349 *
1350 * @param ctx read / write interface definitions.(ptr)
1351 * @param val Get the values of soft_reset in reg CTRL2.(ptr)
1352 * @retval Interface status (MANDATORY: return 0 -> no Error).
1353 *
1354 */
lsm303ah_xl_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)1355 int32_t lsm303ah_xl_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
1356 {
1357 lsm303ah_ctrl2_a_t ctrl2_a;
1358 int32_t ret;
1359
1360 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1361 *val = ctrl2_a.soft_reset;
1362
1363 return ret;
1364 }
1365
1366 /**
1367 * @brief Software reset. Restore the default values in user registers.[set]
1368 *
1369 * @param ctx read / write interface definitions.(ptr)
1370 * @param val Change the values of soft_rst in reg CFG_REG_A
1371 * @retval Interface status (MANDATORY: return 0 -> no Error).
1372 *
1373 */
lsm303ah_mg_reset_set(const stmdev_ctx_t * ctx,uint8_t val)1374 int32_t lsm303ah_mg_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
1375 {
1376 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
1377 int32_t ret;
1378
1379 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
1380 (uint8_t *)&cfg_reg_a_m, 1);
1381
1382 if (ret == 0)
1383 {
1384 cfg_reg_a_m.soft_rst = val;
1385 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
1386 (uint8_t *)&cfg_reg_a_m, 1);
1387 }
1388
1389 return ret;
1390 }
1391
1392 /**
1393 * @brief Software reset. Restore the default values in user registers.[get]
1394 *
1395 * @param ctx read / write interface definitions.(ptr)
1396 * @param val Get the values of soft_rst in reg CFG_REG_A.(ptr)
1397 * @retval Interface status (MANDATORY: return 0 -> no Error).
1398 *
1399 */
lsm303ah_mg_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)1400 int32_t lsm303ah_mg_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
1401 {
1402 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
1403 int32_t ret;
1404
1405 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
1406 (uint8_t *)&cfg_reg_a_m, 1);
1407 *val = cfg_reg_a_m.soft_rst;
1408
1409 return ret;
1410 }
1411
1412 /**
1413 * @brief Reboot memory content. Reload the calibration parameters.[set]
1414 *
1415 * @param ctx read / write interface definitions.(ptr)
1416 * @param val Change the values of boot in reg CTRL2
1417 * @retval Interface status (MANDATORY: return 0 -> no Error).
1418 *
1419 */
lsm303ah_xl_boot_set(const stmdev_ctx_t * ctx,uint8_t val)1420 int32_t lsm303ah_xl_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
1421 {
1422 lsm303ah_ctrl2_a_t ctrl2_a;
1423 int32_t ret;
1424
1425 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1426
1427 if (ret == 0)
1428 {
1429 ctrl2_a.boot = val;
1430 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1431 }
1432
1433 return ret;
1434 }
1435
1436 /**
1437 * @brief Reboot memory content. Reload the calibration parameters.[get]
1438 *
1439 * @param ctx read / write interface definitions.(ptr)
1440 * @param val Get the values of boot in reg CTRL2.(ptr)
1441 * @retval Interface status (MANDATORY: return 0 -> no Error).
1442 *
1443 */
lsm303ah_xl_boot_get(const stmdev_ctx_t * ctx,uint8_t * val)1444 int32_t lsm303ah_xl_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
1445 {
1446 lsm303ah_ctrl2_a_t ctrl2_a;
1447 int32_t ret;
1448
1449 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1450 *val = ctrl2_a.boot;
1451
1452 return ret;
1453 }
1454
1455 /**
1456 * @brief Reboot memory content. Reload the calibration parameters.[set]
1457 *
1458 * @param ctx read / write interface definitions.(ptr)
1459 * @param val Change the values of reboot in reg CFG_REG_A
1460 * @retval Interface status (MANDATORY: return 0 -> no Error).
1461 *
1462 */
lsm303ah_mg_boot_set(const stmdev_ctx_t * ctx,uint8_t val)1463 int32_t lsm303ah_mg_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
1464 {
1465 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
1466 int32_t ret;
1467
1468 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
1469 (uint8_t *)&cfg_reg_a_m, 1);
1470
1471 if (ret == 0)
1472 {
1473 cfg_reg_a_m.reboot = val;
1474 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_A_M,
1475 (uint8_t *)&cfg_reg_a_m, 1);
1476 }
1477
1478 return ret;
1479 }
1480
1481 /**
1482 * @brief Reboot memory content. Reload the calibration parameters.[get]
1483 *
1484 * @param ctx read / write interface definitions.(ptr)
1485 * @param val Get the values of reboot in reg CFG_REG_A.(ptr)
1486 * @retval Interface status (MANDATORY: return 0 -> no Error).
1487 *
1488 */
lsm303ah_mg_boot_get(const stmdev_ctx_t * ctx,uint8_t * val)1489 int32_t lsm303ah_mg_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
1490 {
1491 lsm303ah_cfg_reg_a_m_t cfg_reg_a_m;
1492 int32_t ret;
1493
1494 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_A_M,
1495 (uint8_t *)&cfg_reg_a_m, 1);
1496 *val = cfg_reg_a_m.reboot;
1497
1498 return ret;
1499 }
1500
1501 /**
1502 * @brief Accelerometer Self-Test.[set]
1503 *
1504 * @param ctx read / write interface definitions.(ptr)
1505 * @param val Change the values of st in reg CTRL3
1506 * @retval Interface status (MANDATORY: return 0 -> no Error).
1507 *
1508 */
lsm303ah_xl_self_test_set(const stmdev_ctx_t * ctx,lsm303ah_xl_st_t val)1509 int32_t lsm303ah_xl_self_test_set(const stmdev_ctx_t *ctx,
1510 lsm303ah_xl_st_t val)
1511 {
1512 lsm303ah_ctrl3_a_t ctrl3_a;
1513 int32_t ret;
1514
1515 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
1516
1517 if (ret == 0)
1518 {
1519 ctrl3_a.st = (uint8_t)val;
1520 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
1521 }
1522
1523 return ret;
1524 }
1525
1526 /**
1527 * @brief Accelerometer Self-Test.[get]
1528 *
1529 * @param ctx read / write interface definitions.(ptr)
1530 * @param val Get the values of st in reg CTRL3.(ptr)
1531 * @retval Interface status (MANDATORY: return 0 -> no Error).
1532 *
1533 */
lsm303ah_xl_self_test_get(const stmdev_ctx_t * ctx,lsm303ah_xl_st_t * val)1534 int32_t lsm303ah_xl_self_test_get(const stmdev_ctx_t *ctx,
1535 lsm303ah_xl_st_t *val)
1536 {
1537 lsm303ah_ctrl3_a_t ctrl3_a;
1538 int32_t ret;
1539
1540 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
1541
1542 switch (ctrl3_a.st)
1543 {
1544 case LSM303AH_XL_ST_DISABLE:
1545 *val = LSM303AH_XL_ST_DISABLE;
1546 break;
1547
1548 case LSM303AH_XL_ST_POSITIVE:
1549 *val = LSM303AH_XL_ST_POSITIVE;
1550 break;
1551
1552 case LSM303AH_XL_ST_NEGATIVE:
1553 *val = LSM303AH_XL_ST_NEGATIVE;
1554 break;
1555
1556 default:
1557 *val = LSM303AH_XL_ST_DISABLE;
1558 break;
1559 }
1560
1561 return ret;
1562 }
1563
1564 /**
1565 * @brief Magnetometer self-test.[set]
1566 *
1567 * @param ctx read / write interface definitions.(ptr)
1568 * @param val Change the values of self_test in reg CFG_REG_C
1569 * @retval Interface status (MANDATORY: return 0 -> no Error).
1570 *
1571 */
lsm303ah_mg_self_test_set(const stmdev_ctx_t * ctx,uint8_t val)1572 int32_t lsm303ah_mg_self_test_set(const stmdev_ctx_t *ctx, uint8_t val)
1573 {
1574 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
1575 int32_t ret;
1576
1577 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
1578 (uint8_t *)&cfg_reg_c_m, 1);
1579
1580 if (ret == 0)
1581 {
1582 cfg_reg_c_m.self_test = val;
1583 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
1584 (uint8_t *)&cfg_reg_c_m, 1);
1585 }
1586
1587 return ret;
1588 }
1589
1590 /**
1591 * @brief Magnetometer self-test.[get]
1592 *
1593 * @param ctx read / write interface definitions.(ptr)
1594 * @param val Get the values of self_test in reg CFG_REG_C.(ptr)
1595 * @retval Interface status (MANDATORY: return 0 -> no Error).
1596 *
1597 */
lsm303ah_mg_self_test_get(const stmdev_ctx_t * ctx,uint8_t * val)1598 int32_t lsm303ah_mg_self_test_get(const stmdev_ctx_t *ctx, uint8_t *val)
1599 {
1600 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
1601 int32_t ret;
1602
1603 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
1604 (uint8_t *)&cfg_reg_c_m, 1);
1605 *val = cfg_reg_c_m.self_test;
1606
1607 return ret;
1608 }
1609
1610 /**
1611 * @brief Accelerometer data ready mode.[set]
1612 *
1613 * @param ctx read / write interface definitions.(ptr)
1614 * @param val Change the values of drdy_pulsed in reg CTRL5
1615 * @retval Interface status (MANDATORY: return 0 -> no Error).
1616 *
1617 */
lsm303ah_xl_data_ready_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_drdy_pulsed_t val)1618 int32_t lsm303ah_xl_data_ready_mode_set(const stmdev_ctx_t *ctx,
1619 lsm303ah_xl_drdy_pulsed_t val)
1620 {
1621 lsm303ah_ctrl5_a_t ctrl5_a;
1622 int32_t ret;
1623
1624 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
1625
1626 if (ret == 0)
1627 {
1628 ctrl5_a.drdy_pulsed = (uint8_t)val;
1629 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
1630 }
1631
1632 return ret;
1633 }
1634
1635 /**
1636 * @brief Accelerometer data ready mode.[get]
1637 *
1638 * @param ctx read / write interface definitions.(ptr)
1639 * @param val Get the values of drdy_pulsed in reg CTRL5.(ptr)
1640 * @retval Interface status (MANDATORY: return 0 -> no Error).
1641 *
1642 */
lsm303ah_xl_data_ready_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_drdy_pulsed_t * val)1643 int32_t lsm303ah_xl_data_ready_mode_get(const stmdev_ctx_t *ctx,
1644 lsm303ah_xl_drdy_pulsed_t *val)
1645 {
1646 lsm303ah_ctrl5_a_t ctrl5_a;
1647 int32_t ret;
1648
1649 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
1650
1651 switch (ctrl5_a.drdy_pulsed)
1652 {
1653 case LSM303AH_XL_DRDY_LATCHED:
1654 *val = LSM303AH_XL_DRDY_LATCHED;
1655 break;
1656
1657 case LSM303AH_XL_DRDY_PULSED:
1658 *val = LSM303AH_XL_DRDY_PULSED;
1659 break;
1660
1661 default:
1662 *val = LSM303AH_XL_DRDY_LATCHED;
1663 break;
1664 }
1665
1666 return ret;
1667 }
1668
1669 /**
1670 * @}
1671 *
1672 */
1673
1674 /**
1675 * @defgroup Filters
1676 * @brief This section group all the functions concerning the filters
1677 * configuration.
1678 * @{
1679 *
1680 */
1681
1682 /**
1683 * @brief High-pass filter data selection on output register and FIFO.[set]
1684 *
1685 * @param ctx read / write interface definitions.(ptr)
1686 * @param val Change the values of fds_slope in reg CTRL2
1687 * @retval Interface status (MANDATORY: return 0 -> no Error).
1688 *
1689 */
lsm303ah_xl_hp_path_set(const stmdev_ctx_t * ctx,lsm303ah_xl_fds_slope_t val)1690 int32_t lsm303ah_xl_hp_path_set(const stmdev_ctx_t *ctx,
1691 lsm303ah_xl_fds_slope_t val)
1692 {
1693 lsm303ah_ctrl2_a_t ctrl2_a;
1694 int32_t ret;
1695
1696 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1697
1698 if (ret == 0)
1699 {
1700 ctrl2_a.fds_slope = (uint8_t)val;
1701 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1702 }
1703
1704 return ret;
1705 }
1706
1707 /**
1708 * @brief High-pass filter data selection on output register and FIFO.[get]
1709 *
1710 * @param ctx read / write interface definitions.(ptr)
1711 * @param val Get the values of fds_slope in reg CTRL2.(ptr)
1712 * @retval Interface status (MANDATORY: return 0 -> no Error).
1713 *
1714 */
lsm303ah_xl_hp_path_get(const stmdev_ctx_t * ctx,lsm303ah_xl_fds_slope_t * val)1715 int32_t lsm303ah_xl_hp_path_get(const stmdev_ctx_t *ctx,
1716 lsm303ah_xl_fds_slope_t *val)
1717 {
1718 lsm303ah_ctrl2_a_t ctrl2_a;
1719 int32_t ret;
1720
1721 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1722
1723 switch (ctrl2_a.fds_slope)
1724 {
1725 case LSM303AH_XL_HP_INTERNAL_ONLY:
1726 *val = LSM303AH_XL_HP_INTERNAL_ONLY;
1727 break;
1728
1729 case LSM303AH_XL_HP_ON_OUTPUTS:
1730 *val = LSM303AH_XL_HP_ON_OUTPUTS;
1731 break;
1732
1733 default:
1734 *val = LSM303AH_XL_HP_INTERNAL_ONLY;
1735 break;
1736 }
1737
1738 return ret;
1739 }
1740
1741 /**
1742 * @brief Low-pass bandwidth selection.[set]
1743 *
1744 * @param ctx read / write interface definitions.(ptr)
1745 * @param val Change the values of lpf in reg CFG_REG_B
1746 * @retval Interface status (MANDATORY: return 0 -> no Error).
1747 *
1748 */
lsm303ah_mg_low_pass_bandwidth_set(const stmdev_ctx_t * ctx,lsm303ah_mg_lpf_t val)1749 int32_t lsm303ah_mg_low_pass_bandwidth_set(const stmdev_ctx_t *ctx,
1750 lsm303ah_mg_lpf_t val)
1751 {
1752 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
1753 int32_t ret;
1754
1755 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
1756 (uint8_t *)&cfg_reg_b_m, 1);
1757
1758 if (ret == 0)
1759 {
1760 cfg_reg_b_m.lpf = (uint8_t)val;
1761 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_B_M,
1762 (uint8_t *)&cfg_reg_b_m, 1);
1763 }
1764
1765 return ret;
1766 }
1767
1768 /**
1769 * @brief Low-pass bandwidth selection.[get]
1770 *
1771 * @param ctx read / write interface definitions.(ptr)
1772 * @param val Get the values of lpf in reg CFG_REG_B.(ptr)
1773 * @retval Interface status (MANDATORY: return 0 -> no Error).
1774 *
1775 */
lsm303ah_mg_low_pass_bandwidth_get(const stmdev_ctx_t * ctx,lsm303ah_mg_lpf_t * val)1776 int32_t lsm303ah_mg_low_pass_bandwidth_get(const stmdev_ctx_t *ctx,
1777 lsm303ah_mg_lpf_t *val)
1778 {
1779 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
1780 int32_t ret;
1781
1782 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
1783 (uint8_t *)&cfg_reg_b_m, 1);
1784
1785 switch (cfg_reg_b_m.lpf)
1786 {
1787 case LSM303AH_MG_ODR_DIV_2:
1788 *val = LSM303AH_MG_ODR_DIV_2;
1789 break;
1790
1791 case LSM303AH_MG_ODR_DIV_4:
1792 *val = LSM303AH_MG_ODR_DIV_4;
1793 break;
1794
1795 default:
1796 *val = LSM303AH_MG_ODR_DIV_2;
1797 break;
1798 }
1799
1800 return ret;
1801 }
1802
1803 /**
1804 * @}
1805 *
1806 */
1807
1808 /**
1809 * @defgroup Auxiliary_interface
1810 * @brief This section groups all the functions concerning auxiliary
1811 * interface.
1812 * @{
1813 *
1814 */
1815
1816 /**
1817 * @brief SPI Serial Interface Mode selection.[set]
1818 *
1819 * @param ctx read / write interface definitions.(ptr)
1820 * @param val Change the values of sim in reg CTRL2
1821 * @retval Interface status (MANDATORY: return 0 -> no Error).
1822 *
1823 */
lsm303ah_xl_spi_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_sim_t val)1824 int32_t lsm303ah_xl_spi_mode_set(const stmdev_ctx_t *ctx,
1825 lsm303ah_xl_sim_t val)
1826 {
1827 lsm303ah_ctrl2_a_t ctrl2_a;
1828 int32_t ret;
1829
1830 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1831
1832 if (ret == 0)
1833 {
1834 ctrl2_a.sim = (uint8_t)val;
1835 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1836 }
1837
1838 return ret;
1839 }
1840
1841 /**
1842 * @brief SPI Serial Interface Mode selection.[get]
1843 *
1844 * @param ctx read / write interface definitions.(ptr)
1845 * @param val Get the values of sim in reg CTRL2.(ptr)
1846 * @retval Interface status (MANDATORY: return 0 -> no Error).
1847 *
1848 */
lsm303ah_xl_spi_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_sim_t * val)1849 int32_t lsm303ah_xl_spi_mode_get(const stmdev_ctx_t *ctx,
1850 lsm303ah_xl_sim_t *val)
1851 {
1852 lsm303ah_ctrl2_a_t ctrl2_a;
1853 int32_t ret;
1854
1855 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1856
1857 switch (ctrl2_a.sim)
1858 {
1859 case LSM303AH_XL_SPI_4_WIRE:
1860 *val = LSM303AH_XL_SPI_4_WIRE;
1861 break;
1862
1863 case LSM303AH_XL_SPI_3_WIRE:
1864 *val = LSM303AH_XL_SPI_3_WIRE;
1865 break;
1866
1867 default:
1868 *val = LSM303AH_XL_SPI_4_WIRE;
1869 break;
1870 }
1871
1872 return ret;
1873 }
1874
1875 /**
1876 * @brief Disable / Enable I2C interface.[set]
1877 *
1878 * @param ctx read / write interface definitions.(ptr)
1879 * @param val Change the values of i2c_disable in reg CTRL2
1880 * @retval Interface status (MANDATORY: return 0 -> no Error).
1881 *
1882 */
lsm303ah_xl_i2c_interface_set(const stmdev_ctx_t * ctx,lsm303ah_xl_i2c_disable_t val)1883 int32_t lsm303ah_xl_i2c_interface_set(const stmdev_ctx_t *ctx,
1884 lsm303ah_xl_i2c_disable_t val)
1885 {
1886 lsm303ah_ctrl2_a_t ctrl2_a;
1887 int32_t ret;
1888
1889 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1890
1891 if (ret == 0)
1892 {
1893 ctrl2_a.i2c_disable = (uint8_t)val;
1894 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1895 }
1896
1897 return ret;
1898 }
1899
1900 /**
1901 * @brief Disable / Enable I2C interface.[get]
1902 *
1903 * @param ctx read / write interface definitions.(ptr)
1904 * @param val Get the values of i2c_disable in reg CTRL2.(ptr)
1905 * @retval Interface status (MANDATORY: return 0 -> no Error).
1906 *
1907 */
lsm303ah_xl_i2c_interface_get(const stmdev_ctx_t * ctx,lsm303ah_xl_i2c_disable_t * val)1908 int32_t lsm303ah_xl_i2c_interface_get(const stmdev_ctx_t *ctx,
1909 lsm303ah_xl_i2c_disable_t *val)
1910 {
1911 lsm303ah_ctrl2_a_t ctrl2_a;
1912 int32_t ret;
1913
1914 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL2_A, (uint8_t *)&ctrl2_a, 1);
1915
1916 switch (ctrl2_a.i2c_disable)
1917 {
1918 case LSM303AH_XL_I2C_ENABLE:
1919 *val = LSM303AH_XL_I2C_ENABLE;
1920 break;
1921
1922 case LSM303AH_XL_I2C_DISABLE:
1923 *val = LSM303AH_XL_I2C_DISABLE;
1924 break;
1925
1926 default:
1927 *val = LSM303AH_XL_I2C_ENABLE;
1928 break;
1929 }
1930
1931 return ret;
1932 }
1933
1934 /**
1935 * @brief Enable/Disable I2C interface.[set]
1936 *
1937 * @param ctx read / write interface definitions.(ptr)
1938 * @param val Change the values of i2c_dis in reg CFG_REG_C
1939 * @retval Interface status (MANDATORY: return 0 -> no Error).
1940 *
1941 */
lsm303ah_mg_i2c_interface_set(const stmdev_ctx_t * ctx,lsm303ah_mg_i2c_dis_t val)1942 int32_t lsm303ah_mg_i2c_interface_set(const stmdev_ctx_t *ctx,
1943 lsm303ah_mg_i2c_dis_t val)
1944 {
1945 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
1946 int32_t ret;
1947
1948 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
1949 (uint8_t *)&cfg_reg_c_m, 1);
1950
1951 if (ret == 0)
1952 {
1953 cfg_reg_c_m.i2c_dis = (uint8_t)val;
1954 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
1955 (uint8_t *)&cfg_reg_c_m, 1);
1956 }
1957
1958 return ret;
1959 }
1960
1961 /**
1962 * @brief Enable/Disable I2C interface.[get]
1963 *
1964 * @param ctx read / write interface definitions.(ptr)
1965 * @param val Get the values of i2c_dis in reg CFG_REG_C.(ptr)
1966 * @retval Interface status (MANDATORY: return 0 -> no Error).
1967 *
1968 */
lsm303ah_mg_i2c_interface_get(const stmdev_ctx_t * ctx,lsm303ah_mg_i2c_dis_t * val)1969 int32_t lsm303ah_mg_i2c_interface_get(const stmdev_ctx_t *ctx,
1970 lsm303ah_mg_i2c_dis_t *val)
1971 {
1972 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
1973 int32_t ret;
1974
1975 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
1976 (uint8_t *)&cfg_reg_c_m, 1);
1977
1978 switch (cfg_reg_c_m.i2c_dis)
1979 {
1980 case LSM303AH_MG_I2C_ENABLE:
1981 *val = LSM303AH_MG_I2C_ENABLE;
1982 break;
1983
1984 case LSM303AH_MG_I2C_DISABLE:
1985 *val = LSM303AH_MG_I2C_DISABLE;
1986 break;
1987
1988 default:
1989 *val = LSM303AH_MG_I2C_ENABLE;
1990 break;
1991 }
1992
1993 return ret;
1994 }
1995
1996 /**
1997 * @brief Connect/Disconnects pull-up in if_cs pad.[set]
1998 *
1999 * @param ctx read / write interface definitions.(ptr)
2000 * @param val Change the values of if_cs_pu_dis in reg FIFO_CTRL
2001 * @retval Interface status (MANDATORY: return 0 -> no Error).
2002 *
2003 */
lsm303ah_xl_cs_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_if_cs_pu_dis_t val)2004 int32_t lsm303ah_xl_cs_mode_set(const stmdev_ctx_t *ctx,
2005 lsm303ah_xl_if_cs_pu_dis_t val)
2006 {
2007 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
2008 int32_t ret;
2009
2010 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
2011 (uint8_t *)&fifo_ctrl_a, 1);
2012
2013 if (ret == 0)
2014 {
2015 fifo_ctrl_a.if_cs_pu_dis = (uint8_t)val;
2016 ret = lsm303ah_write_reg(ctx, LSM303AH_FIFO_CTRL_A,
2017 (uint8_t *)&fifo_ctrl_a, 1);
2018 }
2019
2020 return ret;
2021 }
2022
2023 /**
2024 * @brief Connect/Disconnects pull-up in if_cs pad.[get]
2025 *
2026 * @param ctx read / write interface definitions.(ptr)
2027 * @param val Get the values of if_cs_pu_dis in reg FIFO_CTRL.(ptr)
2028 * @retval Interface status (MANDATORY: return 0 -> no Error).
2029 *
2030 */
lsm303ah_xl_cs_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_if_cs_pu_dis_t * val)2031 int32_t lsm303ah_xl_cs_mode_get(const stmdev_ctx_t *ctx,
2032 lsm303ah_xl_if_cs_pu_dis_t *val)
2033 {
2034 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
2035 int32_t ret;
2036
2037 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
2038 (uint8_t *)&fifo_ctrl_a, 1);
2039
2040 switch (fifo_ctrl_a.if_cs_pu_dis)
2041 {
2042 case LSM303AH_XL_PULL_UP_CONNECTED:
2043 *val = LSM303AH_XL_PULL_UP_CONNECTED;
2044 break;
2045
2046 case LSM303AH_XL_PULL_UP_DISCONNECTED:
2047 *val = LSM303AH_XL_PULL_UP_DISCONNECTED;
2048 break;
2049
2050 default:
2051 *val = LSM303AH_XL_PULL_UP_CONNECTED;
2052 break;
2053 }
2054
2055 return ret;
2056 }
2057
2058 /**
2059 * @}
2060 *
2061 */
2062
2063 /**
2064 * @defgroup main_serial_interface
2065 * @brief This section groups all the functions concerning main serial
2066 * interface management (not auxiliary)
2067 * @{
2068 *
2069 */
2070
2071 /**
2072 * @brief Push-pull/open-drain selection on interrupt pad.[set]
2073 *
2074 * @param ctx read / write interface definitions.(ptr)
2075 * @param val Change the values of pp_od in reg CTRL3
2076 * @retval Interface status (MANDATORY: return 0 -> no Error).
2077 *
2078 */
lsm303ah_xl_pin_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_pp_od_t val)2079 int32_t lsm303ah_xl_pin_mode_set(const stmdev_ctx_t *ctx,
2080 lsm303ah_xl_pp_od_t val)
2081 {
2082 lsm303ah_ctrl3_a_t ctrl3_a;
2083 int32_t ret;
2084
2085 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2086
2087 if (ret == 0)
2088 {
2089 ctrl3_a.pp_od = (uint8_t)val;
2090 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2091 }
2092
2093 return ret;
2094 }
2095
2096 /**
2097 * @brief Push-pull/open-drain selection on interrupt pad.[get]
2098 *
2099 * @param ctx read / write interface definitions.(ptr)
2100 * @param val Get the values of pp_od in reg CTRL3.(ptr)
2101 * @retval Interface status (MANDATORY: return 0 -> no Error).
2102 *
2103 */
lsm303ah_xl_pin_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_pp_od_t * val)2104 int32_t lsm303ah_xl_pin_mode_get(const stmdev_ctx_t *ctx,
2105 lsm303ah_xl_pp_od_t *val)
2106 {
2107 lsm303ah_ctrl3_a_t ctrl3_a;
2108 int32_t ret;
2109
2110 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2111
2112 switch (ctrl3_a.pp_od)
2113 {
2114 case LSM303AH_XL_PUSH_PULL:
2115 *val = LSM303AH_XL_PUSH_PULL;
2116 break;
2117
2118 case LSM303AH_XL_OPEN_DRAIN:
2119 *val = LSM303AH_XL_OPEN_DRAIN;
2120 break;
2121
2122 default:
2123 *val = LSM303AH_XL_PUSH_PULL;
2124 break;
2125 }
2126
2127 return ret;
2128 }
2129
2130 /**
2131 * @brief Interrupt active-high/low.[set]
2132 *
2133 * @param ctx read / write interface definitions.(ptr)
2134 * @param val Change the values of h_lactive in reg CTRL3
2135 * @retval Interface status (MANDATORY: return 0 -> no Error).
2136 *
2137 */
lsm303ah_xl_pin_polarity_set(const stmdev_ctx_t * ctx,lsm303ah_xl_h_lactive_t val)2138 int32_t lsm303ah_xl_pin_polarity_set(const stmdev_ctx_t *ctx,
2139 lsm303ah_xl_h_lactive_t val)
2140 {
2141 lsm303ah_ctrl3_a_t ctrl3_a;
2142 int32_t ret;
2143
2144 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2145
2146 if (ret == 0)
2147 {
2148 ctrl3_a.h_lactive = (uint8_t)val;
2149 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2150 }
2151
2152 return ret;
2153 }
2154
2155 /**
2156 * @brief Interrupt active-high/low.[get]
2157 *
2158 * @param ctx read / write interface definitions.(ptr)
2159 * @param val Get the values of h_lactive in reg CTRL3.(ptr)
2160 * @retval Interface status (MANDATORY: return 0 -> no Error).
2161 *
2162 */
lsm303ah_xl_pin_polarity_get(const stmdev_ctx_t * ctx,lsm303ah_xl_h_lactive_t * val)2163 int32_t lsm303ah_xl_pin_polarity_get(const stmdev_ctx_t *ctx,
2164 lsm303ah_xl_h_lactive_t *val)
2165 {
2166 lsm303ah_ctrl3_a_t ctrl3_a;
2167 int32_t ret;
2168
2169 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2170
2171 switch (ctrl3_a.h_lactive)
2172 {
2173 case LSM303AH_XL_ACTIVE_HIGH:
2174 *val = LSM303AH_XL_ACTIVE_HIGH;
2175 break;
2176
2177 case LSM303AH_XL_ACTIVE_LOW:
2178 *val = LSM303AH_XL_ACTIVE_LOW;
2179 break;
2180
2181 default:
2182 *val = LSM303AH_XL_ACTIVE_HIGH;
2183 break;
2184 }
2185
2186 return ret;
2187 }
2188
2189 /**
2190 * @brief Latched/pulsed interrupt.[set]
2191 *
2192 * @param ctx read / write interface definitions.(ptr)
2193 * @param val Change the values of lir in reg CTRL3
2194 * @retval Interface status (MANDATORY: return 0 -> no Error).
2195 *
2196 */
lsm303ah_xl_int_notification_set(const stmdev_ctx_t * ctx,lsm303ah_xl_lir_t val)2197 int32_t lsm303ah_xl_int_notification_set(const stmdev_ctx_t *ctx,
2198 lsm303ah_xl_lir_t val)
2199 {
2200 lsm303ah_ctrl3_a_t ctrl3_a;
2201 int32_t ret;
2202
2203 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2204
2205 if (ret == 0)
2206 {
2207 ctrl3_a.lir = (uint8_t)val;
2208 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2209 }
2210
2211 return ret;
2212 }
2213
2214 /**
2215 * @brief Latched/pulsed interrupt.[get]
2216 *
2217 * @param ctx read / write interface definitions.(ptr)
2218 * @param val Get the values of lir in reg CTRL3.(ptr)
2219 * @retval Interface status (MANDATORY: return 0 -> no Error).
2220 *
2221 */
lsm303ah_xl_int_notification_get(const stmdev_ctx_t * ctx,lsm303ah_xl_lir_t * val)2222 int32_t lsm303ah_xl_int_notification_get(const stmdev_ctx_t *ctx,
2223 lsm303ah_xl_lir_t *val)
2224 {
2225 lsm303ah_ctrl3_a_t ctrl3_a;
2226 int32_t ret;
2227
2228 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2229
2230 switch (ctrl3_a.lir)
2231 {
2232 case LSM303AH_XL_INT_PULSED:
2233 *val = LSM303AH_XL_INT_PULSED;
2234 break;
2235
2236 case LSM303AH_XL_INT_LATCHED:
2237 *val = LSM303AH_XL_INT_LATCHED;
2238 break;
2239
2240 default:
2241 *val = LSM303AH_XL_INT_PULSED;
2242 break;
2243 }
2244
2245 return ret;
2246 }
2247
2248 /**
2249 * @brief Select the signal that need to route on int1 pad.[set]
2250 *
2251 * @param ctx read / write interface definitions.(ptr)
2252 * @param val Change union of registers from CTRL4 to
2253 * @retval Interface status (MANDATORY: return 0 -> no Error).
2254 *
2255 */
lsm303ah_xl_pin_int1_route_set(const stmdev_ctx_t * ctx,lsm303ah_xl_pin_int1_route_t val)2256 int32_t lsm303ah_xl_pin_int1_route_set(const stmdev_ctx_t *ctx,
2257 lsm303ah_xl_pin_int1_route_t val)
2258 {
2259 lsm303ah_ctrl4_a_t ctrl4_a;
2260 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2261 int32_t ret;
2262
2263 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL4_A, (uint8_t *)&ctrl4_a, 1);
2264
2265 if (ret == 0)
2266 {
2267 ctrl4_a.int1_drdy = val.int1_drdy;
2268 ctrl4_a.int1_fth = val.int1_fth;
2269 ctrl4_a.int1_6d = val.int1_6d;
2270 ctrl4_a.int1_tap = val.int1_tap;
2271 ctrl4_a.int1_ff = val.int1_ff;
2272 ctrl4_a.int1_wu = val.int1_wu;
2273 ctrl4_a.int1_s_tap = val.int1_s_tap;
2274 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL4_A, (uint8_t *)&ctrl4_a, 1);
2275 }
2276
2277 if (ret == 0)
2278 {
2279 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2280 (uint8_t *)&wake_up_dur_a, 1);
2281 }
2282
2283 if (ret == 0)
2284 {
2285 wake_up_dur_a.int1_fss7 = val.int1_fss7;
2286 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2287 (uint8_t *)&wake_up_dur_a, 1);
2288 }
2289
2290 return ret;
2291 }
2292
2293 /**
2294 * @brief Select the signal that need to route on int1 pad.[get]
2295 *
2296 * @param ctx read / write interface definitions.(ptr)
2297 * @param val Get union of registers from CTRL4 to.(ptr)
2298 * @retval Interface status (MANDATORY: return 0 -> no Error).
2299 *
2300 */
lsm303ah_xl_pin_int1_route_get(const stmdev_ctx_t * ctx,lsm303ah_xl_pin_int1_route_t * val)2301 int32_t lsm303ah_xl_pin_int1_route_get(const stmdev_ctx_t *ctx,
2302 lsm303ah_xl_pin_int1_route_t *val)
2303 {
2304 lsm303ah_ctrl4_a_t ctrl4_a;
2305 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2306 int32_t ret;
2307
2308 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL4_A, (uint8_t *)&ctrl4_a, 1);
2309
2310 if (ret == 0)
2311 {
2312 val->int1_drdy = ctrl4_a.int1_drdy;
2313 val->int1_fth = ctrl4_a.int1_fth;
2314 val->int1_6d = ctrl4_a.int1_6d;
2315 val->int1_tap = ctrl4_a.int1_tap;
2316 val->int1_ff = ctrl4_a.int1_ff;
2317 val->int1_wu = ctrl4_a.int1_wu;
2318 val->int1_s_tap = ctrl4_a.int1_s_tap;
2319 }
2320
2321 if (ret == 0)
2322 {
2323 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2324 (uint8_t *)&wake_up_dur_a, 1);
2325 }
2326
2327 val->int1_fss7 = wake_up_dur_a.int1_fss7;
2328
2329 return ret;
2330 }
2331
2332 /**
2333 * @brief Select the signal that need to route on int2 pad.[set]
2334 *
2335 * @param ctx read / write interface definitions.(ptr)
2336 * @param val Change union of registers from CTRL5 to
2337 * @retval Interface status (MANDATORY: return 0 -> no Error).
2338 *
2339 */
lsm303ah_xl_pin_int2_route_set(const stmdev_ctx_t * ctx,lsm303ah_xl_pin_int2_route_t val)2340 int32_t lsm303ah_xl_pin_int2_route_set(const stmdev_ctx_t *ctx,
2341 lsm303ah_xl_pin_int2_route_t val)
2342 {
2343 lsm303ah_ctrl5_a_t ctrl5_a;
2344 int32_t ret;
2345
2346 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2347
2348 if (ret == 0)
2349 {
2350 ctrl5_a.int2_boot = val.int2_boot;
2351 ctrl5_a.int2_tilt = val.int2_tilt;
2352 ctrl5_a.int2_sig_mot = val.int2_sig_mot;
2353 ctrl5_a.int2_step = val.int2_step;
2354 ctrl5_a.int2_fth = val.int2_fth;
2355 ctrl5_a.int2_drdy = val.int2_drdy;
2356 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2357 }
2358
2359 return ret;
2360 }
2361
2362 /**
2363 * @brief Select the signal that need to route on int2 pad.[get]
2364 *
2365 * @param ctx read / write interface definitions.(ptr)
2366 * @param val Get union of registers from CTRL5 to.(ptr)
2367 * @retval Interface status (MANDATORY: return 0 -> no Error).
2368 *
2369 */
lsm303ah_xl_pin_int2_route_get(const stmdev_ctx_t * ctx,lsm303ah_xl_pin_int2_route_t * val)2370 int32_t lsm303ah_xl_pin_int2_route_get(const stmdev_ctx_t *ctx,
2371 lsm303ah_xl_pin_int2_route_t *val)
2372 {
2373 lsm303ah_ctrl5_a_t ctrl5_a;
2374 int32_t ret;
2375
2376 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2377 val->int2_boot = ctrl5_a.int2_boot;
2378 val->int2_tilt = ctrl5_a.int2_tilt;
2379 val->int2_sig_mot = ctrl5_a.int2_sig_mot;
2380 val->int2_step = ctrl5_a.int2_step;
2381 val->int2_fth = ctrl5_a.int2_fth;
2382 val->int2_drdy = ctrl5_a.int2_drdy;
2383
2384 return ret;
2385 }
2386
2387 /**
2388 * @brief All interrupt signals become available on INT1 pin.[set]
2389 *
2390 * @param ctx read / write interface definitions.(ptr)
2391 * @param val Change the values of int2_on_int1 in reg CTRL5
2392 * @retval Interface status (MANDATORY: return 0 -> no Error).
2393 *
2394 */
lsm303ah_xl_all_on_int1_set(const stmdev_ctx_t * ctx,uint8_t val)2395 int32_t lsm303ah_xl_all_on_int1_set(const stmdev_ctx_t *ctx, uint8_t val)
2396 {
2397 lsm303ah_ctrl5_a_t ctrl5_a;
2398 int32_t ret;
2399
2400 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2401
2402 if (ret == 0)
2403 {
2404 ctrl5_a.int2_on_int1 = val;
2405 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2406 }
2407
2408 return ret;
2409 }
2410
2411 /**
2412 * @brief All interrupt signals become available on INT1 pin.[get]
2413 *
2414 * @param ctx read / write interface definitions.(ptr)
2415 * @param val Get the values of int2_on_int1 in reg CTRL5.(ptr)
2416 * @retval Interface status (MANDATORY: return 0 -> no Error).
2417 *
2418 */
lsm303ah_xl_all_on_int1_get(const stmdev_ctx_t * ctx,uint8_t * val)2419 int32_t lsm303ah_xl_all_on_int1_get(const stmdev_ctx_t *ctx, uint8_t *val)
2420 {
2421 lsm303ah_ctrl5_a_t ctrl5_a;
2422 int32_t ret;
2423
2424 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL5_A, (uint8_t *)&ctrl5_a, 1);
2425 *val = ctrl5_a.int2_on_int1;
2426
2427 return ret;
2428 }
2429
2430 /**
2431 * @brief Data-ready signal on INT_DRDY pin.[set]
2432 *
2433 * @param ctx read / write interface definitions.(ptr)
2434 * @param val Change the values of drdy_on_pin in reg CFG_REG_C
2435 * @retval Interface status (MANDATORY: return 0 -> no Error).
2436 *
2437 */
lsm303ah_mg_drdy_on_pin_set(const stmdev_ctx_t * ctx,uint8_t val)2438 int32_t lsm303ah_mg_drdy_on_pin_set(const stmdev_ctx_t *ctx, uint8_t val)
2439 {
2440 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
2441 int32_t ret;
2442
2443 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
2444 (uint8_t *)&cfg_reg_c_m, 1);
2445
2446 if (ret == 0)
2447 {
2448 cfg_reg_c_m.int_mag = val;
2449 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
2450 (uint8_t *)&cfg_reg_c_m, 1);
2451 }
2452
2453 return ret;
2454 }
2455
2456 /**
2457 * @brief Data-ready signal on INT_DRDY pin.[get]
2458 *
2459 * @param ctx read / write interface definitions.(ptr)
2460 * @param val Get the values of drdy_on_pin in reg CFG_REG_C_M.(ptr)
2461 * @retval Interface status (MANDATORY: return 0 -> no Error).
2462 *
2463 */
lsm303ah_mg_drdy_on_pin_get(const stmdev_ctx_t * ctx,uint8_t * val)2464 int32_t lsm303ah_mg_drdy_on_pin_get(const stmdev_ctx_t *ctx, uint8_t *val)
2465 {
2466 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
2467 int32_t ret;
2468
2469 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
2470 (uint8_t *)&cfg_reg_c_m, 1);
2471 *val = cfg_reg_c_m.int_mag;
2472
2473 return ret;
2474 }
2475
2476 /**
2477 * @brief Interrupt signal on INT_DRDY pin.[set]
2478 *
2479 * @param ctx read / write interface definitions.(ptr)
2480 * @param val Change the values of int_on_pin in reg CFG_REG_C_M
2481 * @retval Interface status (MANDATORY: return 0 -> no Error).
2482 *
2483 */
lsm303ah_mg_int_on_pin_set(const stmdev_ctx_t * ctx,uint8_t val)2484 int32_t lsm303ah_mg_int_on_pin_set(const stmdev_ctx_t *ctx, uint8_t val)
2485 {
2486 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
2487 int32_t ret;
2488
2489 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
2490 (uint8_t *)&cfg_reg_c_m, 1);
2491
2492 if (ret == 0)
2493 {
2494 cfg_reg_c_m.int_mag_pin = val;
2495 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_C_M,
2496 (uint8_t *)&cfg_reg_c_m, 1);
2497 }
2498
2499 return ret;
2500 }
2501
2502 /**
2503 * @brief Interrupt signal on INT_DRDY pin.[get]
2504 *
2505 * @param ctx read / write interface definitions.(ptr)
2506 * @param val Get the values of int_on_pin in reg CFG_REG_C_M
2507 * @retval Interface status (MANDATORY: return 0 -> no Error).
2508 *
2509 */
lsm303ah_mg_int_on_pin_get(const stmdev_ctx_t * ctx,uint8_t * val)2510 int32_t lsm303ah_mg_int_on_pin_get(const stmdev_ctx_t *ctx, uint8_t *val)
2511 {
2512 lsm303ah_cfg_reg_c_m_t cfg_reg_c_m;
2513 int32_t ret;
2514
2515 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_C_M,
2516 (uint8_t *)&cfg_reg_c_m, 1);
2517 *val = cfg_reg_c_m.int_mag_pin;
2518
2519 return ret;
2520 }
2521
2522 /**
2523 * @brief Interrupt generator configuration register.[set]
2524 *
2525 * @param ctx read / write interface definitions.(ptr)
2526 * @param val Change registers INT_CRTL_REG
2527 * @retval Interface status (MANDATORY: return 0 -> no Error).
2528 *
2529 */
lsm303ah_mg_int_gen_conf_set(const stmdev_ctx_t * ctx,lsm303ah_int_crtl_reg_m_t * val)2530 int32_t lsm303ah_mg_int_gen_conf_set(const stmdev_ctx_t *ctx,
2531 lsm303ah_int_crtl_reg_m_t *val)
2532 {
2533 int32_t ret;
2534
2535 ret = lsm303ah_write_reg(ctx, LSM303AH_INT_CRTL_REG_M,
2536 (uint8_t *) val, 1);
2537
2538 return ret;
2539 }
2540
2541 /**
2542 * @brief Interrupt generator configuration register.[get]
2543 *
2544 * @param ctx read / write interface definitions.(ptr)
2545 * @param val Get registers INT_CRTL_REG.(ptr)
2546 * @retval Interface status (MANDATORY: return 0 -> no Error).
2547 *
2548 */
lsm303ah_mg_int_gen_conf_get(const stmdev_ctx_t * ctx,lsm303ah_int_crtl_reg_m_t * val)2549 int32_t lsm303ah_mg_int_gen_conf_get(const stmdev_ctx_t *ctx,
2550 lsm303ah_int_crtl_reg_m_t *val)
2551 {
2552 int32_t ret;
2553
2554 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_CRTL_REG_M, (uint8_t *) val, 1);
2555
2556 return ret;
2557 }
2558
2559 /**
2560 * @brief Interrupt generator source register.[get]
2561 *
2562 * @param ctx read / write interface definitions.(ptr)
2563 * @param val Get registers INT_SOURCE_REG.(ptr)
2564 * @retval Interface status (MANDATORY: return 0 -> no Error).
2565 *
2566 */
lsm303ah_mg_int_gen_source_get(const stmdev_ctx_t * ctx,lsm303ah_int_source_reg_m_t * val)2567 int32_t lsm303ah_mg_int_gen_source_get(const stmdev_ctx_t *ctx,
2568 lsm303ah_int_source_reg_m_t *val)
2569 {
2570 int32_t ret;
2571
2572 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_SOURCE_REG_M,
2573 (uint8_t *) val, 1);
2574
2575 return ret;
2576 }
2577
2578 /**
2579 * @brief User-defined threshold value for xl interrupt event on generator.
2580 * Data format is the same of output data raw: two’s complement with
2581 * 1LSb = 1.5mG.[set]
2582 *
2583 * @param ctx read / write interface definitions.(ptr)
2584 * @param buff buffer that contains data to write.(ptr)
2585 * @retval Interface status (MANDATORY: return 0 -> no Error).
2586 *
2587 */
lsm303ah_mg_int_gen_threshold_set(const stmdev_ctx_t * ctx,uint16_t val)2588 int32_t lsm303ah_mg_int_gen_threshold_set(const stmdev_ctx_t *ctx,
2589 uint16_t val)
2590 {
2591 uint8_t buff[2];
2592 int32_t ret;
2593
2594 buff[1] = (uint8_t)(val / 256U);
2595 buff[0] = (uint8_t)(val - (buff[1] * 256U));
2596 ret = lsm303ah_write_reg(ctx, LSM303AH_INT_THS_L_REG_M, buff, 2);
2597
2598 return ret;
2599 }
2600
2601 /**
2602 * @brief User-defined threshold value for xl interrupt event on generator.
2603 * Data format is the same of output data raw: two’s complement with
2604 * 1LSb = 1.5mG.[get]
2605 *
2606 * @param ctx read / write interface definitions.(ptr)
2607 * @param buff buffer that stores data read.(ptr)
2608 * @retval Interface status (MANDATORY: return 0 -> no Error).
2609 *
2610 */
lsm303ah_mg_int_gen_threshold_get(const stmdev_ctx_t * ctx,uint16_t * val)2611 int32_t lsm303ah_mg_int_gen_threshold_get(const stmdev_ctx_t *ctx,
2612 uint16_t *val)
2613 {
2614 uint8_t buff[2];
2615 int32_t ret;
2616
2617 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_THS_L_REG_M, buff, 2);
2618 *val = buff[1];
2619 *val = (*val * 256U) + buff[0];
2620
2621 return ret;
2622 }
2623
2624 /**
2625 * @}
2626 *
2627 */
2628
2629 /**
2630 * @defgroup interrupt_pins
2631 * @brief This section groups all the functions that manage interrupt pins
2632 * @{
2633 *
2634 */
2635
2636
2637
2638 /**
2639 * @}
2640 *
2641 */
2642
2643 /**
2644 * @defgroup Wake_Up_event
2645 * @brief This section groups all the functions that manage the Wake Up
2646 * event generation.
2647 * @{
2648 *
2649 */
2650
2651 /**
2652 * @brief The interrupt block recognition checks data after/before the
2653 * hard-iron correction to discover the interrupt.[set]
2654 *
2655 * @param ctx read / write interface definitions.(ptr)
2656 * @param val Change the values of int_on_dataoff in reg CFG_REG_B
2657 * @retval Interface status (MANDATORY: return 0 -> no Error).
2658 *
2659 */
lsm303ah_mg_offset_int_conf_set(const stmdev_ctx_t * ctx,lsm303ah_mg_int_on_dataoff_t val)2660 int32_t lsm303ah_mg_offset_int_conf_set(const stmdev_ctx_t *ctx,
2661 lsm303ah_mg_int_on_dataoff_t val)
2662 {
2663 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
2664 int32_t ret;
2665
2666 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
2667 (uint8_t *)&cfg_reg_b_m, 1);
2668
2669 if (ret == 0)
2670 {
2671 cfg_reg_b_m.int_on_dataoff = (uint8_t)val;
2672 ret = lsm303ah_write_reg(ctx, LSM303AH_CFG_REG_B_M,
2673 (uint8_t *)&cfg_reg_b_m, 1);
2674 }
2675
2676 return ret;
2677 }
2678
2679 /**
2680 * @brief The interrupt block recognition checks data after/before the
2681 * hard-iron correction to discover the interrupt.[get]
2682 *
2683 * @param ctx read / write interface definitions.(ptr)
2684 * @param val Get the values of int_on_dataoff in reg CFG_REG_B.(ptr)
2685 * @retval Interface status (MANDATORY: return 0 -> no Error).
2686 *
2687 */
lsm303ah_mg_offset_int_conf_get(const stmdev_ctx_t * ctx,lsm303ah_mg_int_on_dataoff_t * val)2688 int32_t lsm303ah_mg_offset_int_conf_get(const stmdev_ctx_t *ctx,
2689 lsm303ah_mg_int_on_dataoff_t *val)
2690 {
2691 lsm303ah_cfg_reg_b_m_t cfg_reg_b_m;
2692 int32_t ret;
2693
2694 ret = lsm303ah_read_reg(ctx, LSM303AH_CFG_REG_B_M,
2695 (uint8_t *)&cfg_reg_b_m, 1);
2696
2697 switch (cfg_reg_b_m.int_on_dataoff)
2698 {
2699 case LSM303AH_MG_CHECK_BEFORE:
2700 *val = LSM303AH_MG_CHECK_BEFORE;
2701 break;
2702
2703 case LSM303AH_MG_CHECK_AFTER:
2704 *val = LSM303AH_MG_CHECK_AFTER;
2705 break;
2706
2707 default:
2708 *val = LSM303AH_MG_CHECK_BEFORE;
2709 break;
2710 }
2711
2712 return ret;
2713 }
2714
2715 /**
2716 * @brief Threshold for wakeup [1 LSb = FS_XL / 64].[set]
2717 *
2718 * @param ctx read / write interface definitions.(ptr)
2719 * @param val Change the values of wu_ths in reg WAKE_UP_THS
2720 * @retval Interface status (MANDATORY: return 0 -> no Error).
2721 *
2722 */
lsm303ah_xl_wkup_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)2723 int32_t lsm303ah_xl_wkup_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
2724 {
2725 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
2726 int32_t ret;
2727
2728 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2729 (uint8_t *)&wake_up_ths_a, 1);
2730
2731 if (ret == 0)
2732 {
2733 wake_up_ths_a.wu_ths = val;
2734 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2735 (uint8_t *)&wake_up_ths_a, 1);
2736 }
2737
2738 return ret;
2739 }
2740
2741 /**
2742 * @brief Threshold for wakeup [1 LSb = FS_XL / 64].[get]
2743 *
2744 * @param ctx read / write interface definitions.(ptr)
2745 * @param val Get the values of wu_ths in reg WAKE_UP_THS.(ptr)
2746 * @retval Interface status (MANDATORY: return 0 -> no Error).
2747 *
2748 */
lsm303ah_xl_wkup_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)2749 int32_t lsm303ah_xl_wkup_threshold_get(const stmdev_ctx_t *ctx,
2750 uint8_t *val)
2751 {
2752 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
2753 int32_t ret;
2754
2755 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2756 (uint8_t *)&wake_up_ths_a, 1);
2757 *val = wake_up_ths_a.wu_ths;
2758
2759 return ret;
2760 }
2761
2762 /**
2763 * @brief Wakeup duration [1 LSb = 1 / ODR].[set]
2764 *
2765 * @param ctx read / write interface definitions.(ptr)
2766 * @param val Change the values of wu_dur in reg WAKE_UP_DUR
2767 * @retval Interface status (MANDATORY: return 0 -> no Error).
2768 *
2769 */
lsm303ah_xl_wkup_dur_set(const stmdev_ctx_t * ctx,uint8_t val)2770 int32_t lsm303ah_xl_wkup_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
2771 {
2772 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2773 int32_t ret;
2774
2775 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2776 (uint8_t *)&wake_up_dur_a, 1);
2777
2778 if (ret == 0)
2779 {
2780 wake_up_dur_a.wu_dur = val;
2781 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2782 (uint8_t *)&wake_up_dur_a, 1);
2783 }
2784
2785 return ret;
2786 }
2787
2788 /**
2789 * @brief Wakeup duration [1 LSb = 1 / ODR].[get]
2790 *
2791 * @param ctx read / write interface definitions.(ptr)
2792 * @param val Get the values of wu_dur in reg WAKE_UP_DUR.(ptr)
2793 * @retval Interface status (MANDATORY: return 0 -> no Error).
2794 *
2795 */
lsm303ah_xl_wkup_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)2796 int32_t lsm303ah_xl_wkup_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
2797 {
2798 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2799 int32_t ret;
2800
2801 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2802 (uint8_t *)&wake_up_dur_a, 1);
2803 *val = wake_up_dur_a.wu_dur;
2804
2805 return ret;
2806 }
2807
2808 /**
2809 * @}
2810 *
2811 */
2812
2813 /**
2814 * @defgroup Activity/Inactivity_detection
2815 * @brief This section groups all the functions concerning
2816 * activity/inactivity detection.
2817 * @{
2818 *
2819 */
2820 /**
2821 * @brief Enables gyroscope Sleep mode.[set]
2822 *
2823 * @param ctx read / write interface definitions.(ptr)
2824 * @param val Change the values of sleep_on in reg WAKE_UP_THS
2825 * @retval Interface status (MANDATORY: return 0 -> no Error).
2826 *
2827 */
lsm303ah_xl_sleep_mode_set(const stmdev_ctx_t * ctx,uint8_t val)2828 int32_t lsm303ah_xl_sleep_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
2829 {
2830 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
2831 int32_t ret;
2832
2833 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2834 (uint8_t *)&wake_up_ths_a, 1);
2835
2836 if (ret == 0)
2837 {
2838 wake_up_ths_a.sleep_on = val;
2839 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2840 (uint8_t *)&wake_up_ths_a, 1);
2841 }
2842
2843 return ret;
2844 }
2845
2846 /**
2847 * @brief Enables gyroscope Sleep mode.[get]
2848 *
2849 * @param ctx read / write interface definitions.(ptr)
2850 * @param val Get the values of sleep_on in reg WAKE_UP_THS.(ptr)
2851 * @retval Interface status (MANDATORY: return 0 -> no Error).
2852 *
2853 */
lsm303ah_xl_sleep_mode_get(const stmdev_ctx_t * ctx,uint8_t * val)2854 int32_t lsm303ah_xl_sleep_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
2855 {
2856 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
2857 int32_t ret;
2858
2859 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
2860 (uint8_t *)&wake_up_ths_a, 1);
2861 *val = wake_up_ths_a.sleep_on;
2862
2863 return ret;
2864 }
2865
2866 /**
2867 * @brief Duration to go in sleep mode [1 LSb = 512 / ODR].[set]
2868 *
2869 * @param ctx read / write interface definitions.(ptr)
2870 * @param val Change the values of sleep_dur in reg WAKE_UP_DUR
2871 * @retval Interface status (MANDATORY: return 0 -> no Error).
2872 *
2873 */
lsm303ah_xl_act_sleep_dur_set(const stmdev_ctx_t * ctx,uint8_t val)2874 int32_t lsm303ah_xl_act_sleep_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
2875 {
2876 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2877 int32_t ret;
2878
2879 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2880 (uint8_t *)&wake_up_dur_a, 1);
2881
2882 if (ret == 0)
2883 {
2884 wake_up_dur_a.sleep_dur = val;
2885 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2886 (uint8_t *)&wake_up_dur_a, 1);
2887 }
2888
2889 return ret;
2890 }
2891
2892 /**
2893 * @brief Duration to go in sleep mode [1 LSb = 512 / ODR].[get]
2894 *
2895 * @param ctx read / write interface definitions.(ptr)
2896 * @param val Get the values of sleep_dur in reg WAKE_UP_DUR.(ptr)
2897 * @retval Interface status (MANDATORY: return 0 -> no Error).
2898 *
2899 */
lsm303ah_xl_act_sleep_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)2900 int32_t lsm303ah_xl_act_sleep_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
2901 {
2902 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
2903 int32_t ret;
2904
2905 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
2906 (uint8_t *)&wake_up_dur_a, 1);
2907 *val = wake_up_dur_a.sleep_dur;
2908
2909 return ret;
2910 }
2911
2912 /**
2913 * @}
2914 *
2915 */
2916
2917 /**
2918 * @defgroup tap_generator
2919 * @brief This section groups all the functions that manage the tap and
2920 * double tap event generation.
2921 * @{
2922 *
2923 */
2924
2925 /**
2926 * @brief Enable Z direction in tap recognition.[set]
2927 *
2928 * @param ctx read / write interface definitions.(ptr)
2929 * @param val Change the values of tap_z_en in reg CTRL3
2930 * @retval Interface status (MANDATORY: return 0 -> no Error).
2931 *
2932 */
lsm303ah_xl_tap_detection_on_z_set(const stmdev_ctx_t * ctx,uint8_t val)2933 int32_t lsm303ah_xl_tap_detection_on_z_set(const stmdev_ctx_t *ctx,
2934 uint8_t val)
2935 {
2936 lsm303ah_ctrl3_a_t ctrl3_a;
2937 int32_t ret;
2938
2939 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2940
2941 if (ret == 0)
2942 {
2943 ctrl3_a.tap_z_en = val;
2944 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2945 }
2946
2947 return ret;
2948 }
2949
2950 /**
2951 * @brief Enable Z direction in tap recognition.[get]
2952 *
2953 * @param ctx read / write interface definitions.(ptr)
2954 * @param val Get the values of tap_z_en in reg CTRL3.(ptr)
2955 * @retval Interface status (MANDATORY: return 0 -> no Error).
2956 *
2957 */
lsm303ah_xl_tap_detection_on_z_get(const stmdev_ctx_t * ctx,uint8_t * val)2958 int32_t lsm303ah_xl_tap_detection_on_z_get(const stmdev_ctx_t *ctx,
2959 uint8_t *val)
2960 {
2961 lsm303ah_ctrl3_a_t ctrl3_a;
2962 int32_t ret;
2963
2964 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2965 *val = ctrl3_a.tap_z_en;
2966
2967 return ret;
2968 }
2969
2970 /**
2971 * @brief Enable Y direction in tap recognition.[set]
2972 *
2973 * @param ctx read / write interface definitions.(ptr)
2974 * @param val Change the values of tap_y_en in reg CTRL3
2975 * @retval Interface status (MANDATORY: return 0 -> no Error).
2976 *
2977 */
lsm303ah_xl_tap_detection_on_y_set(const stmdev_ctx_t * ctx,uint8_t val)2978 int32_t lsm303ah_xl_tap_detection_on_y_set(const stmdev_ctx_t *ctx,
2979 uint8_t val)
2980 {
2981 lsm303ah_ctrl3_a_t ctrl3_a;
2982 int32_t ret;
2983
2984 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2985
2986 if (ret == 0)
2987 {
2988 ctrl3_a.tap_y_en = val;
2989 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
2990 }
2991
2992 return ret;
2993 }
2994
2995 /**
2996 * @brief Enable Y direction in tap recognition.[get]
2997 *
2998 * @param ctx read / write interface definitions.(ptr)
2999 * @param val Get the values of tap_y_en in reg CTRL3.(ptr)
3000 * @retval Interface status (MANDATORY: return 0 -> no Error).
3001 *
3002 */
lsm303ah_xl_tap_detection_on_y_get(const stmdev_ctx_t * ctx,uint8_t * val)3003 int32_t lsm303ah_xl_tap_detection_on_y_get(const stmdev_ctx_t *ctx,
3004 uint8_t *val)
3005 {
3006 lsm303ah_ctrl3_a_t ctrl3_a;
3007 int32_t ret;
3008
3009 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
3010 *val = ctrl3_a.tap_y_en;
3011
3012 return ret;
3013 }
3014
3015 /**
3016 * @brief Enable X direction in tap recognition.[set]
3017 *
3018 * @param ctx read / write interface definitions.(ptr)
3019 * @param val Change the values of tap_x_en in reg CTRL3
3020 * @retval Interface status (MANDATORY: return 0 -> no Error).
3021 *
3022 */
lsm303ah_xl_tap_detection_on_x_set(const stmdev_ctx_t * ctx,uint8_t val)3023 int32_t lsm303ah_xl_tap_detection_on_x_set(const stmdev_ctx_t *ctx,
3024 uint8_t val)
3025 {
3026 lsm303ah_ctrl3_a_t ctrl3_a;
3027 int32_t ret;
3028
3029 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
3030
3031 if (ret == 0)
3032 {
3033 ctrl3_a.tap_x_en = val;
3034 ret = lsm303ah_write_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
3035 }
3036
3037 return ret;
3038 }
3039
3040 /**
3041 * @brief Enable X direction in tap recognition.[get]
3042 *
3043 * @param ctx read / write interface definitions.(ptr)
3044 * @param val Get the values of tap_x_en in reg CTRL3.(ptr)
3045 * @retval Interface status (MANDATORY: return 0 -> no Error).
3046 *
3047 */
lsm303ah_xl_tap_detection_on_x_get(const stmdev_ctx_t * ctx,uint8_t * val)3048 int32_t lsm303ah_xl_tap_detection_on_x_get(const stmdev_ctx_t *ctx,
3049 uint8_t *val)
3050 {
3051 lsm303ah_ctrl3_a_t ctrl3_a;
3052 int32_t ret;
3053
3054 ret = lsm303ah_read_reg(ctx, LSM303AH_CTRL3_A, (uint8_t *)&ctrl3_a, 1);
3055 *val = ctrl3_a.tap_x_en;
3056
3057 return ret;
3058 }
3059
3060 /**
3061 * @brief Threshold for tap recognition [1 LSb = FS/32].[set]
3062 *
3063 * @param ctx read / write interface definitions.(ptr)
3064 * @param val Change the values of tap_ths in reg TAP_6D_THS
3065 * @retval Interface status (MANDATORY: return 0 -> no Error).
3066 *
3067 */
lsm303ah_xl_tap_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)3068 int32_t lsm303ah_xl_tap_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
3069 {
3070 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3071 int32_t ret;
3072
3073 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3074 (uint8_t *)&tap_6d_ths_a, 1);
3075
3076 if (ret == 0)
3077 {
3078 tap_6d_ths_a.tap_ths = val;
3079 ret = lsm303ah_write_reg(ctx, LSM303AH_TAP_6D_THS_A,
3080 (uint8_t *)&tap_6d_ths_a, 1);
3081 }
3082
3083 return ret;
3084 }
3085
3086 /**
3087 * @brief Threshold for tap recognition [1 LSb = FS/32].[get]
3088 *
3089 * @param ctx read / write interface definitions.(ptr)
3090 * @param val Get the values of tap_ths in reg TAP_6D_THS.(ptr)
3091 * @retval Interface status (MANDATORY: return 0 -> no Error).
3092 *
3093 */
lsm303ah_xl_tap_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)3094 int32_t lsm303ah_xl_tap_threshold_get(const stmdev_ctx_t *ctx, uint8_t *val)
3095 {
3096 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3097 int32_t ret;
3098
3099 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3100 (uint8_t *)&tap_6d_ths_a, 1);
3101 *val = tap_6d_ths_a.tap_ths;
3102
3103 return ret;
3104 }
3105
3106 /**
3107 * @brief Maximum duration is the maximum time of an overthreshold signal
3108 * detection to be recognized as a tap event. The default value of
3109 * these bits is 00b which corresponds to 4*ODR_XL time. If the
3110 * SHOCK[1:0] bits are set to a different value, 1LSB corresponds to
3111 * 8*ODR_XL time.[set]
3112 *
3113 * @param ctx read / write interface definitions.(ptr)
3114 * @param val Change the values of shock in reg INT_DUR
3115 * @retval Interface status (MANDATORY: return 0 -> no Error).
3116 *
3117 */
lsm303ah_xl_tap_shock_set(const stmdev_ctx_t * ctx,uint8_t val)3118 int32_t lsm303ah_xl_tap_shock_set(const stmdev_ctx_t *ctx, uint8_t val)
3119 {
3120 lsm303ah_int_dur_a_t int_dur_a;
3121 int32_t ret;
3122
3123 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3124 (uint8_t *)&int_dur_a, 1);
3125
3126 if (ret == 0)
3127 {
3128 int_dur_a.shock = val;
3129 ret = lsm303ah_write_reg(ctx, LSM303AH_INT_DUR_A,
3130 (uint8_t *)&int_dur_a, 1);
3131 }
3132
3133 return ret;
3134 }
3135
3136 /**
3137 * @brief Maximum duration is the maximum time of an overthreshold signal
3138 * detection to be recognized as a tap event. The default value of
3139 * these bits is 00b which corresponds to 4*ODR_XL time. If the
3140 * SHOCK[1:0] bits are set to a different value, 1LSB corresponds to
3141 * 8*ODR_XL time.[get]
3142 *
3143 * @param ctx read / write interface definitions.(ptr)
3144 * @param val Get the values of shock in reg INT_DUR.(ptr)
3145 * @retval Interface status (MANDATORY: return 0 -> no Error).
3146 *
3147 */
lsm303ah_xl_tap_shock_get(const stmdev_ctx_t * ctx,uint8_t * val)3148 int32_t lsm303ah_xl_tap_shock_get(const stmdev_ctx_t *ctx, uint8_t *val)
3149 {
3150 lsm303ah_int_dur_a_t int_dur_a;
3151 int32_t ret;
3152
3153 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3154 (uint8_t *)&int_dur_a, 1);
3155 *val = int_dur_a.shock;
3156
3157 return ret;
3158 }
3159
3160 /**
3161 * @brief Quiet time is the time after the first detected tap in which there
3162 * must not be any overthreshold event. The default value of these
3163 * bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0]
3164 * bits are set to a different value, 1LSB corresponds to
3165 * 4*ODR_XL time.[set]
3166 *
3167 * @param ctx read / write interface definitions.(ptr)
3168 * @param val Change the values of quiet in reg INT_DUR
3169 * @retval Interface status (MANDATORY: return 0 -> no Error).
3170 *
3171 */
lsm303ah_xl_tap_quiet_set(const stmdev_ctx_t * ctx,uint8_t val)3172 int32_t lsm303ah_xl_tap_quiet_set(const stmdev_ctx_t *ctx, uint8_t val)
3173 {
3174 lsm303ah_int_dur_a_t int_dur_a;
3175 int32_t ret;
3176
3177 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3178 (uint8_t *)&int_dur_a, 1);
3179
3180 if (ret == 0)
3181 {
3182 int_dur_a.quiet = val;
3183 ret = lsm303ah_write_reg(ctx, LSM303AH_INT_DUR_A,
3184 (uint8_t *)&int_dur_a, 1);
3185 }
3186
3187 return ret;
3188 }
3189
3190 /**
3191 * @brief Quiet time is the time after the first detected tap in which there
3192 * must not be any overthreshold event. The default value of these
3193 * bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0]
3194 * bits are set to a different value, 1LSB corresponds to
3195 * 4*ODR_XL time.[get]
3196 *
3197 * @param ctx read / write interface definitions.(ptr)
3198 * @param val Get the values of quiet in reg INT_DUR.(ptr)
3199 * @retval Interface status (MANDATORY: return 0 -> no Error).
3200 *
3201 */
lsm303ah_xl_tap_quiet_get(const stmdev_ctx_t * ctx,uint8_t * val)3202 int32_t lsm303ah_xl_tap_quiet_get(const stmdev_ctx_t *ctx, uint8_t *val)
3203 {
3204 lsm303ah_int_dur_a_t int_dur_a;
3205 int32_t ret;
3206
3207 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3208 (uint8_t *)&int_dur_a, 1);
3209 *val = int_dur_a.quiet;
3210
3211 return ret;
3212 }
3213
3214 /**
3215 * @brief When double tap recognition is enabled, this register expresses the
3216 * maximum time between two consecutive detected taps to determine a
3217 * double tap event. The default value of these bits is 0000b which
3218 * corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a
3219 * different value, 1LSB corresponds to 32*ODR_XL time.[set]
3220 *
3221 * @param ctx read / write interface definitions.(ptr)
3222 * @param val Change the values of lat in reg INT_DUR
3223 * @retval Interface status (MANDATORY: return 0 -> no Error).
3224 *
3225 */
lsm303ah_xl_tap_dur_set(const stmdev_ctx_t * ctx,uint8_t val)3226 int32_t lsm303ah_xl_tap_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
3227 {
3228 lsm303ah_int_dur_a_t int_dur_a;
3229 int32_t ret;
3230
3231 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3232 (uint8_t *)&int_dur_a, 1);
3233
3234 if (ret == 0)
3235 {
3236 int_dur_a.lat = val;
3237 ret = lsm303ah_write_reg(ctx, LSM303AH_INT_DUR_A,
3238 (uint8_t *)&int_dur_a, 1);
3239 }
3240
3241 return ret;
3242 }
3243
3244 /**
3245 * @brief When double tap recognition is enabled, this register expresses the
3246 * maximum time between two consecutive detected taps to determine a
3247 * double tap event. The default value of these bits is 0000b which
3248 * corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a
3249 * different value, 1LSB corresponds to 32*ODR_XL time.[get]
3250 *
3251 * @param ctx read / write interface definitions.(ptr)
3252 * @param val Get the values of lat in reg INT_DUR.(ptr)
3253 * @retval Interface status (MANDATORY: return 0 -> no Error).
3254 *
3255 */
lsm303ah_xl_tap_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)3256 int32_t lsm303ah_xl_tap_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
3257 {
3258 lsm303ah_int_dur_a_t int_dur_a;
3259 int32_t ret;
3260
3261 ret = lsm303ah_read_reg(ctx, LSM303AH_INT_DUR_A,
3262 (uint8_t *)&int_dur_a, 1);
3263 *val = int_dur_a.lat;
3264
3265 return ret;
3266 }
3267
3268 /**
3269 * @brief Single/double-tap event enable/disable.[set]
3270 *
3271 * @param ctx read / write interface definitions.(ptr)
3272 * @param val Change the values of single_double_tap in regWAKE_UP_THS
3273 * @retval Interface status (MANDATORY: return 0 -> no Error).
3274 *
3275 */
lsm303ah_xl_tap_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_single_double_tap_t val)3276 int32_t lsm303ah_xl_tap_mode_set(const stmdev_ctx_t *ctx,
3277 lsm303ah_xl_single_double_tap_t val)
3278 {
3279 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
3280 int32_t ret;
3281
3282 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
3283 (uint8_t *)&wake_up_ths_a, 1);
3284
3285 if (ret == 0)
3286 {
3287 wake_up_ths_a.single_double_tap = (uint8_t)val;
3288 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_THS_A,
3289 (uint8_t *)&wake_up_ths_a, 1);
3290 }
3291
3292 return ret;
3293 }
3294
3295 /**
3296 * @brief Single/double-tap event enable/disable.[get]
3297 *
3298 * @param ctx read / write interface definitions.(ptr)
3299 * @param val Get the values of single_double_tap in reg WAKE_UP_THS.(ptr)
3300 * @retval Interface status (MANDATORY: return 0 -> no Error).
3301 *
3302 */
lsm303ah_xl_tap_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_single_double_tap_t * val)3303 int32_t lsm303ah_xl_tap_mode_get(const stmdev_ctx_t *ctx,
3304 lsm303ah_xl_single_double_tap_t *val)
3305 {
3306 lsm303ah_wake_up_ths_a_t wake_up_ths_a;
3307 int32_t ret;
3308
3309 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_THS_A,
3310 (uint8_t *)&wake_up_ths_a, 1);
3311
3312 switch (wake_up_ths_a.single_double_tap)
3313 {
3314 case LSM303AH_XL_ONLY_SINGLE:
3315 *val = LSM303AH_XL_ONLY_SINGLE;
3316 break;
3317
3318 case LSM303AH_XL_ONLY_DOUBLE:
3319 *val = LSM303AH_XL_ONLY_DOUBLE;
3320 break;
3321
3322 default:
3323 *val = LSM303AH_XL_ONLY_SINGLE;
3324 break;
3325 }
3326
3327 return ret;
3328 }
3329
3330 /**
3331 * @brief TAP source register[get]
3332 *
3333 * @param ctx read / write interface definitions.(ptr)
3334 * @param val Get registers TAP_SRC.(ptr)
3335 * @retval Interface status (MANDATORY: return 0 -> no Error).
3336 *
3337 */
lsm303ah_xl_tap_src_get(const stmdev_ctx_t * ctx,lsm303ah_tap_src_a_t * val)3338 int32_t lsm303ah_xl_tap_src_get(const stmdev_ctx_t *ctx,
3339 lsm303ah_tap_src_a_t *val)
3340 {
3341 int32_t ret;
3342
3343 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_SRC_A, (uint8_t *) val, 1);
3344
3345 return ret;
3346 }
3347
3348 /**
3349 * @}
3350 *
3351 */
3352
3353 /**
3354 * @defgroup Six_position_detection(6D/4D)
3355 * @brief This section groups all the functions concerning six
3356 * position detection (6D).
3357 * @{
3358 *
3359 */
3360
3361 /**
3362 * @brief Threshold for 4D/6D function.[set]
3363 *
3364 * @param ctx read / write interface definitions.(ptr)
3365 * @param val Change the values of 6d_ths in reg TAP_6D_THS
3366 * @retval Interface status (MANDATORY: return 0 -> no Error).
3367 *
3368 */
lsm303ah_xl_6d_threshold_set(const stmdev_ctx_t * ctx,lsm303ah_xl_6d_ths_t val)3369 int32_t lsm303ah_xl_6d_threshold_set(const stmdev_ctx_t *ctx,
3370 lsm303ah_xl_6d_ths_t val)
3371 {
3372 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3373 int32_t ret;
3374
3375 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3376 (uint8_t *)&tap_6d_ths_a, 1);
3377
3378 if (ret == 0)
3379 {
3380 tap_6d_ths_a._6d_ths = (uint8_t)val;
3381 ret = lsm303ah_write_reg(ctx, LSM303AH_TAP_6D_THS_A,
3382 (uint8_t *)&tap_6d_ths_a, 1);
3383 }
3384
3385 return ret;
3386 }
3387
3388 /**
3389 * @brief Threshold for 4D/6D function.[get]
3390 *
3391 * @param ctx read / write interface definitions.(ptr)
3392 * @param val Get the values of 6d_ths in reg TAP_6D_THS.(ptr)
3393 * @retval Interface status (MANDATORY: return 0 -> no Error).
3394 *
3395 */
lsm303ah_xl_6d_threshold_get(const stmdev_ctx_t * ctx,lsm303ah_xl_6d_ths_t * val)3396 int32_t lsm303ah_xl_6d_threshold_get(const stmdev_ctx_t *ctx,
3397 lsm303ah_xl_6d_ths_t *val)
3398 {
3399 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3400 int32_t ret;
3401
3402 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3403 (uint8_t *)&tap_6d_ths_a, 1);
3404
3405 switch (tap_6d_ths_a._6d_ths)
3406 {
3407 case LSM303AH_XL_DEG_80:
3408 *val = LSM303AH_XL_DEG_80;
3409 break;
3410
3411 case LSM303AH_XL_DEG_70:
3412 *val = LSM303AH_XL_DEG_70;
3413 break;
3414
3415 case LSM303AH_XL_DEG_60:
3416 *val = LSM303AH_XL_DEG_60;
3417 break;
3418
3419 case LSM303AH_XL_DEG_50:
3420 *val = LSM303AH_XL_DEG_50;
3421 break;
3422
3423 default:
3424 *val = LSM303AH_XL_DEG_80;
3425 break;
3426 }
3427
3428 return ret;
3429 }
3430
3431 /**
3432 * @brief 4D orientation detection enable.[set]
3433 *
3434 * @param ctx read / write interface definitions.(ptr)
3435 * @param val Change the values of 4d_en in reg TAP_6D_THS
3436 * @retval Interface status (MANDATORY: return 0 -> no Error).
3437 *
3438 */
lsm303ah_xl_4d_mode_set(const stmdev_ctx_t * ctx,uint8_t val)3439 int32_t lsm303ah_xl_4d_mode_set(const stmdev_ctx_t *ctx, uint8_t val)
3440 {
3441 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3442 int32_t ret;
3443
3444 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3445 (uint8_t *)&tap_6d_ths_a, 1);
3446
3447 if (ret == 0)
3448 {
3449 tap_6d_ths_a._4d_en = val;
3450 ret = lsm303ah_write_reg(ctx, LSM303AH_TAP_6D_THS_A,
3451 (uint8_t *)&tap_6d_ths_a, 1);
3452 }
3453
3454 return ret;
3455 }
3456
3457 /**
3458 * @brief 4D orientation detection enable.[get]
3459 *
3460 * @param ctx read / write interface definitions.(ptr)
3461 * @param val Get the values of 4d_en in reg TAP_6D_THS.(ptr)
3462 * @retval Interface status (MANDATORY: return 0 -> no Error).
3463 *
3464 */
lsm303ah_xl_4d_mode_get(const stmdev_ctx_t * ctx,uint8_t * val)3465 int32_t lsm303ah_xl_4d_mode_get(const stmdev_ctx_t *ctx, uint8_t *val)
3466 {
3467 lsm303ah_tap_6d_ths_a_t tap_6d_ths_a;
3468 int32_t ret;
3469
3470 ret = lsm303ah_read_reg(ctx, LSM303AH_TAP_6D_THS_A,
3471 (uint8_t *)&tap_6d_ths_a, 1);
3472 *val = tap_6d_ths_a._4d_en;
3473
3474 return ret;
3475 }
3476
3477 /**
3478 * @brief 6D source register.[get]
3479 *
3480 * @param ctx read / write interface definitions.(ptr)
3481 * @param val Get union of registers from 6D_SRC to.(ptr)
3482 * @retval Interface status (MANDATORY: return 0 -> no Error).
3483 *
3484 */
lsm303ah_xl_6d_src_get(const stmdev_ctx_t * ctx,lsm303ah_6d_src_a_t * val)3485 int32_t lsm303ah_xl_6d_src_get(const stmdev_ctx_t *ctx,
3486 lsm303ah_6d_src_a_t *val)
3487 {
3488 int32_t ret;
3489
3490 ret = lsm303ah_read_reg(ctx, LSM303AH_6D_SRC_A, (uint8_t *) val, 1);
3491
3492 return ret;
3493 }
3494
3495 /**
3496 * @}
3497 *
3498 */
3499
3500 /**
3501 * @defgroup free_fall
3502 * @brief This section group all the functions concerning the
3503 * free fall detection.
3504 * @{
3505 *
3506 */
3507
3508 /**
3509 * @brief Free-fall duration [1 LSb = 1 / ODR].[set]
3510 *
3511 * @param ctx read / write interface definitions.(ptr)
3512 * @param val Change the values of ff_dur in reg WAKE_UP_DUR/FREE_FALL
3513 * @retval Interface status (MANDATORY: return 0 -> no Error).
3514 *
3515 */
lsm303ah_xl_ff_dur_set(const stmdev_ctx_t * ctx,uint8_t val)3516 int32_t lsm303ah_xl_ff_dur_set(const stmdev_ctx_t *ctx, uint8_t val)
3517 {
3518 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
3519 lsm303ah_free_fall_a_t free_fall_a;
3520 int32_t ret;
3521
3522 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
3523 (uint8_t *)&wake_up_dur_a, 1);
3524
3525 if (ret == 0)
3526 {
3527 wake_up_dur_a.ff_dur = (val & 0x20U) >> 5;
3528 ret = lsm303ah_write_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
3529 (uint8_t *)&wake_up_dur_a, 1);
3530 }
3531
3532 if (ret == 0)
3533 {
3534 ret = lsm303ah_read_reg(ctx, LSM303AH_FREE_FALL_A,
3535 (uint8_t *)&free_fall_a, 1);
3536 }
3537
3538 if (ret == 0)
3539 {
3540 free_fall_a.ff_dur = 0x1FU & val;
3541 ret = lsm303ah_write_reg(ctx, LSM303AH_FREE_FALL_A,
3542 (uint8_t *)&free_fall_a, 1);
3543 }
3544
3545 return ret;
3546 }
3547
3548 /**
3549 * @brief Free-fall duration [1 LSb = 1 / ODR].[get]
3550 *
3551 * @param ctx read / write interface definitions.(ptr)
3552 * @param val Get the values of ff_dur in reg WAKE_UP_DUR/FREE_FALL.(ptr)
3553 * @retval Interface status (MANDATORY: return 0 -> no Error).
3554 *
3555 */
lsm303ah_xl_ff_dur_get(const stmdev_ctx_t * ctx,uint8_t * val)3556 int32_t lsm303ah_xl_ff_dur_get(const stmdev_ctx_t *ctx, uint8_t *val)
3557 {
3558 lsm303ah_wake_up_dur_a_t wake_up_dur_a;
3559 lsm303ah_free_fall_a_t free_fall_a;
3560 int32_t ret;
3561
3562 ret = lsm303ah_read_reg(ctx, LSM303AH_WAKE_UP_DUR_A,
3563 (uint8_t *)&wake_up_dur_a, 1);
3564
3565 if (ret == 0)
3566 {
3567 ret = lsm303ah_read_reg(ctx, LSM303AH_FREE_FALL_A,
3568 (uint8_t *)&free_fall_a, 1);
3569 }
3570
3571 *val = (wake_up_dur_a.ff_dur << 5) + free_fall_a.ff_dur;
3572
3573 return ret;
3574 }
3575
3576 /**
3577 * @brief Free-fall threshold [1 LSB = 31.25 mg].[set]
3578 *
3579 * @param ctx read / write interface definitions.(ptr)
3580 * @param val Change the values of ff_ths in reg FREE_FALL
3581 * @retval Interface status (MANDATORY: return 0 -> no Error).
3582 *
3583 */
lsm303ah_xl_ff_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)3584 int32_t lsm303ah_xl_ff_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
3585 {
3586 lsm303ah_free_fall_a_t free_fall_a;
3587 int32_t ret;
3588
3589 ret = lsm303ah_read_reg(ctx, LSM303AH_FREE_FALL_A,
3590 (uint8_t *)&free_fall_a, 1);
3591
3592 if (ret == 0)
3593 {
3594 free_fall_a.ff_ths = val;
3595 ret = lsm303ah_write_reg(ctx, LSM303AH_FREE_FALL_A,
3596 (uint8_t *)&free_fall_a, 1);
3597 }
3598
3599 return ret;
3600 }
3601
3602 /**
3603 * @brief Free-fall threshold [1 LSB = 31.25 mg].[get]
3604 *
3605 * @param ctx read / write interface definitions.(ptr)
3606 * @param val Get the values of ff_ths in reg FREE_FALL.(ptr)
3607 * @retval Interface status (MANDATORY: return 0 -> no Error).
3608 *
3609 */
lsm303ah_xl_ff_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)3610 int32_t lsm303ah_xl_ff_threshold_get(const stmdev_ctx_t *ctx, uint8_t *val)
3611 {
3612 lsm303ah_free_fall_a_t free_fall_a;
3613 int32_t ret;
3614
3615 ret = lsm303ah_read_reg(ctx, LSM303AH_FREE_FALL_A,
3616 (uint8_t *)&free_fall_a, 1);
3617 *val = free_fall_a.ff_ths;
3618
3619 return ret;
3620 }
3621
3622 /**
3623 * @}
3624 *
3625 */
3626
3627 /**
3628 * @defgroup Fifo
3629 * @brief This section group all the functions concerning the fifo usage
3630 * @{
3631 *
3632 */
3633
3634 /**
3635 * @brief Module routine result is send to
3636 * FIFO instead of X,Y,Z acceleration data.[set]
3637 *
3638 * @param ctx read / write interface definitions.(ptr)
3639 * @param val Change the values of module_to_fifo in reg FIFO_CTRL
3640 * @retval Interface status (MANDATORY: return 0 -> no Error).
3641 *
3642 */
lsm303ah_xl_fifo_xl_module_batch_set(const stmdev_ctx_t * ctx,uint8_t val)3643 int32_t lsm303ah_xl_fifo_xl_module_batch_set(const stmdev_ctx_t *ctx,
3644 uint8_t val)
3645 {
3646 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
3647 int32_t ret;
3648
3649 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
3650 (uint8_t *)&fifo_ctrl_a, 1);
3651
3652 if (ret == 0)
3653 {
3654 fifo_ctrl_a.module_to_fifo = val;
3655 ret = lsm303ah_write_reg(ctx, LSM303AH_FIFO_CTRL_A,
3656 (uint8_t *)&fifo_ctrl_a, 1);
3657 }
3658
3659 return ret;
3660 }
3661
3662 /**
3663 * @brief Module routine result is send to
3664 * FIFO instead of X,Y,Z acceleration data.[get]
3665 *
3666 * @param ctx read / write interface definitions.(ptr)
3667 * @param val Get the values of module_to_fifo in reg FIFO_CTRL.(ptr)
3668 * @retval Interface status (MANDATORY: return 0 -> no Error).
3669 *
3670 */
lsm303ah_xl_fifo_xl_module_batch_get(const stmdev_ctx_t * ctx,uint8_t * val)3671 int32_t lsm303ah_xl_fifo_xl_module_batch_get(const stmdev_ctx_t *ctx,
3672 uint8_t *val)
3673 {
3674 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
3675 int32_t ret;
3676
3677 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
3678 (uint8_t *)&fifo_ctrl_a, 1);
3679 *val = fifo_ctrl_a.module_to_fifo;
3680
3681 return ret;
3682 }
3683
3684 /**
3685 * @brief FIFO mode selection.[set]
3686 *
3687 * @param ctx read / write interface definitions.(ptr)
3688 * @param val Change the values of fmode in reg FIFO_CTRL
3689 * @retval Interface status (MANDATORY: return 0 -> no Error).
3690 *
3691 */
lsm303ah_xl_fifo_mode_set(const stmdev_ctx_t * ctx,lsm303ah_xl_fmode_t val)3692 int32_t lsm303ah_xl_fifo_mode_set(const stmdev_ctx_t *ctx,
3693 lsm303ah_xl_fmode_t val)
3694 {
3695 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
3696 int32_t ret;
3697
3698 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
3699 (uint8_t *)&fifo_ctrl_a, 1);
3700
3701 if (ret == 0)
3702 {
3703 fifo_ctrl_a.fmode = (uint8_t)val;
3704 ret = lsm303ah_write_reg(ctx, LSM303AH_FIFO_CTRL_A,
3705 (uint8_t *)&fifo_ctrl_a, 1);
3706 }
3707
3708 return ret;
3709 }
3710
3711 /**
3712 * @brief FIFO mode selection.[get]
3713 *
3714 * @param ctx read / write interface definitions.(ptr)
3715 * @param val Get the values of fmode in reg FIFO_CTRL.(ptr)
3716 * @retval Interface status (MANDATORY: return 0 -> no Error).
3717 *
3718 */
lsm303ah_xl_fifo_mode_get(const stmdev_ctx_t * ctx,lsm303ah_xl_fmode_t * val)3719 int32_t lsm303ah_xl_fifo_mode_get(const stmdev_ctx_t *ctx,
3720 lsm303ah_xl_fmode_t *val)
3721 {
3722 lsm303ah_fifo_ctrl_a_t fifo_ctrl_a;
3723 int32_t ret;
3724
3725 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_CTRL_A,
3726 (uint8_t *)&fifo_ctrl_a, 1);
3727
3728 switch (fifo_ctrl_a.fmode)
3729 {
3730 case LSM303AH_XL_BYPASS_MODE:
3731 *val = LSM303AH_XL_BYPASS_MODE;
3732 break;
3733
3734 case LSM303AH_XL_FIFO_MODE:
3735 *val = LSM303AH_XL_FIFO_MODE;
3736 break;
3737
3738 case LSM303AH_XL_STREAM_TO_FIFO_MODE:
3739 *val = LSM303AH_XL_STREAM_TO_FIFO_MODE;
3740 break;
3741
3742 case LSM303AH_XL_BYPASS_TO_STREAM_MODE:
3743 *val = LSM303AH_XL_BYPASS_TO_STREAM_MODE;
3744 break;
3745
3746 case LSM303AH_XL_STREAM_MODE:
3747 *val = LSM303AH_XL_STREAM_MODE;
3748 break;
3749
3750 default:
3751 *val = LSM303AH_XL_BYPASS_MODE;
3752 break;
3753 }
3754
3755 return ret;
3756 }
3757
3758 /**
3759 * @brief FIFO watermark level selection.[set]
3760 *
3761 * @param ctx read / write interface definitions.(ptr)
3762 * @param val Change the values of fifo_watermark in reg FIFO_THS
3763 * @retval Interface status (MANDATORY: return 0 -> no Error).
3764 *
3765 */
lsm303ah_xl_fifo_watermark_set(const stmdev_ctx_t * ctx,uint8_t val)3766 int32_t lsm303ah_xl_fifo_watermark_set(const stmdev_ctx_t *ctx, uint8_t val)
3767 {
3768 int32_t ret;
3769
3770 ret = lsm303ah_write_reg(ctx, LSM303AH_FIFO_THS_A, (uint8_t *)&val, 1);
3771
3772 return ret;
3773 }
3774
3775 /**
3776 * @brief FIFO watermark level selection.[get]
3777 *
3778 * @param ctx read / write interface definitions.(ptr)
3779 * @param val Get the values of fifo_watermark in reg FIFO_THS.(ptr)
3780 * @retval Interface status (MANDATORY: return 0 -> no Error).
3781 *
3782 */
lsm303ah_xl_fifo_watermark_get(const stmdev_ctx_t * ctx,uint8_t * val)3783 int32_t lsm303ah_xl_fifo_watermark_get(const stmdev_ctx_t *ctx,
3784 uint8_t *val)
3785 {
3786 int32_t ret;
3787
3788 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_THS_A, val, 1);
3789
3790 return ret;
3791 }
3792
3793 /**
3794 * @brief FIFO full, 256 unread samples.[get]
3795 *
3796 * @param ctx read / write interface definitions.(ptr)
3797 * @param val Get the values of diff in reg FIFO_SRC.(ptr)
3798 * @retval Interface status (MANDATORY: return 0 -> no Error).
3799 *
3800 */
lsm303ah_xl_fifo_full_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)3801 int32_t lsm303ah_xl_fifo_full_flag_get(const stmdev_ctx_t *ctx,
3802 uint8_t *val)
3803 {
3804 lsm303ah_fifo_src_a_t fifo_src_a;
3805 int32_t ret;
3806
3807 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A,
3808 (uint8_t *)&fifo_src_a, 1);
3809 *val = fifo_src_a.diff;
3810
3811 return ret;
3812 }
3813
3814 /**
3815 * @brief FIFO overrun status.[get]
3816 *
3817 * @param ctx read / write interface definitions.(ptr)
3818 * @param val Get the values of fifo_ovr in reg FIFO_SRC.(ptr)
3819 * @retval Interface status (MANDATORY: return 0 -> no Error).
3820 *
3821 */
lsm303ah_xl_fifo_ovr_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)3822 int32_t lsm303ah_xl_fifo_ovr_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
3823 {
3824 lsm303ah_fifo_src_a_t fifo_src_a;
3825 int32_t ret;
3826
3827 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A,
3828 (uint8_t *)&fifo_src_a, 1);
3829 *val = fifo_src_a.fifo_ovr;
3830
3831 return ret;
3832 }
3833
3834 /**
3835 * @brief FIFO threshold status.[get]
3836 *
3837 * @param ctx read / write interface definitions.(ptr)
3838 * @param val Get the values of fth in reg FIFO_SRC.(ptr)
3839 * @retval Interface status (MANDATORY: return 0 -> no Error).
3840 *
3841 */
lsm303ah_xl_fifo_wtm_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)3842 int32_t lsm303ah_xl_fifo_wtm_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
3843 {
3844 lsm303ah_fifo_src_a_t fifo_src_a;
3845 int32_t ret;
3846
3847 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A,
3848 (uint8_t *)&fifo_src_a, 1);
3849 *val = fifo_src_a.fth;
3850
3851 return ret;
3852 }
3853
3854 /**
3855 * @brief The number of unread samples stored in FIFO.[get]
3856 *
3857 * @param ctx read / write interface definitions.(ptr)
3858 * @param val Get the values of diff in reg FIFO_SAMPLES.(ptr)
3859 * @retval Interface status (MANDATORY: return 0 -> no Error).
3860 *
3861 */
lsm303ah_xl_fifo_data_level_get(const stmdev_ctx_t * ctx,uint16_t * val)3862 int32_t lsm303ah_xl_fifo_data_level_get(const stmdev_ctx_t *ctx,
3863 uint16_t *val)
3864 {
3865 lsm303ah_fifo_src_a_t fifo_src_a;
3866 uint8_t fifo_sample_a;
3867 int32_t ret;
3868
3869 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A,
3870 (uint8_t *)&fifo_src_a, 1);
3871
3872 if (ret == 0)
3873 {
3874 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SAMPLES_A, &fifo_sample_a, 1);
3875 *val = fifo_src_a.diff;
3876 *val = *val << 8;
3877 *val += fifo_sample_a;
3878 }
3879
3880 return ret;
3881 }
3882
3883 /**
3884 * @brief FIFO_SRCregister.[get]
3885 *
3886 * @param ctx read / write interface definitions.(ptr)
3887 * @param val Get registers FIFO_SRC.(ptr)
3888 * @retval Interface status (MANDATORY: return 0 -> no Error).
3889 *
3890 */
lsm303ah_xl_fifo_src_get(const stmdev_ctx_t * ctx,lsm303ah_fifo_src_a_t * val)3891 int32_t lsm303ah_xl_fifo_src_get(const stmdev_ctx_t *ctx,
3892 lsm303ah_fifo_src_a_t *val)
3893 {
3894 int32_t ret;
3895
3896 ret = lsm303ah_read_reg(ctx, LSM303AH_FIFO_SRC_A, (uint8_t *) val, 1);
3897
3898 return ret;
3899 }
3900
3901 /**
3902 * @}
3903 *
3904 */
3905
3906 /**
3907 * @defgroup Pedometer
3908 * @brief This section groups all the functions that manage pedometer.
3909 * @{
3910 *
3911 */
3912
3913 /**
3914 * @brief Minimum threshold value for step counter routine.[set]
3915 *
3916 * @param ctx read / write interface definitions.(ptr)
3917 * @param val Change the values of sc_mths in reg STEP_COUNTER_MINTHS
3918 * @retval Interface status (MANDATORY: return 0 -> no Error).
3919 *
3920 */
lsm303ah_xl_pedo_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)3921 int32_t lsm303ah_xl_pedo_threshold_set(const stmdev_ctx_t *ctx, uint8_t val)
3922 {
3923 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
3924 int32_t ret;
3925
3926 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
3927 (uint8_t *)&step_counter_minths_a, 1);
3928
3929 if (ret == 0)
3930 {
3931 step_counter_minths_a.sc_mths = val;
3932 ret = lsm303ah_write_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
3933 (uint8_t *)&step_counter_minths_a, 1);
3934 }
3935
3936 return ret;
3937 }
3938
3939 /**
3940 * @brief Minimum threshold value for step counter routine.[get]
3941 *
3942 * @param ctx read / write interface definitions.(ptr)
3943 * @param val Get the values of sc_mths in reg STEP_COUNTER_MINTHS.(ptr)
3944 * @retval Interface status (MANDATORY: return 0 -> no Error).
3945 *
3946 */
lsm303ah_xl_pedo_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)3947 int32_t lsm303ah_xl_pedo_threshold_get(const stmdev_ctx_t *ctx,
3948 uint8_t *val)
3949 {
3950 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
3951 int32_t ret;
3952
3953 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
3954 (uint8_t *)&step_counter_minths_a, 1);
3955 *val = step_counter_minths_a.sc_mths;
3956
3957 return ret;
3958 }
3959
3960 /**
3961 * @brief Pedometer data range.[set]
3962 *
3963 * @param ctx read / write interface definitions.(ptr)
3964 * @param val Change the values of pedo4g in reg STEP_COUNTER_MINTHS
3965 * @retval Interface status (MANDATORY: return 0 -> no Error).
3966 *
3967 */
lsm303ah_xl_pedo_full_scale_set(const stmdev_ctx_t * ctx,lsm303ah_xl_pedo4g_t val)3968 int32_t lsm303ah_xl_pedo_full_scale_set(const stmdev_ctx_t *ctx,
3969 lsm303ah_xl_pedo4g_t val)
3970 {
3971 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
3972 int32_t ret;
3973
3974 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
3975 (uint8_t *)&step_counter_minths_a, 1);
3976
3977 if (ret == 0)
3978 {
3979 step_counter_minths_a.pedo4g = (uint8_t)val;
3980 ret = lsm303ah_write_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
3981 (uint8_t *)&step_counter_minths_a, 1);
3982 }
3983
3984 return ret;
3985 }
3986
3987 /**
3988 * @brief Pedometer data range.[get]
3989 *
3990 * @param ctx read / write interface definitions.(ptr)
3991 * @param val Get the values of pedo4g in reg STEP_COUNTER_MINTHS.(ptr)
3992 * @retval Interface status (MANDATORY: return 0 -> no Error).
3993 *
3994 */
lsm303ah_xl_pedo_full_scale_get(const stmdev_ctx_t * ctx,lsm303ah_xl_pedo4g_t * val)3995 int32_t lsm303ah_xl_pedo_full_scale_get(const stmdev_ctx_t *ctx,
3996 lsm303ah_xl_pedo4g_t *val)
3997 {
3998 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
3999 int32_t ret;
4000
4001 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
4002 (uint8_t *)&step_counter_minths_a, 1);
4003
4004 switch (step_counter_minths_a.pedo4g)
4005 {
4006 case LSM303AH_XL_PEDO_AT_2g:
4007 *val = LSM303AH_XL_PEDO_AT_2g;
4008 break;
4009
4010 case LSM303AH_XL_PEDO_AT_4g:
4011 *val = LSM303AH_XL_PEDO_AT_4g;
4012 break;
4013
4014 default:
4015 *val = LSM303AH_XL_PEDO_AT_2g;
4016 break;
4017 }
4018
4019 return ret;
4020 }
4021
4022 /**
4023 * @brief Reset pedometer step counter.[set]
4024 *
4025 * @param ctx read / write interface definitions.(ptr)
4026 * @param val Change the values of rst_nstep in reg STEP_COUNTER_MINTHS
4027 * @retval Interface status (MANDATORY: return 0 -> no Error).
4028 *
4029 */
lsm303ah_xl_pedo_step_reset_set(const stmdev_ctx_t * ctx,uint8_t val)4030 int32_t lsm303ah_xl_pedo_step_reset_set(const stmdev_ctx_t *ctx,
4031 uint8_t val)
4032 {
4033 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
4034 int32_t ret;
4035
4036 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
4037 (uint8_t *)&step_counter_minths_a, 1);
4038
4039 if (ret == 0)
4040 {
4041 step_counter_minths_a.rst_nstep = val;
4042 ret = lsm303ah_write_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
4043 (uint8_t *)&step_counter_minths_a, 1);
4044 }
4045
4046 return ret;
4047 }
4048
4049 /**
4050 * @brief Reset pedometer step counter.[get]
4051 *
4052 * @param ctx read / write interface definitions.(ptr)
4053 * @param val Get the values of rst_nstep in reg STEP_COUNTER_MINTHS.(ptr)
4054 * @retval Interface status (MANDATORY: return 0 -> no Error).
4055 *
4056 */
lsm303ah_xl_pedo_step_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)4057 int32_t lsm303ah_xl_pedo_step_reset_get(const stmdev_ctx_t *ctx,
4058 uint8_t *val)
4059 {
4060 lsm303ah_step_counter_minths_a_t step_counter_minths_a;
4061 int32_t ret;
4062
4063 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNTER_MINTHS_A,
4064 (uint8_t *)&step_counter_minths_a, 1);
4065 *val = step_counter_minths_a.rst_nstep;
4066
4067 return ret;
4068 }
4069
4070 /**
4071 * @brief Step detection flag.[get]
4072 *
4073 * @param ctx read / write interface definitions.(ptr)
4074 * @param val Get the values of step_detect in reg FUNC_CK_GATE.(ptr)
4075 * @retval Interface status (MANDATORY: return 0 -> no Error).
4076 *
4077 */
lsm303ah_xl_pedo_step_detect_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4078 int32_t lsm303ah_xl_pedo_step_detect_flag_get(const stmdev_ctx_t *ctx,
4079 uint8_t *val)
4080 {
4081 lsm303ah_func_ck_gate_a_t func_ck_gate_a;
4082 int32_t ret;
4083
4084 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CK_GATE_A,
4085 (uint8_t *)&func_ck_gate_a, 1);
4086 *val = func_ck_gate_a.step_detect;
4087
4088 return ret;
4089 }
4090
4091 /**
4092 * @brief Enable pedometer algorithm.[set]
4093 *
4094 * @param ctx read / write interface definitions.(ptr)
4095 * @param val Change the values of step_cnt_on in reg FUNC_CTRL
4096 * @retval Interface status (MANDATORY: return 0 -> no Error).
4097 *
4098 */
lsm303ah_xl_pedo_sens_set(const stmdev_ctx_t * ctx,uint8_t val)4099 int32_t lsm303ah_xl_pedo_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
4100 {
4101 lsm303ah_func_ctrl_a_t func_ctrl_a;
4102 int32_t ret;
4103
4104 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4105 (uint8_t *)&func_ctrl_a, 1);
4106
4107 if (ret == 0)
4108 {
4109 func_ctrl_a.step_cnt_on = val;
4110 ret = lsm303ah_write_reg(ctx, LSM303AH_FUNC_CTRL_A,
4111 (uint8_t *)&func_ctrl_a, 1);
4112 }
4113
4114 return ret;
4115 }
4116
4117 /**
4118 * @brief Enable pedometer algorithm.[get]
4119 *
4120 * @param ctx read / write interface definitions.(ptr)
4121 * @param val Get the values of step_cnt_on in reg FUNC_CTRL.(ptr)
4122 * @retval Interface status (MANDATORY: return 0 -> no Error).
4123 *
4124 */
lsm303ah_xl_pedo_sens_get(const stmdev_ctx_t * ctx,uint8_t * val)4125 int32_t lsm303ah_xl_pedo_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
4126 {
4127 lsm303ah_func_ctrl_a_t func_ctrl_a;
4128 int32_t ret;
4129
4130 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4131 (uint8_t *)&func_ctrl_a, 1);
4132 *val = func_ctrl_a.step_cnt_on;
4133
4134 return ret;
4135 }
4136
4137 /**
4138 * @brief Minimum number of steps to start the increment step counter.[set]
4139 *
4140 * @param ctx read / write interface definitions.(ptr)
4141 * @param val Change the values of deb_step in reg PEDO_DEB_REG
4142 * @retval Interface status (MANDATORY: return 0 -> no Error).
4143 *
4144 */
lsm303ah_xl_pedo_debounce_steps_set(const stmdev_ctx_t * ctx,uint8_t val)4145 int32_t lsm303ah_xl_pedo_debounce_steps_set(const stmdev_ctx_t *ctx,
4146 uint8_t val)
4147 {
4148 lsm303ah_pedo_deb_reg_a_t pedo_deb_reg_a;
4149 int32_t ret;
4150
4151 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4152
4153 if (ret == 0)
4154 {
4155 ret = lsm303ah_read_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4156 (uint8_t *)&pedo_deb_reg_a, 1);
4157 }
4158
4159 if (ret == 0)
4160 {
4161 pedo_deb_reg_a.deb_step = val;
4162 ret = lsm303ah_write_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4163 (uint8_t *)&pedo_deb_reg_a, 1);
4164 }
4165
4166 if (ret == 0)
4167 {
4168 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4169 }
4170
4171 return ret;
4172 }
4173
4174 /**
4175 * @brief Minimum number of steps to start the increment step counter.[get]
4176 *
4177 * @param ctx read / write interface definitions.(ptr)
4178 * @param val Get the values of deb_step in reg PEDO_DEB_REG.(ptr)
4179 * @retval Interface status (MANDATORY: return 0 -> no Error).
4180 *
4181 */
lsm303ah_xl_pedo_debounce_steps_get(const stmdev_ctx_t * ctx,uint8_t * val)4182 int32_t lsm303ah_xl_pedo_debounce_steps_get(const stmdev_ctx_t *ctx,
4183 uint8_t *val)
4184 {
4185 lsm303ah_pedo_deb_reg_a_t pedo_deb_reg_a;
4186 int32_t ret;
4187
4188 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4189
4190 if (ret == 0)
4191 {
4192 ret = lsm303ah_read_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4193 (uint8_t *)&pedo_deb_reg_a, 1);
4194 }
4195
4196 if (ret == 0)
4197 {
4198 *val = pedo_deb_reg_a.deb_step;
4199 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4200 }
4201
4202 return ret;
4203 }
4204
4205 /**
4206 * @brief Debounce time. If the time between two consecutive steps is greater
4207 * than DEB_TIME*80ms, the debouncer is reactivated.
4208 * Default value: 01101[set]
4209 *
4210 * @param ctx read / write interface definitions.(ptr)
4211 * @param val Change the values of deb_time in reg PEDO_DEB_REG
4212 * @retval Interface status (MANDATORY: return 0 -> no Error).
4213 *
4214 */
lsm303ah_xl_pedo_timeout_set(const stmdev_ctx_t * ctx,uint8_t val)4215 int32_t lsm303ah_xl_pedo_timeout_set(const stmdev_ctx_t *ctx, uint8_t val)
4216 {
4217 lsm303ah_pedo_deb_reg_a_t pedo_deb_reg_a;
4218 int32_t ret;
4219
4220 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4221
4222 if (ret == 0)
4223 {
4224 ret = lsm303ah_read_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4225 (uint8_t *)&pedo_deb_reg_a, 1);
4226 }
4227
4228 if (ret == 0)
4229 {
4230 pedo_deb_reg_a.deb_time = val;
4231 ret = lsm303ah_write_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4232 (uint8_t *)&pedo_deb_reg_a, 1);
4233 }
4234
4235 if (ret == 0)
4236 {
4237 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4238 }
4239
4240 return ret;
4241 }
4242
4243 /**
4244 * @brief Debounce time. If the time between two consecutive steps is greater
4245 * than DEB_TIME*80ms, the debouncer is reactivated.
4246 * Default value: 01101[get]
4247 *
4248 * @param ctx read / write interface definitions.(ptr)
4249 * @param val Get the values of deb_time in reg PEDO_DEB_REG.(ptr)
4250 * @retval Interface status (MANDATORY: return 0 -> no Error).
4251 *
4252 */
lsm303ah_xl_pedo_timeout_get(const stmdev_ctx_t * ctx,uint8_t * val)4253 int32_t lsm303ah_xl_pedo_timeout_get(const stmdev_ctx_t *ctx, uint8_t *val)
4254 {
4255 lsm303ah_pedo_deb_reg_a_t pedo_deb_reg_a;
4256 int32_t ret;
4257
4258 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4259
4260 if (ret == 0)
4261 {
4262 ret = lsm303ah_read_reg(ctx, LSM303AH_PEDO_DEB_REG_A,
4263 (uint8_t *)&pedo_deb_reg_a, 1);
4264 }
4265
4266 if (ret == 0)
4267 {
4268 *val = pedo_deb_reg_a.deb_time;
4269 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4270 }
4271
4272 return ret;
4273 }
4274
4275 /**
4276 * @brief Period of time to detect at least one step to generate step
4277 * recognition [1 LSb = 1.6384 s].[set]
4278 *
4279 * @param ctx read / write interface definitions.(ptr)
4280 * @param buff buffer that contains data to write
4281 * @retval Interface status (MANDATORY: return 0 -> no Error).
4282 *
4283 */
lsm303ah_xl_pedo_steps_period_set(const stmdev_ctx_t * ctx,uint8_t * buff)4284 int32_t lsm303ah_xl_pedo_steps_period_set(const stmdev_ctx_t *ctx,
4285 uint8_t *buff)
4286 {
4287 int32_t ret;
4288
4289 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4290
4291 if (ret == 0)
4292 {
4293 ret = lsm303ah_write_reg(ctx, LSM303AH_STEP_COUNT_DELTA_A, buff, 1);
4294 }
4295
4296 if (ret == 0)
4297 {
4298 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4299 }
4300
4301 return ret;
4302 }
4303
4304 /**
4305 * @brief Period of time to detect at least one step to generate step
4306 * recognition [1 LSb = 1.6384 s].[get]
4307 *
4308 * @param ctx read / write interface definitions.(ptr)
4309 * @param buff buffer that stores data read
4310 * @retval Interface status (MANDATORY: return 0 -> no Error).
4311 *
4312 */
lsm303ah_xl_pedo_steps_period_get(const stmdev_ctx_t * ctx,uint8_t * buff)4313 int32_t lsm303ah_xl_pedo_steps_period_get(const stmdev_ctx_t *ctx,
4314 uint8_t *buff)
4315 {
4316 int32_t ret;
4317
4318 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4319
4320 if (ret == 0)
4321 {
4322 ret = lsm303ah_read_reg(ctx, LSM303AH_STEP_COUNT_DELTA_A, buff, 1);
4323 }
4324
4325 if (ret == 0)
4326 {
4327 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4328 }
4329
4330 return ret;
4331 }
4332
4333 /**
4334 * @}
4335 *
4336 */
4337
4338 /**
4339 * @defgroup significant_motion
4340 * @brief This section groups all the functions that manage the
4341 * significant motion detection.
4342 * @{
4343 *
4344 */
4345
4346 /**
4347 * @brief Significant motion event detection status.[get]
4348 *
4349 * @param ctx read / write interface definitions.(ptr)
4350 * @param val Get the values of sig_mot_detect in reg FUNC_CK_GATE.(ptr)
4351 * @retval Interface status (MANDATORY: return 0 -> no Error).
4352 *
4353 */
lsm303ah_xl_motion_data_ready_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4354 int32_t lsm303ah_xl_motion_data_ready_flag_get(const stmdev_ctx_t *ctx,
4355 uint8_t *val)
4356 {
4357 lsm303ah_func_ck_gate_a_t func_ck_gate_a;
4358 int32_t ret;
4359
4360 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CK_GATE_A,
4361 (uint8_t *)&func_ck_gate_a, 1);
4362 *val = func_ck_gate_a.sig_mot_detect;
4363
4364 return ret;
4365 }
4366
4367 /**
4368 * @brief Enable significant motion detection function.[set]
4369 *
4370 * @param ctx read / write interface definitions.(ptr)
4371 * @param val Change the values of sign_mot_on in reg FUNC_CTRL
4372 * @retval Interface status (MANDATORY: return 0 -> no Error).
4373 *
4374 */
lsm303ah_xl_motion_sens_set(const stmdev_ctx_t * ctx,uint8_t val)4375 int32_t lsm303ah_xl_motion_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
4376 {
4377 lsm303ah_func_ctrl_a_t func_ctrl_a;
4378 int32_t ret;
4379
4380 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4381 (uint8_t *)&func_ctrl_a, 1);
4382
4383 if (ret == 0)
4384 {
4385 func_ctrl_a.sign_mot_on = val;
4386 ret = lsm303ah_write_reg(ctx, LSM303AH_FUNC_CTRL_A,
4387 (uint8_t *)&func_ctrl_a, 1);
4388 }
4389
4390 return ret;
4391 }
4392
4393 /**
4394 * @brief Enable significant motion detection function.[get]
4395 *
4396 * @param ctx read / write interface definitions.(ptr)
4397 * @param val Get the values of sign_mot_on in reg FUNC_CTRL.(ptr)
4398 * @retval Interface status (MANDATORY: return 0 -> no Error).
4399 *
4400 */
lsm303ah_xl_motion_sens_get(const stmdev_ctx_t * ctx,uint8_t * val)4401 int32_t lsm303ah_xl_motion_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
4402 {
4403 lsm303ah_func_ctrl_a_t func_ctrl_a;
4404 int32_t ret;
4405
4406 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4407 (uint8_t *)&func_ctrl_a, 1);
4408 *val = func_ctrl_a.sign_mot_on;
4409
4410 return ret;
4411 }
4412
4413 /**
4414 * @brief These bits define the threshold value which corresponds to the
4415 * number of steps to be performed by the user upon a change of
4416 * location before the significant motion interrupt is generated.
4417 * It is expressed as an 8-bit unsigned value.
4418 * The default value of this field is equal to 6 (= 00000110b).[set]
4419 *
4420 * @param ctx read / write interface definitions.(ptr)
4421 * @param val Change the values of sm_ths in reg SM_THS
4422 * @retval Interface status (MANDATORY: return 0 -> no Error).
4423 *
4424 */
lsm303ah_xl_motion_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)4425 int32_t lsm303ah_xl_motion_threshold_set(const stmdev_ctx_t *ctx,
4426 uint8_t val)
4427 {
4428 lsm303ah_sm_ths_a_t sm_ths_a;
4429 int32_t ret;
4430
4431 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4432
4433 if (ret == 0)
4434 {
4435 ret = lsm303ah_read_reg(ctx, LSM303AH_SM_THS_A, (uint8_t *)&sm_ths_a, 1);
4436 }
4437
4438 if (ret == 0)
4439 {
4440 sm_ths_a.sm_ths = val;
4441 ret = lsm303ah_write_reg(ctx, LSM303AH_SM_THS_A, (uint8_t *)&sm_ths_a, 1);
4442 }
4443
4444 if (ret == 0)
4445 {
4446 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4447 }
4448
4449 return ret;
4450 }
4451
4452 /**
4453 * @brief These bits define the threshold value which corresponds to the
4454 * number of steps to be performed by the user upon a change of
4455 * location before the significant motion interrupt is generated.
4456 * It is expressed as an 8-bit unsigned value.
4457 * The default value of this field is equal to 6 (= 00000110b).[get]
4458 *
4459 * @param ctx read / write interface definitions.(ptr)
4460 * @param val Get the values of sm_ths in reg SM_THS
4461 * @retval Interface status (MANDATORY: return 0 -> no Error).
4462 *
4463 */
lsm303ah_xl_motion_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)4464 int32_t lsm303ah_xl_motion_threshold_get(const stmdev_ctx_t *ctx,
4465 uint8_t *val)
4466 {
4467 lsm303ah_sm_ths_a_t sm_ths_a;
4468 int32_t ret;
4469
4470 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_ADV_BANK);
4471
4472 if (ret == 0)
4473 {
4474 ret = lsm303ah_read_reg(ctx, LSM303AH_SM_THS_A, (uint8_t *)&sm_ths_a, 1);
4475 }
4476
4477 if (ret == 0)
4478 {
4479 *val = sm_ths_a.sm_ths;
4480 ret = lsm303ah_xl_mem_bank_set(ctx, LSM303AH_XL_USER_BANK);
4481 }
4482
4483 return ret;
4484 }
4485
4486 /**
4487 * @}
4488 *
4489 */
4490
4491 /**
4492 * @defgroup tilt_detection
4493 * @brief This section groups all the functions that manage the tilt
4494 * event detection.
4495 * @{
4496 *
4497 */
4498
4499 /**
4500 * @brief Tilt event detection status.[get]
4501 *
4502 * @param ctx read / write interface definitions.(ptr)
4503 * @param val Get the values of tilt_int in reg FUNC_CK_GATE
4504 * @retval Interface status (MANDATORY: return 0 -> no Error).
4505 *
4506 */
lsm303ah_xl_tilt_data_ready_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)4507 int32_t lsm303ah_xl_tilt_data_ready_flag_get(const stmdev_ctx_t *ctx,
4508 uint8_t *val)
4509 {
4510 lsm303ah_func_ck_gate_a_t func_ck_gate_a;
4511 int32_t ret;
4512
4513 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CK_GATE_A,
4514 (uint8_t *)&func_ck_gate_a, 1);
4515 *val = func_ck_gate_a.tilt_int;
4516
4517 return ret;
4518 }
4519
4520 /**
4521 * @brief Enable tilt calculation.[set]
4522 *
4523 * @param ctx read / write interface definitions.(ptr)
4524 * @param val Change the values of tilt_on in reg FUNC_CTRL
4525 * @retval Interface status (MANDATORY: return 0 -> no Error).
4526 *
4527 */
lsm303ah_xl_tilt_sens_set(const stmdev_ctx_t * ctx,uint8_t val)4528 int32_t lsm303ah_xl_tilt_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
4529 {
4530 lsm303ah_func_ctrl_a_t func_ctrl_a;
4531 int32_t ret;
4532
4533 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4534 (uint8_t *)&func_ctrl_a, 1);
4535
4536 if (ret == 0)
4537 {
4538 func_ctrl_a.tilt_on = val;
4539 ret = lsm303ah_write_reg(ctx, LSM303AH_FUNC_CTRL_A,
4540 (uint8_t *)&func_ctrl_a, 1);
4541 }
4542
4543 return ret;
4544 }
4545
4546 /**
4547 * @brief Enable tilt calculation.[get]
4548 *
4549 * @param ctx read / write interface definitions.(ptr)
4550 * @param val Get the values of tilt_on in reg FUNC_CTRL.(ptr)
4551 * @retval Interface status (MANDATORY: return 0 -> no Error).
4552 *
4553 */
lsm303ah_xl_tilt_sens_get(const stmdev_ctx_t * ctx,uint8_t * val)4554 int32_t lsm303ah_xl_tilt_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
4555 {
4556 lsm303ah_func_ctrl_a_t func_ctrl_a;
4557 int32_t ret;
4558
4559 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4560 (uint8_t *)&func_ctrl_a, 1);
4561 *val = func_ctrl_a.tilt_on;
4562
4563 return ret;
4564 }
4565
4566 /**
4567 * @}
4568 *
4569 */
4570
4571 /**
4572 * @defgroup module
4573 * @brief This section groups all the functions that manage
4574 * module calculation
4575 * @{
4576 *
4577 */
4578
4579 /**
4580 * @brief Module processing enable.[set]
4581 *
4582 * @param ctx read / write interface definitions.(ptr)
4583 * @param val Change the values of module_on in reg FUNC_CTRL
4584 * @retval Interface status (MANDATORY: return 0 -> no Error).
4585 *
4586 */
lsm303ah_xl_module_sens_set(const stmdev_ctx_t * ctx,uint8_t val)4587 int32_t lsm303ah_xl_module_sens_set(const stmdev_ctx_t *ctx, uint8_t val)
4588 {
4589 lsm303ah_func_ctrl_a_t func_ctrl_a;
4590 int32_t ret;
4591
4592 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4593 (uint8_t *)&func_ctrl_a, 1);
4594
4595 if (ret == 0)
4596 {
4597 func_ctrl_a.module_on = val;
4598 ret = lsm303ah_write_reg(ctx, LSM303AH_FUNC_CTRL_A,
4599 (uint8_t *)&func_ctrl_a, 1);
4600 }
4601
4602 return ret;
4603 }
4604
4605 /**
4606 * @brief Module processing enable.[get]
4607 *
4608 * @param ctx read / write interface definitions.(ptr)
4609 * @param val Get the values of module_on in reg FUNC_CTRL.(ptr)
4610 * @retval Interface status (MANDATORY: return 0 -> no Error).
4611 *
4612 */
lsm303ah_xl_module_sens_get(const stmdev_ctx_t * ctx,uint8_t * val)4613 int32_t lsm303ah_xl_module_sens_get(const stmdev_ctx_t *ctx, uint8_t *val)
4614 {
4615 lsm303ah_func_ctrl_a_t func_ctrl_a;
4616 int32_t ret;
4617
4618 ret = lsm303ah_read_reg(ctx, LSM303AH_FUNC_CTRL_A,
4619 (uint8_t *)&func_ctrl_a, 1);
4620 *val = func_ctrl_a.module_on;
4621
4622 return ret;
4623 }
4624
4625 /**
4626 * @}
4627 *
4628 */
4629
4630 /**
4631 * @}
4632 *
4633 */
4634
4635 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
4636
