1 /**
2 ******************************************************************************
3 * @file lps25hb_reg.c
4 * @author Sensors Software Solution Team
5 * @brief LPS25HB driver file
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2021 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #include "lps25hb_reg.h"
21
22 /**
23 * @defgroup LPS25HB
24 * @brief This file provides a set of functions needed to drive the
25 * ultra-compact piezoresistive absolute pressure sensor.
26 * @{
27 *
28 */
29
30 /**
31 * @defgroup LPS25HB_Interfaces_functions
32 * @brief This section provide a set of functions used to read and
33 * write a generic register of the device.
34 * @{
35 *
36 */
37
38 /**
39 * @brief Read generic device register
40 *
41 * @param ctx read / write interface definitions(ptr)
42 * @param reg register to read
43 * @param data pointer to buffer that store the data read(ptr)
44 * @param len number of consecutive register to read
45 * @retval interface status (MANDATORY: return 0 -> no Error)
46 *
47 */
lps25hb_read_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)48 int32_t __weak lps25hb_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
49 uint8_t *data,
50 uint16_t len)
51 {
52 int32_t ret;
53
54 if (ctx == NULL)
55 {
56 return -1;
57 }
58
59 ret = ctx->read_reg(ctx->handle, reg, data, len);
60
61 return ret;
62 }
63
64 /**
65 * @brief Write generic device register
66 *
67 * @param ctx read / write interface definitions(ptr)
68 * @param reg register to write
69 * @param data pointer to data to write in register reg(ptr)
70 * @param len number of consecutive register to write
71 * @retval interface status (MANDATORY: return 0 -> no Error)
72 *
73 */
lps25hb_write_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)74 int32_t __weak lps25hb_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
75 uint8_t *data,
76 uint16_t len)
77 {
78 int32_t ret;
79
80 if (ctx == NULL)
81 {
82 return -1;
83 }
84
85 ret = ctx->write_reg(ctx->handle, reg, data, len);
86
87 return ret;
88 }
89
90 /**
91 * @}
92 *
93 */
94
95 /**
96 * @defgroup LPS25HB_Sensitivity
97 * @brief These functions convert raw-data into engineering units.
98 * @{
99 *
100 */
101
lps25hb_from_lsb_to_hpa(uint32_t lsb)102 float_t lps25hb_from_lsb_to_hpa(uint32_t lsb)
103 {
104 return ((float_t)lsb / 4096.0f);
105 }
106
lps25hb_from_lsb_to_degc(int16_t lsb)107 float_t lps25hb_from_lsb_to_degc(int16_t lsb)
108 {
109 return ((float_t)lsb / 480.0f) + 42.5f ;
110 }
111
112 /**
113 * @}
114 *
115 */
116
117 /**
118 * @defgroup LPS25HB_data_generation_c
119 * @brief This section group all the functions concerning data generation
120 * @{
121 *
122 */
123
124 /**
125 * @brief The Reference pressure value is a 24-bit data expressed as 2’s
126 * complement. The value is used when AUTOZERO or AUTORIFP function
127 * is enabled.[set]
128 *
129 * @param ctx Read / write interface definitions.(ptr)
130 * @param buff Buffer that contains data to write
131 * @retval Interface status (MANDATORY: return 0 -> no Error).
132 *
133 */
lps25hb_pressure_ref_set(const stmdev_ctx_t * ctx,int32_t val)134 int32_t lps25hb_pressure_ref_set(const stmdev_ctx_t *ctx, int32_t val)
135 {
136 uint8_t buff[3];
137 int32_t ret;
138
139 buff[2] = (uint8_t)((uint32_t)val / 65536U);
140 buff[1] = (uint8_t)((uint32_t)val - (buff[2] * 65536U)) / 256U;
141 buff[0] = (uint8_t)((uint32_t)val - (buff[2] * 65536U) -
142 (buff[1] * 256U));
143 ret = lps25hb_read_reg(ctx, LPS25HB_REF_P_XL, buff, 3);
144
145 return ret;
146 }
147
148 /**
149 * @brief The Reference pressure value is a 24-bit data expressed as 2’s
150 * complement. The value is used when AUTOZERO or AUTORIFP function
151 * is enabled.[get]
152 *
153 * @param ctx Read / write interface definitions.(ptr)
154 * @param buff Buffer that stores data read.(ptr)
155 * @retval Interface status (MANDATORY: return 0 -> no Error).
156 *
157 */
lps25hb_pressure_ref_get(const stmdev_ctx_t * ctx,int32_t * val)158 int32_t lps25hb_pressure_ref_get(const stmdev_ctx_t *ctx, int32_t *val)
159 {
160 uint8_t buff[3];
161 int32_t ret;
162
163 ret = lps25hb_read_reg(ctx, LPS25HB_REF_P_XL, buff, 3);
164 *val = (int32_t)buff[2];
165 *val = (*val * 256) + (int32_t)buff[1];
166 *val = (*val * 256) + (int32_t)buff[0];
167
168 return ret;
169 }
170
171 /**
172 * @brief Pressure internal average configuration.[set]
173 *
174 * @param ctx Read / write interface definitions.(ptr)
175 * @param val Change the values of avgp in reg RES_CONF
176 * @retval Interface status (MANDATORY: return 0 -> no Error).
177 *
178 */
lps25hb_pressure_avg_set(const stmdev_ctx_t * ctx,lps25hb_avgp_t val)179 int32_t lps25hb_pressure_avg_set(const stmdev_ctx_t *ctx,
180 lps25hb_avgp_t val)
181 {
182 lps25hb_res_conf_t reg;
183 int32_t ret;
184
185 ret = lps25hb_read_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
186
187 if (ret == 0)
188 {
189 reg.avgp = (uint8_t)val;
190 ret = lps25hb_write_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
191 }
192
193 return ret;
194 }
195
196 /**
197 * @brief Pressure internal average configuration.[get]
198 *
199 * @param ctx Read / write interface definitions.(ptr)
200 * @param val Get the values of avgp in reg RES_CONF.(ptr)
201 * @retval Interface status (MANDATORY: return 0 -> no Error).
202 *
203 */
lps25hb_pressure_avg_get(const stmdev_ctx_t * ctx,lps25hb_avgp_t * val)204 int32_t lps25hb_pressure_avg_get(const stmdev_ctx_t *ctx,
205 lps25hb_avgp_t *val)
206 {
207 lps25hb_res_conf_t reg;
208 int32_t ret;
209
210 ret = lps25hb_read_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
211
212 switch (reg.avgp)
213 {
214 case LPS25HB_P_AVG_8:
215 *val = LPS25HB_P_AVG_8;
216 break;
217
218 case LPS25HB_P_AVG_16:
219 *val = LPS25HB_P_AVG_16;
220 break;
221
222 case LPS25HB_P_AVG_32:
223 *val = LPS25HB_P_AVG_32;
224 break;
225
226 case LPS25HB_P_AVG_64:
227 *val = LPS25HB_P_AVG_64;
228 break;
229
230 default:
231 *val = LPS25HB_P_AVG_8;
232 break;
233 }
234
235 return ret;
236 }
237
238 /**
239 * @brief Temperature internal average configuration.[set]
240 *
241 * @param ctx Read / write interface definitions.(ptr)
242 * @param val Change the values of avgt in reg RES_CONF
243 * @retval Interface status (MANDATORY: return 0 -> no Error).
244 *
245 */
lps25hb_temperature_avg_set(const stmdev_ctx_t * ctx,lps25hb_avgt_t val)246 int32_t lps25hb_temperature_avg_set(const stmdev_ctx_t *ctx,
247 lps25hb_avgt_t val)
248 {
249 lps25hb_res_conf_t reg;
250 int32_t ret;
251
252 ret = lps25hb_read_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
253
254 if (ret == 0)
255 {
256 reg.avgt = (uint8_t)val;
257 ret = lps25hb_write_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
258 }
259
260 return ret;
261 }
262
263 /**
264 * @brief Temperature internal average configuration.[get]
265 *
266 * @param ctx Read / write interface definitions.(ptr)
267 * @param val Get the values of avgt in reg RES_CONF.(ptr)
268 * @retval Interface status (MANDATORY: return 0 -> no Error).
269 *
270 */
lps25hb_temperature_avg_get(const stmdev_ctx_t * ctx,lps25hb_avgt_t * val)271 int32_t lps25hb_temperature_avg_get(const stmdev_ctx_t *ctx,
272 lps25hb_avgt_t *val)
273 {
274 lps25hb_res_conf_t reg;
275 int32_t ret;
276
277 ret = lps25hb_read_reg(ctx, LPS25HB_RES_CONF, (uint8_t *)®, 1);
278
279 switch (reg.avgt)
280 {
281 case LPS25HB_T_AVG_8:
282 *val = LPS25HB_T_AVG_8;
283 break;
284
285 case LPS25HB_T_AVG_16:
286 *val = LPS25HB_T_AVG_16;
287 break;
288
289 case LPS25HB_T_AVG_32:
290 *val = LPS25HB_T_AVG_32;
291 break;
292
293 case LPS25HB_T_AVG_64:
294 *val = LPS25HB_T_AVG_64;
295 break;
296
297 default:
298 *val = LPS25HB_T_AVG_8;
299 break;
300 }
301
302 return ret;
303 }
304
305 /**
306 * @brief Reset Autozero function. [set]
307 *
308 * @param ctx Read / write interface definitions.(ptr)
309 * @param val Change the values of reset_az in reg CTRL_REG1
310 * @retval Interface status (MANDATORY: return 0 -> no Error).
311 *
312 */
lps25hb_autozero_rst_set(const stmdev_ctx_t * ctx,uint8_t val)313 int32_t lps25hb_autozero_rst_set(const stmdev_ctx_t *ctx, uint8_t val)
314 {
315 lps25hb_ctrl_reg1_t reg;
316 int32_t ret;
317
318 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
319
320 if (ret == 0)
321 {
322 reg.reset_az = val;
323 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
324 }
325
326 return ret;
327 }
328
329 /**
330 * @brief Reset Autozero function.[get]
331 *
332 * @param ctx Read / write interface definitions.(ptr)
333 * @param val Get the values of reset_az in reg CTRL_REG1.(ptr)
334 * @retval Interface status (MANDATORY: return 0 -> no Error).
335 *
336 */
lps25hb_autozero_rst_get(const stmdev_ctx_t * ctx,uint8_t * val)337 int32_t lps25hb_autozero_rst_get(const stmdev_ctx_t *ctx, uint8_t *val)
338 {
339 lps25hb_ctrl_reg1_t reg;
340 int32_t ret;
341
342 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
343 *val = reg.reset_az;
344
345 return ret;
346 }
347
348 /**
349 * @brief Blockdataupdate.[set]
350 *
351 * @param ctx Read / write interface definitions.(ptr)
352 * @param val Change the values of bdu in reg CTRL_REG1
353 * @retval Interface status (MANDATORY: return 0 -> no Error).
354 *
355 */
lps25hb_block_data_update_set(const stmdev_ctx_t * ctx,uint8_t val)356 int32_t lps25hb_block_data_update_set(const stmdev_ctx_t *ctx, uint8_t val)
357 {
358 lps25hb_ctrl_reg1_t reg;
359 int32_t ret;
360
361 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
362
363 if (ret == 0)
364 {
365 reg.bdu = val;
366 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
367 }
368
369 return ret;
370 }
371
372 /**
373 * @brief Blockdataupdate. [get]
374 *
375 * @param ctx Read / write interface definitions.(ptr)
376 * @param val Get the values of bdu in reg CTRL_REG1.(ptr)
377 * @retval Interface status (MANDATORY: return 0 -> no Error).
378 *
379 */
lps25hb_block_data_update_get(const stmdev_ctx_t * ctx,uint8_t * val)380 int32_t lps25hb_block_data_update_get(const stmdev_ctx_t *ctx, uint8_t *val)
381 {
382 lps25hb_ctrl_reg1_t reg;
383 int32_t ret;
384
385 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
386 *val = reg.bdu;
387
388 return ret;
389 }
390
391 /**
392 * @brief Output data rate selection.[set]
393 *
394 * @param ctx Read / write interface definitions.(ptr)
395 * @param val Change the values of odr in reg CTRL_REG1
396 * @retval Interface status (MANDATORY: return 0 -> no Error).
397 *
398 */
lps25hb_data_rate_set(const stmdev_ctx_t * ctx,lps25hb_odr_t val)399 int32_t lps25hb_data_rate_set(const stmdev_ctx_t *ctx, lps25hb_odr_t val)
400 {
401 lps25hb_ctrl_reg1_t reg;
402 int32_t ret;
403
404 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
405
406 if (ret == 0)
407 {
408 reg.odr = (uint8_t)val;
409 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
410 }
411
412 return ret;
413 }
414
415 /**
416 * @brief Output data rate selection.[get]
417 *
418 * @param ctx Read / write interface definitions.(ptr)
419 * @param val Get the values of odr in reg CTRL_REG1.(ptr)
420 * @retval Interface status (MANDATORY: return 0 -> no Error).
421 *
422 */
lps25hb_data_rate_get(const stmdev_ctx_t * ctx,lps25hb_odr_t * val)423 int32_t lps25hb_data_rate_get(const stmdev_ctx_t *ctx, lps25hb_odr_t *val)
424 {
425 lps25hb_ctrl_reg1_t reg;
426 int32_t ret;
427
428 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
429
430 switch (reg.odr)
431 {
432 case LPS25HB_POWER_DOWN:
433 *val = LPS25HB_POWER_DOWN;
434 break;
435
436 case LPS25HB_ODR_1Hz:
437 *val = LPS25HB_ODR_1Hz;
438 break;
439
440 case LPS25HB_ODR_7Hz:
441 *val = LPS25HB_ODR_7Hz;
442 break;
443
444 case LPS25HB_ODR_12Hz5:
445 *val = LPS25HB_ODR_12Hz5;
446 break;
447
448 case LPS25HB_ODR_25Hz:
449 *val = LPS25HB_ODR_25Hz;
450 break;
451
452 case LPS25HB_ONE_SHOT:
453 *val = LPS25HB_ONE_SHOT;
454 break;
455
456 default:
457 *val = LPS25HB_POWER_DOWN;
458 break;
459 }
460
461 return ret;
462 }
463
464 /**
465 * @brief One-shot mode. Device perform a single measure.[set]
466 *
467 * @param ctx Read / write interface definitions.(ptr)
468 * @param val Change the values of one_shot in reg CTRL_REG2
469 * @retval Interface status (MANDATORY: return 0 -> no Error).
470 *
471 */
lps25hb_one_shoot_trigger_set(const stmdev_ctx_t * ctx,uint8_t val)472 int32_t lps25hb_one_shoot_trigger_set(const stmdev_ctx_t *ctx, uint8_t val)
473 {
474 lps25hb_ctrl_reg2_t reg;
475 int32_t ret;
476
477 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
478
479 if (ret == 0)
480 {
481 reg.one_shot = val;
482 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
483 }
484
485 return ret;
486 }
487
488 /**
489 * @brief One-shot mode. Device perform a single measure.[get]
490 *
491 * @param ctx Read / write interface definitions.(ptr)
492 * @param val Get the values of one_shot in reg CTRL_REG2.(ptr)
493 * @retval Interface status (MANDATORY: return 0 -> no Error).
494 *
495 */
lps25hb_one_shoot_trigger_get(const stmdev_ctx_t * ctx,uint8_t * val)496 int32_t lps25hb_one_shoot_trigger_get(const stmdev_ctx_t *ctx, uint8_t *val)
497 {
498 lps25hb_ctrl_reg2_t reg;
499 int32_t ret;
500
501 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
502 *val = reg.one_shot;
503
504 return ret;
505 }
506
507 /**
508 * @brief Enable Autozero function.[set]
509 *
510 * @param ctx Read / write interface definitions.(ptr)
511 * @param val Change the values of autozero in reg CTRL_REG2
512 * @retval Interface status (MANDATORY: return 0 -> no Error).
513 *
514 */
lps25hb_autozero_set(const stmdev_ctx_t * ctx,uint8_t val)515 int32_t lps25hb_autozero_set(const stmdev_ctx_t *ctx, uint8_t val)
516 {
517 lps25hb_ctrl_reg2_t reg;
518 int32_t ret;
519
520 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
521
522 if (ret == 0)
523 {
524 reg.autozero = val;
525 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
526 }
527
528 return ret;
529 }
530
531 /**
532 * @brief Enable Autozero function.[get]
533 *
534 * @param ctx Read / write interface definitions.(ptr)
535 * @param val Get the values of autozero in reg CTRL_REG2.(ptr)
536 * @retval Interface status (MANDATORY: return 0 -> no Error).
537 *
538 */
lps25hb_autozero_get(const stmdev_ctx_t * ctx,uint8_t * val)539 int32_t lps25hb_autozero_get(const stmdev_ctx_t *ctx, uint8_t *val)
540 {
541 lps25hb_ctrl_reg2_t reg;
542 int32_t ret;
543
544 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
545 *val = reg.autozero;
546
547 return ret;
548 }
549
550 /**
551 * @brief Enable to decimate the output pressure to 1Hz
552 * with FIFO Mean mode.[set]
553 *
554 * @param ctx Read / write interface definitions.(ptr)
555 * @param val Change the values of fifo_mean_dec in reg CTRL_REG2
556 * @retval Interface status (MANDATORY: return 0 -> no Error).
557 *
558 */
lps25hb_fifo_mean_decimator_set(const stmdev_ctx_t * ctx,uint8_t val)559 int32_t lps25hb_fifo_mean_decimator_set(const stmdev_ctx_t *ctx,
560 uint8_t val)
561 {
562 lps25hb_ctrl_reg2_t reg;
563 int32_t ret;
564
565 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
566
567 if (ret == 0)
568 {
569 reg.fifo_mean_dec = val;
570 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
571 }
572
573 return ret;
574 }
575
576 /**
577 * @brief Enable to decimate the output pressure to 1Hz
578 * with FIFO Mean mode.[get]
579 *
580 * @param ctx Read / write interface definitions.(ptr)
581 * @param val Get the values of fifo_mean_dec in reg CTRL_REG2
582 * @retval Interface status (MANDATORY: return 0 -> no Error).
583 *
584 */
lps25hb_fifo_mean_decimator_get(const stmdev_ctx_t * ctx,uint8_t * val)585 int32_t lps25hb_fifo_mean_decimator_get(const stmdev_ctx_t *ctx,
586 uint8_t *val)
587 {
588 lps25hb_ctrl_reg2_t reg;
589 int32_t ret;
590
591 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
592 *val = reg.fifo_mean_dec;
593
594 return ret;
595 }
596
597 /**
598 * @brief Pressure data available.[get]
599 *
600 * @param ctx Read / write interface definitions.(ptr)
601 * @param val Get the values of p_da in reg STATUS_REG.(ptr)
602 * @retval Interface status (MANDATORY: return 0 -> no Error).
603 *
604 */
lps25hb_press_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)605 int32_t lps25hb_press_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
606 {
607 lps25hb_status_reg_t reg;
608 int32_t ret;
609
610 ret = lps25hb_read_reg(ctx, LPS25HB_STATUS_REG, (uint8_t *)®, 1);
611 *val = reg.p_da;
612
613 return ret;
614 }
615
616 /**
617 * @brief Temperature data available.[get]
618 *
619 * @param ctx Read / write interface definitions.(ptr)
620 * @param val Get the values of t_da in reg STATUS_REG.(ptr)
621 * @retval Interface status (MANDATORY: return 0 -> no Error).
622 *
623 */
lps25hb_temp_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)624 int32_t lps25hb_temp_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
625 {
626 lps25hb_status_reg_t reg;
627 int32_t ret;
628
629 ret = lps25hb_read_reg(ctx, LPS25HB_STATUS_REG, (uint8_t *)®, 1);
630 *val = reg.t_da;
631
632 return ret;
633 }
634
635 /**
636 * @brief Temperature data overrun.[get]
637 *
638 * @param ctx Read / write interface definitions.(ptr)
639 * @param val Get the values of t_or in reg STATUS_REG.(ptr)
640 * @retval Interface status (MANDATORY: return 0 -> no Error).
641 *
642 */
lps25hb_temp_data_ovr_get(const stmdev_ctx_t * ctx,uint8_t * val)643 int32_t lps25hb_temp_data_ovr_get(const stmdev_ctx_t *ctx, uint8_t *val)
644 {
645 lps25hb_status_reg_t reg;
646 int32_t ret;
647
648 ret = lps25hb_read_reg(ctx, LPS25HB_STATUS_REG, (uint8_t *)®, 1);
649 *val = reg.t_or;
650
651 return ret;
652 }
653
654 /**
655 * @brief Pressure data overrun.[get]
656 *
657 * @param ctx Read / write interface definitions.(ptr)
658 * @param val Get the values of p_or in reg STATUS_REG.(ptr)
659 * @retval Interface status (MANDATORY: return 0 -> no Error).
660 *
661 */
lps25hb_press_data_ovr_get(const stmdev_ctx_t * ctx,uint8_t * val)662 int32_t lps25hb_press_data_ovr_get(const stmdev_ctx_t *ctx, uint8_t *val)
663 {
664 lps25hb_status_reg_t reg;
665 int32_t ret;
666
667 ret = lps25hb_read_reg(ctx, LPS25HB_STATUS_REG, (uint8_t *)®, 1);
668 *val = reg.p_or;
669
670 return ret;
671 }
672
673 /**
674 * @brief Pressure output value.[get]
675 *
676 * @param ctx Read / write interface definitions.(ptr)
677 * @param buff Buffer that stores data read.(ptr)
678 * @retval Interface status (MANDATORY: return 0 -> no Error).
679 *
680 */
lps25hb_pressure_raw_get(const stmdev_ctx_t * ctx,uint32_t * buff)681 int32_t lps25hb_pressure_raw_get(const stmdev_ctx_t *ctx, uint32_t *buff)
682 {
683 uint8_t reg[3];
684 int32_t ret;
685
686 ret = lps25hb_read_reg(ctx, LPS25HB_PRESS_OUT_XL, reg, 3);
687 *buff = reg[2];
688 *buff = (*buff * 256) + reg[1];
689 *buff = (*buff * 256) + reg[0];
690 *buff *= 256;
691
692 return ret;
693 }
694
695 /**
696 * @brief Temperature output value.[get]
697 *
698 * @param ctx Read / write interface definitions.(ptr)
699 * @param buff Buffer that stores data read.(ptr)
700 * @retval Interface status (MANDATORY: return 0 -> no Error).
701 *
702 */
lps25hb_temperature_raw_get(const stmdev_ctx_t * ctx,int16_t * buff)703 int32_t lps25hb_temperature_raw_get(const stmdev_ctx_t *ctx, int16_t *buff)
704 {
705 uint8_t reg[2];
706 int32_t ret;
707
708 ret = lps25hb_read_reg(ctx, LPS25HB_TEMP_OUT_L, reg, 2);
709 *buff = reg[1];
710 *buff = (*buff * 256) + reg[0];
711
712 return ret;
713 }
714
715 /**
716 * @brief The pressure offset value is 16-bit data that can be used to
717 * implement one-point calibration (OPC) after soldering.[set]
718 *
719 * @param ctx Read / write interface definitions.(ptr)
720 * @param buff Buffer that contains data to write
721 * @retval Interface status (MANDATORY: return 0 -> no Error).
722 *
723 */
lps25hb_pressure_offset_set(const stmdev_ctx_t * ctx,int16_t val)724 int32_t lps25hb_pressure_offset_set(const stmdev_ctx_t *ctx, int16_t val)
725 {
726 uint8_t buff[2];
727 int32_t ret;
728
729 buff[1] = (uint8_t)((uint16_t)val / 256U);
730 buff[0] = (uint8_t)((uint16_t)val - (buff[1] * 256U));
731 ret = lps25hb_read_reg(ctx, LPS25HB_RPDS_L, buff, 2);
732
733 return ret;
734 }
735
736 /**
737 * @brief The pressure offset value is 16-bit data that can be used to
738 * implement one-point calibration (OPC) after soldering.[get]
739 *
740 * @param ctx Read / write interface definitions.(ptr)
741 * @param buff Buffer that stores data read.(ptr)
742 * @retval Interface status (MANDATORY: return 0 -> no Error).
743 *
744 */
lps25hb_pressure_offset_get(const stmdev_ctx_t * ctx,int16_t * val)745 int32_t lps25hb_pressure_offset_get(const stmdev_ctx_t *ctx, int16_t *val)
746 {
747 uint8_t buff[2];
748 int32_t ret;
749
750 ret = lps25hb_read_reg(ctx, LPS25HB_RPDS_L, buff, 2);
751 *val = (int16_t)buff[1];
752 *val = (*val * 256) + (int16_t)buff[0];
753
754 return ret;
755 }
756
757 /**
758 * @}
759 *
760 */
761
762 /**
763 * @defgroup LPS25HB_common
764 * @brief This section group common useful functions
765 * @{
766 *
767 */
768
769 /**
770 * @brief DeviceWhoamI.[get]
771 *
772 * @param ctx Read / write interface definitions.(ptr)
773 * @param buff Buffer that stores data read.(ptr)
774 * @retval Interface status (MANDATORY: return 0 -> no Error).
775 *
776 */
lps25hb_device_id_get(const stmdev_ctx_t * ctx,uint8_t * buff)777 int32_t lps25hb_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
778 {
779 int32_t ret;
780
781 ret = lps25hb_read_reg(ctx, LPS25HB_WHO_AM_I, buff, 1);
782
783 return ret;
784 }
785
786 /**
787 * @brief Software reset. Restore the default values in user registers[set]
788 *
789 * @param ctx Read / write interface definitions.(ptr)
790 * @param val Change the values of swreset in reg CTRL_REG2
791 * @retval Interface status (MANDATORY: return 0 -> no Error).
792 *
793 */
lps25hb_reset_set(const stmdev_ctx_t * ctx,uint8_t val)794 int32_t lps25hb_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
795 {
796 lps25hb_ctrl_reg2_t reg;
797 int32_t ret;
798
799 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
800
801 if (ret == 0)
802 {
803 reg.swreset = val;
804 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
805 }
806
807 return ret;
808 }
809
810 /**
811 * @brief Software reset. Restore the default values in user registers[get]
812 *
813 * @param ctx Read / write interface definitions.(ptr)
814 * @param val Get the values of swreset in reg CTRL_REG2.(ptr)
815 * @retval Interface status (MANDATORY: return 0 -> no Error).
816 *
817 */
lps25hb_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)818 int32_t lps25hb_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
819 {
820 lps25hb_ctrl_reg2_t reg;
821 int32_t ret;
822
823 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
824 *val = reg.swreset;
825
826 return ret;
827 }
828
829 /**
830 * @brief Reboot memory content. Reload the calibration parameters[set]
831 *
832 * @param ctx Read / write interface definitions.(ptr)
833 * @param val Change the values of boot in reg CTRL_REG2
834 * @retval Interface status (MANDATORY: return 0 -> no Error).
835 *
836 */
lps25hb_boot_set(const stmdev_ctx_t * ctx,uint8_t val)837 int32_t lps25hb_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
838 {
839 lps25hb_ctrl_reg2_t reg;
840 int32_t ret;
841
842 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
843
844 if (ret == 0)
845 {
846 reg.boot = val;
847 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
848 }
849
850 return ret;
851 }
852
853 /**
854 * @brief Reboot memory content. Reload the calibration parameters[get]
855 *
856 * @param ctx Read / write interface definitions.(ptr)
857 * @param val Get the values of boot in reg CTRL_REG2.(ptr)
858 * @retval Interface status (MANDATORY: return 0 -> no Error).
859 *
860 */
lps25hb_boot_get(const stmdev_ctx_t * ctx,uint8_t * val)861 int32_t lps25hb_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
862 {
863 lps25hb_ctrl_reg2_t reg;
864 int32_t ret;
865
866 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
867 *val = reg.boot;
868
869 return ret;
870 }
871
872 /**
873 * @brief Status: [get]
874 *
875 * @param ctx Read / write interface definitions.(ptr)
876 * @param val Get registers STATUS_REG.(ptr)
877 * @retval Interface status (MANDATORY: return 0 -> no Error).
878 *
879 */
lps25hb_status_get(const stmdev_ctx_t * ctx,lps25hb_status_reg_t * val)880 int32_t lps25hb_status_get(const stmdev_ctx_t *ctx,
881 lps25hb_status_reg_t *val)
882 {
883 int32_t ret;
884
885 ret = lps25hb_read_reg(ctx, LPS25HB_STATUS_REG, (uint8_t *) val, 1);
886
887 return ret;
888 }
889
890 /**
891 * @}
892 *
893 */
894
895 /**
896 * @defgroup LPS25HB_interrupts
897 * @brief This section group all the functions that manage interrupts
898 * @{
899 *
900 */
901
902 /**
903 * @brief Enable interrupt generation.[set]
904 *
905 * @param ctx Read / write interface definitions.(ptr)
906 * @param val Change the values of diff_en in reg CTRL_REG1
907 * @retval Interface status (MANDATORY: return 0 -> no Error).
908 *
909 */
lps25hb_int_generation_set(const stmdev_ctx_t * ctx,uint8_t val)910 int32_t lps25hb_int_generation_set(const stmdev_ctx_t *ctx, uint8_t val)
911 {
912 lps25hb_ctrl_reg1_t reg;
913 int32_t ret;
914
915 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
916
917 if (ret == 0)
918 {
919 reg.diff_en = val;
920 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
921 }
922
923 return ret;
924 }
925
926 /**
927 * @brief Enable interrupt generation.[get]
928 *
929 * @param ctx Read / write interface definitions.(ptr)
930 * @param val Get the values of diff_en in reg CTRL_REG1.(ptr)
931 * @retval Interface status (MANDATORY: return 0 -> no Error).
932 *
933 */
lps25hb_int_generation_get(const stmdev_ctx_t * ctx,uint8_t * val)934 int32_t lps25hb_int_generation_get(const stmdev_ctx_t *ctx, uint8_t *val)
935 {
936 lps25hb_ctrl_reg1_t reg;
937 int32_t ret;
938
939 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
940 *val = reg.diff_en;
941
942 return ret;
943 }
944
945 /**
946 * @brief Data signal on INT_DRDY pin control bits.[set]
947 *
948 * @param ctx Read / write interface definitions.(ptr)
949 * @param val Change the values of int_s in reg CTRL_REG3
950 * @retval Interface status (MANDATORY: return 0 -> no Error).
951 *
952 */
lps25hb_int_pin_mode_set(const stmdev_ctx_t * ctx,lps25hb_int_s_t val)953 int32_t lps25hb_int_pin_mode_set(const stmdev_ctx_t *ctx,
954 lps25hb_int_s_t val)
955 {
956 lps25hb_ctrl_reg3_t reg;
957 int32_t ret;
958
959 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
960
961 if (ret == 0)
962 {
963 reg.int_s = (uint8_t)val;
964 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
965 }
966
967 return ret;
968 }
969
970 /**
971 * @brief Data signal on INT_DRDY pin control bits.[get]
972 *
973 * @param ctx Read / write interface definitions.(ptr)
974 * @param val Get the values of int_s in reg CTRL_REG3.(ptr)
975 * @retval Interface status (MANDATORY: return 0 -> no Error).
976 *
977 */
lps25hb_int_pin_mode_get(const stmdev_ctx_t * ctx,lps25hb_int_s_t * val)978 int32_t lps25hb_int_pin_mode_get(const stmdev_ctx_t *ctx,
979 lps25hb_int_s_t *val)
980 {
981 lps25hb_ctrl_reg3_t reg;
982 int32_t ret;
983
984 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
985
986 switch (reg.int_s)
987 {
988 case LPS25HB_DRDY_OR_FIFO_FLAGS:
989 *val = LPS25HB_DRDY_OR_FIFO_FLAGS;
990 break;
991
992 case LPS25HB_HIGH_PRES_INT:
993 *val = LPS25HB_HIGH_PRES_INT;
994 break;
995
996 case LPS25HB_LOW_PRES_INT:
997 *val = LPS25HB_LOW_PRES_INT;
998 break;
999
1000 case LPS25HB_EVERY_PRES_INT:
1001 *val = LPS25HB_EVERY_PRES_INT;
1002 break;
1003
1004 default:
1005 *val = LPS25HB_DRDY_OR_FIFO_FLAGS;
1006 break;
1007 }
1008
1009 return ret;
1010 }
1011
1012 /**
1013 * @brief Push-pull/open drain selection on interrupt pads.[set]
1014 *
1015 * @param ctx Read / write interface definitions.(ptr)
1016 * @param val Change the values of pp_od in reg CTRL_REG3
1017 * @retval Interface status (MANDATORY: return 0 -> no Error).
1018 *
1019 */
lps25hb_pin_mode_set(const stmdev_ctx_t * ctx,lps25hb_pp_od_t val)1020 int32_t lps25hb_pin_mode_set(const stmdev_ctx_t *ctx, lps25hb_pp_od_t val)
1021 {
1022 lps25hb_ctrl_reg3_t reg;
1023 int32_t ret;
1024
1025 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1026
1027 if (ret == 0)
1028 {
1029 reg.pp_od = (uint8_t)val;
1030 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1031 }
1032
1033 return ret;
1034 }
1035
1036 /**
1037 * @brief Push-pull/open drain selection on interrupt pads.[get]
1038 *
1039 * @param ctx Read / write interface definitions.(ptr)
1040 * @param val Get the values of pp_od in reg CTRL_REG3.(ptr)
1041 * @retval Interface status (MANDATORY: return 0 -> no Error).
1042 *
1043 */
lps25hb_pin_mode_get(const stmdev_ctx_t * ctx,lps25hb_pp_od_t * val)1044 int32_t lps25hb_pin_mode_get(const stmdev_ctx_t *ctx, lps25hb_pp_od_t *val)
1045 {
1046 lps25hb_ctrl_reg3_t reg;
1047 int32_t ret;
1048
1049 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1050
1051 switch (reg.pp_od)
1052 {
1053 case LPS25HB_PUSH_PULL:
1054 *val = LPS25HB_PUSH_PULL;
1055 break;
1056
1057 case LPS25HB_OPEN_DRAIN:
1058 *val = LPS25HB_OPEN_DRAIN;
1059 break;
1060
1061 default:
1062 *val = LPS25HB_PUSH_PULL;
1063 break;
1064 }
1065
1066 return ret;
1067 }
1068
1069 /**
1070 * @brief Interrupt active-high/low.[set]
1071 *
1072 * @param ctx Read / write interface definitions.(ptr)
1073 * @param val Change the values of int_h_l in reg CTRL_REG3
1074 * @retval Interface status (MANDATORY: return 0 -> no Error).
1075 *
1076 */
lps25hb_int_polarity_set(const stmdev_ctx_t * ctx,lps25hb_int_h_l_t val)1077 int32_t lps25hb_int_polarity_set(const stmdev_ctx_t *ctx,
1078 lps25hb_int_h_l_t val)
1079 {
1080 lps25hb_ctrl_reg3_t reg;
1081 int32_t ret;
1082
1083 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1084
1085 if (ret == 0)
1086 {
1087 reg.int_h_l = (uint8_t)val;
1088 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1089 }
1090
1091 return ret;
1092 }
1093
1094 /**
1095 * @brief Interrupt active-high/low.[get]
1096 *
1097 * @param ctx Read / write interface definitions.(ptr)
1098 * @param val Get the values of int_h_l in reg CTRL_REG3.(ptr)
1099 * @retval Interface status (MANDATORY: return 0 -> no Error).
1100 *
1101 */
lps25hb_int_polarity_get(const stmdev_ctx_t * ctx,lps25hb_int_h_l_t * val)1102 int32_t lps25hb_int_polarity_get(const stmdev_ctx_t *ctx,
1103 lps25hb_int_h_l_t *val)
1104 {
1105 lps25hb_ctrl_reg3_t reg;
1106 int32_t ret;
1107
1108 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG3, (uint8_t *)®, 1);
1109
1110 switch (reg.int_h_l)
1111 {
1112 case LPS25HB_ACTIVE_HIGH:
1113 *val = LPS25HB_ACTIVE_HIGH;
1114 break;
1115
1116 case LPS25HB_ACTIVE_LOW:
1117 *val = LPS25HB_ACTIVE_LOW;
1118 break;
1119
1120 default:
1121 *val = LPS25HB_ACTIVE_HIGH;
1122 break;
1123 }
1124
1125 return ret;
1126 }
1127
1128 /**
1129 * @brief Data-ready signal on INT_DRDY pin.[set]
1130 *
1131 * @param ctx Read / write interface definitions.(ptr)
1132 * @param val Change the values of drdy in reg CTRL_REG4
1133 * @retval Interface status (MANDATORY: return 0 -> no Error).
1134 *
1135 */
lps25hb_drdy_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1136 int32_t lps25hb_drdy_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1137 {
1138 lps25hb_ctrl_reg4_t reg;
1139 int32_t ret;
1140
1141 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1142
1143 if (ret == 0)
1144 {
1145 reg.drdy = val;
1146 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1147 }
1148
1149 return ret;
1150 }
1151
1152 /**
1153 * @brief Data-ready signal on INT_DRDY pin.[get]
1154 *
1155 * @param ctx Read / write interface definitions.(ptr)
1156 * @param val Get the values of drdy in reg CTRL_REG4.(ptr)
1157 * @retval Interface status (MANDATORY: return 0 -> no Error).
1158 *
1159 */
lps25hb_drdy_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1160 int32_t lps25hb_drdy_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1161 {
1162 lps25hb_ctrl_reg4_t reg;
1163 int32_t ret;
1164
1165 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1166 *val = reg.drdy;
1167
1168 return ret;
1169 }
1170
1171 /**
1172 * @brief FIFO overrun interrupt on INT_DRDY pin.[set]
1173 *
1174 * @param ctx Read / write interface definitions.(ptr)
1175 * @param val Change the values of f_ovr in reg CTRL_REG4
1176 * @retval Interface status (MANDATORY: return 0 -> no Error).
1177 *
1178 */
lps25hb_fifo_ovr_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1179 int32_t lps25hb_fifo_ovr_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1180 {
1181 lps25hb_ctrl_reg4_t reg;
1182 int32_t ret;
1183
1184 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1185
1186 if (ret == 0)
1187 {
1188 reg.f_ovr = val;
1189 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1190 }
1191
1192 return ret;
1193 }
1194
1195 /**
1196 * @brief FIFO overrun interrupt on INT_DRDY pin.[get]
1197 *
1198 * @param ctx Read / write interface definitions.(ptr)
1199 * @param val Get the values of f_ovr in reg CTRL_REG4.(ptr)
1200 * @retval Interface status (MANDATORY: return 0 -> no Error).
1201 *
1202 */
lps25hb_fifo_ovr_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1203 int32_t lps25hb_fifo_ovr_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1204 {
1205 lps25hb_ctrl_reg4_t reg;
1206 int32_t ret;
1207
1208 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1209 *val = reg.f_ovr;
1210
1211 return ret;
1212 }
1213
1214 /**
1215 * @brief FIFO watermark status on INT_DRDY pin.[set]
1216 *
1217 * @param ctx Read / write interface definitions.(ptr)
1218 * @param val Change the values of f_fth in reg CTRL_REG4
1219 * @retval Interface status (MANDATORY: return 0 -> no Error).
1220 *
1221 */
lps25hb_fifo_threshold_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1222 int32_t lps25hb_fifo_threshold_on_int_set(const stmdev_ctx_t *ctx,
1223 uint8_t val)
1224 {
1225 lps25hb_ctrl_reg4_t reg;
1226 int32_t ret;
1227
1228 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1229
1230 if (ret == 0)
1231 {
1232 reg.f_fth = val;
1233 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1234 }
1235
1236 return ret;
1237 }
1238
1239 /**
1240 * @brief FIFO watermark status on INT_DRDY pin.[get]
1241 *
1242 * @param ctx Read / write interface definitions.(ptr)
1243 * @param val Get the values of f_fth in reg CTRL_REG4.(ptr)
1244 * @retval Interface status (MANDATORY: return 0 -> no Error).
1245 *
1246 */
lps25hb_fifo_threshold_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1247 int32_t lps25hb_fifo_threshold_on_int_get(const stmdev_ctx_t *ctx,
1248 uint8_t *val)
1249 {
1250 lps25hb_ctrl_reg4_t reg;
1251 int32_t ret;
1252
1253 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1254 *val = reg.f_fth;
1255
1256 return ret;
1257 }
1258
1259 /**
1260 * @brief FIFO empty flag on INT_DRDY pin.[set]
1261 *
1262 * @param ctx Read / write interface definitions.(ptr)
1263 * @param val Change the values of f_empty in reg CTRL_REG4
1264 * @retval Interface status (MANDATORY: return 0 -> no Error).
1265 *
1266 */
lps25hb_fifo_empty_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1267 int32_t lps25hb_fifo_empty_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1268 {
1269 lps25hb_ctrl_reg4_t reg;
1270 int32_t ret;
1271
1272 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1273
1274 if (ret == 0)
1275 {
1276 reg.f_empty = val;
1277 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1278 }
1279
1280 return ret;
1281 }
1282
1283 /**
1284 * @brief FIFO empty flag on INT_DRDY pin.[get]
1285 *
1286 * @param ctx Read / write interface definitions.(ptr)
1287 * @param val Change the values of f_empty in reg CTRL_REG4.(ptr)
1288 * @retval Interface status (MANDATORY: return 0 -> no Error).
1289 *
1290 */
lps25hb_fifo_empty_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1291 int32_t lps25hb_fifo_empty_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1292 {
1293 lps25hb_ctrl_reg4_t reg;
1294 int32_t ret;
1295
1296 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG4, (uint8_t *)®, 1);
1297 *val = reg.f_empty;
1298
1299 return ret;
1300 }
1301
1302 /**
1303 * @brief Enable interrupt generation on pressure low/high event.[set]
1304 *
1305 * @param ctx Read / write interface definitions.(ptr)
1306 * @param val Change the values of pe in reg INTERRUPT_CFG
1307 * @retval Interface status (MANDATORY: return 0 -> no Error).
1308 *
1309 */
lps25hb_sign_of_int_threshold_set(const stmdev_ctx_t * ctx,lps25hb_pe_t val)1310 int32_t lps25hb_sign_of_int_threshold_set(const stmdev_ctx_t *ctx,
1311 lps25hb_pe_t val)
1312 {
1313 lps25hb_interrupt_cfg_t reg;
1314 int32_t ret;
1315
1316 ret = lps25hb_read_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1317
1318 if (ret == 0)
1319 {
1320 reg.pe = (uint8_t)val;
1321 ret = lps25hb_write_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1322 }
1323
1324 return ret;
1325 }
1326
1327 /**
1328 * @brief Enable interrupt generation on pressure low/high event.[get]
1329 *
1330 * @param ctx Read / write interface definitions.(ptr)
1331 * @param val Get the values of pe in reg INTERRUPT_CFG.(ptr)
1332 * @retval Interface status (MANDATORY: return 0 -> no Error).
1333 *
1334 */
lps25hb_sign_of_int_threshold_get(const stmdev_ctx_t * ctx,lps25hb_pe_t * val)1335 int32_t lps25hb_sign_of_int_threshold_get(const stmdev_ctx_t *ctx,
1336 lps25hb_pe_t *val)
1337 {
1338 lps25hb_interrupt_cfg_t reg;
1339 int32_t ret;
1340
1341 ret = lps25hb_read_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1342
1343 switch (reg.pe)
1344 {
1345 case LPS25HB_NO_THRESHOLD:
1346 *val = LPS25HB_NO_THRESHOLD;
1347 break;
1348
1349 case LPS25HB_POSITIVE:
1350 *val = LPS25HB_POSITIVE;
1351 break;
1352
1353 case LPS25HB_NEGATIVE:
1354 *val = LPS25HB_NEGATIVE;
1355 break;
1356
1357 case LPS25HB_BOTH:
1358 *val = LPS25HB_BOTH;
1359 break;
1360
1361 default:
1362 *val = LPS25HB_NO_THRESHOLD;
1363 break;
1364 }
1365
1366 return ret;
1367 }
1368
1369 /**
1370 * @brief Interrupt request to the INT_SOURCE (25h) register mode.[set]
1371 *
1372 * @param ctx Read / write interface definitions.(ptr)
1373 * @param val Change the values of lir in reg INTERRUPT_CFG
1374 * @retval Interface status (MANDATORY: return 0 -> no Error).
1375 *
1376 */
lps25hb_int_notification_mode_set(const stmdev_ctx_t * ctx,lps25hb_lir_t val)1377 int32_t lps25hb_int_notification_mode_set(const stmdev_ctx_t *ctx,
1378 lps25hb_lir_t val)
1379 {
1380 lps25hb_interrupt_cfg_t reg;
1381 int32_t ret;
1382
1383 ret = lps25hb_read_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1384
1385 if (ret == 0)
1386 {
1387 reg.lir = (uint8_t)val;
1388 ret = lps25hb_write_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1389 }
1390
1391 return ret;
1392 }
1393
1394 /**
1395 * @brief Interrupt request to the INT_SOURCE (25h) register mode.[get]
1396 *
1397 * @param ctx Read / write interface definitions.(ptr)
1398 * @param val Get the values of lir in reg INTERRUPT_CFG.(ptr)
1399 * @retval Interface status (MANDATORY: return 0 -> no Error).
1400 *
1401 */
lps25hb_int_notification_mode_get(const stmdev_ctx_t * ctx,lps25hb_lir_t * val)1402 int32_t lps25hb_int_notification_mode_get(const stmdev_ctx_t *ctx,
1403 lps25hb_lir_t *val)
1404 {
1405 lps25hb_interrupt_cfg_t reg;
1406 int32_t ret;
1407
1408 ret = lps25hb_read_reg(ctx, LPS25HB_INTERRUPT_CFG, (uint8_t *)®, 1);
1409
1410 switch (reg.lir)
1411 {
1412 case LPS25HB_INT_PULSED:
1413 *val = LPS25HB_INT_PULSED;
1414 break;
1415
1416 case LPS25HB_INT_LATCHED:
1417 *val = LPS25HB_INT_LATCHED;
1418 break;
1419
1420 default:
1421 *val = LPS25HB_INT_PULSED;
1422 break;
1423 }
1424
1425 return ret;
1426 }
1427
1428 /**
1429 * @brief Interrupt source register[get]
1430 *
1431 * @param ctx Read / write interface definitions.(ptr)
1432 * @param val Get registers INT_SOURCE.(ptr)
1433 * @retval Interface status (MANDATORY: return 0 -> no Error).
1434 *
1435 */
lps25hb_int_source_get(const stmdev_ctx_t * ctx,lps25hb_int_source_t * val)1436 int32_t lps25hb_int_source_get(const stmdev_ctx_t *ctx,
1437 lps25hb_int_source_t *val)
1438 {
1439 int32_t ret;
1440
1441 ret = lps25hb_read_reg(ctx, LPS25HB_INT_SOURCE, (uint8_t *) val, 1);
1442
1443 return ret;
1444 }
1445
1446 /**
1447 * @brief Differential pressure high interrupt flag.[get]
1448 *
1449 * @param ctx Read / write interface definitions.(ptr)
1450 * @param val Get the values of ph in reg INT_SOURCE.(ptr)
1451 * @retval Interface status (MANDATORY: return 0 -> no Error).
1452 *
1453 */
lps25hb_int_on_press_high_get(const stmdev_ctx_t * ctx,uint8_t * val)1454 int32_t lps25hb_int_on_press_high_get(const stmdev_ctx_t *ctx, uint8_t *val)
1455 {
1456 lps25hb_int_source_t reg;
1457 int32_t ret;
1458
1459 ret = lps25hb_read_reg(ctx, LPS25HB_INT_SOURCE, (uint8_t *)®, 1);
1460 *val = reg.ph;
1461
1462 return ret;
1463 }
1464
1465 /**
1466 * @brief Differential pressure low interrupt flag.[get]
1467 *
1468 * @param ctx Read / write interface definitions.(ptr)
1469 * @param val Get the values of pl in reg INT_SOURCE.(ptr)
1470 * @retval Interface status (MANDATORY: return 0 -> no Error).
1471 *
1472 */
lps25hb_int_on_press_low_get(const stmdev_ctx_t * ctx,uint8_t * val)1473 int32_t lps25hb_int_on_press_low_get(const stmdev_ctx_t *ctx, uint8_t *val)
1474 {
1475 lps25hb_int_source_t reg;
1476 int32_t ret;
1477
1478 ret = lps25hb_read_reg(ctx, LPS25HB_INT_SOURCE, (uint8_t *)®, 1);
1479 *val = reg.pl;
1480
1481 return ret;
1482 }
1483
1484 /**
1485 * @brief Interrupt active flag.[get]
1486 *
1487 * @param ctx Read / write interface definitions.(ptr)
1488 * @param val Change the values of ia in reg INT_SOURCE
1489 * @retval Interface status (MANDATORY: return 0 -> no Error).
1490 *
1491 */
lps25hb_interrupt_event_get(const stmdev_ctx_t * ctx,uint8_t * val)1492 int32_t lps25hb_interrupt_event_get(const stmdev_ctx_t *ctx, uint8_t *val)
1493 {
1494 lps25hb_int_source_t reg;
1495 int32_t ret;
1496
1497 ret = lps25hb_read_reg(ctx, LPS25HB_INT_SOURCE, (uint8_t *)®, 1);
1498 *val = reg.ia;
1499
1500 return ret;
1501 }
1502
1503 /**
1504 * @brief User-defined threshold value for pressure interrupt event[set]
1505 *
1506 * @param ctx Read / write interface definitions.(ptr)
1507 * @param buff Buffer that contains data to write
1508 * @retval Interface status (MANDATORY: return 0 -> no Error).
1509 *
1510 */
lps25hb_int_threshold_set(const stmdev_ctx_t * ctx,uint16_t val)1511 int32_t lps25hb_int_threshold_set(const stmdev_ctx_t *ctx, uint16_t val)
1512 {
1513 uint8_t buff[2];
1514 int32_t ret;
1515
1516 buff[1] = (uint8_t)(val / 256U);
1517 buff[0] = (uint8_t)(val - (buff[1] * 256U));
1518 ret = lps25hb_read_reg(ctx, LPS25HB_THS_P_L, buff, 2);
1519
1520 return ret;
1521 }
1522
1523 /**
1524 * @brief User-defined threshold value for pressure interrupt event[get]
1525 *
1526 * @param ctx Read / write interface definitions.(ptr)
1527 * @param buff Buffer that stores data read.(ptr)
1528 * @retval Interface status (MANDATORY: return 0 -> no Error).
1529 *
1530 */
lps25hb_int_threshold_get(const stmdev_ctx_t * ctx,uint16_t * val)1531 int32_t lps25hb_int_threshold_get(const stmdev_ctx_t *ctx, uint16_t *val)
1532 {
1533 uint8_t buff[2];
1534 int32_t ret;
1535
1536 ret = lps25hb_read_reg(ctx, LPS25HB_THS_P_L, buff, 2);
1537 *val = buff[1];
1538 *val = (*val * 256) + buff[0];
1539
1540 return ret;
1541 }
1542
1543 /**
1544 * @}
1545 *
1546 */
1547
1548 /**
1549 * @defgroup LPS25HB_fifo
1550 * @brief This section group all the functions concerning the fifo usage
1551 * @{
1552 *
1553 */
1554
1555 /**
1556 * @brief Stop on FIFO watermark. Enable FIFO watermark level use.[set]
1557 *
1558 * @param ctx Read / write interface definitions.(ptr)
1559 * @param val Change the values of stop_on_fth in reg CTRL_REG2
1560 * @retval Interface status (MANDATORY: return 0 -> no Error).
1561 *
1562 */
lps25hb_stop_on_fifo_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)1563 int32_t lps25hb_stop_on_fifo_threshold_set(const stmdev_ctx_t *ctx,
1564 uint8_t val)
1565 {
1566 lps25hb_ctrl_reg2_t reg;
1567 int32_t ret;
1568
1569 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1570
1571 if (ret == 0)
1572 {
1573 reg.stop_on_fth = val;
1574 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1575 }
1576
1577 return ret;
1578 }
1579
1580 /**
1581 * @brief Stop on FIFO watermark. Enable FIFO watermark level use.[get]
1582 *
1583 * @param ctx Read / write interface definitions.(ptr)
1584 * @param val Get the values of stop_on_fth in reg CTRL_REG2.(ptr)
1585 * @retval Interface status (MANDATORY: return 0 -> no Error).
1586 *
1587 */
lps25hb_stop_on_fifo_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)1588 int32_t lps25hb_stop_on_fifo_threshold_get(const stmdev_ctx_t *ctx,
1589 uint8_t *val)
1590 {
1591 lps25hb_ctrl_reg2_t reg;
1592 int32_t ret;
1593
1594 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1595 *val = reg.stop_on_fth;
1596
1597 return ret;
1598 }
1599
1600 /**
1601 * @brief FIFOenable.[set]
1602 *
1603 * @param ctx Read / write interface definitions.(ptr)
1604 * @param val Change the values of fifo_en in reg CTRL_REG2
1605 * @retval Interface status (MANDATORY: return 0 -> no Error).
1606 *
1607 */
lps25hb_fifo_set(const stmdev_ctx_t * ctx,uint8_t val)1608 int32_t lps25hb_fifo_set(const stmdev_ctx_t *ctx, uint8_t val)
1609 {
1610 lps25hb_ctrl_reg2_t reg;
1611 int32_t ret;
1612
1613 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1614
1615 if (ret == 0)
1616 {
1617 reg.fifo_en = val;
1618 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1619 }
1620
1621 return ret;
1622 }
1623
1624 /**
1625 * @brief FIFOenable.[get]
1626 *
1627 * @param ctx Read / write interface definitions.(ptr)
1628 * @param val Get the values of fifo_en in reg CTRL_REG2.(ptr)
1629 * @retval Interface status (MANDATORY: return 0 -> no Error).
1630 *
1631 */
lps25hb_fifo_get(const stmdev_ctx_t * ctx,uint8_t * val)1632 int32_t lps25hb_fifo_get(const stmdev_ctx_t *ctx, uint8_t *val)
1633 {
1634 lps25hb_ctrl_reg2_t reg;
1635 int32_t ret;
1636
1637 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1638 *val = reg.fifo_en;
1639
1640 return ret;
1641 }
1642
1643 /**
1644 * @brief FIFO watermark level selection.[set]
1645 *
1646 * @param ctx Read / write interface definitions.(ptr)
1647 * @param val Change the values of wtm_point in reg FIFO_CTRL
1648 * @retval Interface status (MANDATORY: return 0 -> no Error).
1649 *
1650 */
lps25hb_fifo_watermark_set(const stmdev_ctx_t * ctx,uint8_t val)1651 int32_t lps25hb_fifo_watermark_set(const stmdev_ctx_t *ctx, uint8_t val)
1652 {
1653 lps25hb_fifo_ctrl_t reg;
1654 int32_t ret;
1655
1656 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1657
1658 if (ret == 0)
1659 {
1660 reg.wtm_point = val;
1661 ret = lps25hb_write_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1662 }
1663
1664 return ret;
1665 }
1666
1667 /**
1668 * @brief FIFO watermark level selection.[get]
1669 *
1670 * @param ctx Read / write interface definitions.(ptr)
1671 * @param val Get the values of wtm_point in reg FIFO_CTRL.(ptr)
1672 * @retval Interface status (MANDATORY: return 0 -> no Error).
1673 *
1674 */
lps25hb_fifo_watermark_get(const stmdev_ctx_t * ctx,uint8_t * val)1675 int32_t lps25hb_fifo_watermark_get(const stmdev_ctx_t *ctx, uint8_t *val)
1676 {
1677 lps25hb_fifo_ctrl_t reg;
1678 int32_t ret;
1679
1680 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1681 *val = reg.wtm_point;
1682
1683 return ret;
1684 }
1685
1686 /**
1687 * @brief FIFO mode selection.[set]
1688 *
1689 * @param ctx Read / write interface definitions.(ptr)
1690 * @param val Change the values of f_mode in reg FIFO_CTRL
1691 * @retval Interface status (MANDATORY: return 0 -> no Error).
1692 *
1693 */
lps25hb_fifo_mode_set(const stmdev_ctx_t * ctx,lps25hb_f_mode_t val)1694 int32_t lps25hb_fifo_mode_set(const stmdev_ctx_t *ctx, lps25hb_f_mode_t val)
1695 {
1696 lps25hb_fifo_ctrl_t reg;
1697 int32_t ret;
1698
1699 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1700
1701 if (ret == 0)
1702 {
1703 reg.f_mode = (uint8_t)val;
1704 ret = lps25hb_write_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1705 }
1706
1707 return ret;
1708 }
1709
1710 /**
1711 * @brief FIFO mode selection.[get]
1712 *
1713 * @param ctx Read / write interface definitions.(ptr)
1714 * @param val Get the values of f_mode in reg FIFO_CTRL.(ptr)
1715 * @retval Interface status (MANDATORY: return 0 -> no Error).
1716 *
1717 */
lps25hb_fifo_mode_get(const stmdev_ctx_t * ctx,lps25hb_f_mode_t * val)1718 int32_t lps25hb_fifo_mode_get(const stmdev_ctx_t *ctx,
1719 lps25hb_f_mode_t *val)
1720 {
1721 lps25hb_fifo_ctrl_t reg;
1722 int32_t ret;
1723
1724 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_CTRL, (uint8_t *)®, 1);
1725
1726 switch (reg.f_mode)
1727 {
1728 case LPS25HB_BYPASS_MODE:
1729 *val = LPS25HB_BYPASS_MODE;
1730 break;
1731
1732 case LPS25HB_FIFO_MODE:
1733 *val = LPS25HB_FIFO_MODE;
1734 break;
1735
1736 case LPS25HB_STREAM_MODE:
1737 *val = LPS25HB_STREAM_MODE;
1738 break;
1739
1740 case LPS25HB_Stream_to_FIFO_mode:
1741 *val = LPS25HB_Stream_to_FIFO_mode;
1742 break;
1743
1744 case LPS25HB_BYPASS_TO_STREAM_MODE:
1745 *val = LPS25HB_BYPASS_TO_STREAM_MODE;
1746 break;
1747
1748 case LPS25HB_MEAN_MODE:
1749 *val = LPS25HB_MEAN_MODE;
1750 break;
1751
1752 case LPS25HB_BYPASS_TO_FIFO_MODE:
1753 *val = LPS25HB_BYPASS_TO_FIFO_MODE;
1754 break;
1755
1756 default:
1757 *val = LPS25HB_BYPASS_MODE;
1758 break;
1759 }
1760
1761 return ret;
1762 }
1763
1764 /**
1765 * @brief FIFO status register. [get]
1766 *
1767 * @param ctx Read / write interface definitions.(ptr)
1768 * @param lps25hb_: registers FIFO_STATUS.(ptr)
1769 * @retval Interface status (MANDATORY: return 0 -> no Error).
1770 *
1771 */
lps25hb_fifo_status_get(const stmdev_ctx_t * ctx,lps25hb_fifo_status_t * val)1772 int32_t lps25hb_fifo_status_get(const stmdev_ctx_t *ctx,
1773 lps25hb_fifo_status_t *val)
1774 {
1775 int32_t ret;
1776
1777 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_STATUS, (uint8_t *) val, 1);
1778
1779 return ret;
1780 }
1781
1782 /**
1783 * @brief FIFO stored data level.[get]
1784 *
1785 * @param ctx Read / write interface definitions.(ptr)
1786 * @param val Get the values of fss in reg FIFO_STATUS.(ptr)
1787 * @retval Interface status (MANDATORY: return 0 -> no Error).
1788 *
1789 */
lps25hb_fifo_data_level_get(const stmdev_ctx_t * ctx,uint8_t * val)1790 int32_t lps25hb_fifo_data_level_get(const stmdev_ctx_t *ctx, uint8_t *val)
1791 {
1792 lps25hb_fifo_status_t reg;
1793 int32_t ret;
1794
1795 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_STATUS, (uint8_t *)®, 1);
1796 *val = reg.fss;
1797
1798 return ret;
1799 }
1800
1801 /**
1802 * @brief Empty FIFO status flag.[get]
1803 *
1804 * @param ctx Read / write interface definitions.(ptr)
1805 * @param val Get the values of empty_fifo in reg FIFO_STATUS.(ptr)
1806 * @retval Interface status (MANDATORY: return 0 -> no Error).
1807 *
1808 */
lps25hb_fifo_empty_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)1809 int32_t lps25hb_fifo_empty_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
1810 {
1811 lps25hb_fifo_status_t reg;
1812 int32_t ret;
1813
1814 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_STATUS, (uint8_t *)®, 1);
1815 *val = reg.empty_fifo;
1816
1817 return ret;
1818 }
1819
1820 /**
1821 * @brief FIFO overrun status flag.[get]
1822 *
1823 * @param ctx Read / write interface definitions.(ptr)
1824 * @param val Get the values of ovr in reg FIFO_STATUS.(ptr)
1825 * @retval Interface status (MANDATORY: return 0 -> no Error).
1826 *
1827 */
lps25hb_fifo_ovr_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)1828 int32_t lps25hb_fifo_ovr_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
1829 {
1830 lps25hb_fifo_status_t reg;
1831 int32_t ret;
1832
1833 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_STATUS, (uint8_t *)®, 1);
1834 *val = reg.ovr;
1835
1836 return ret;
1837 }
1838
1839 /**
1840 * @brief FIFO watermark status.[get]
1841 *
1842 * @param ctx Read / write interface definitions.(ptr)
1843 * @param val Change the values of fth_fifo in reg FIFO_STATUS.(ptr)
1844 * @retval Interface status (MANDATORY: return 0 -> no Error).
1845 *
1846 */
lps25hb_fifo_fth_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)1847 int32_t lps25hb_fifo_fth_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
1848 {
1849 lps25hb_fifo_status_t reg;
1850 int32_t ret;
1851
1852 ret = lps25hb_read_reg(ctx, LPS25HB_FIFO_STATUS, (uint8_t *)®, 1);
1853 *val = reg.fth_fifo;
1854
1855 return ret;
1856 }
1857
1858 /**
1859 * @}
1860 *
1861 */
1862
1863 /**
1864 * @defgroup LPS25HB_serial_interface
1865 * @brief This section group all the functions concerning serial
1866 * interface management
1867 * @{
1868 *
1869 */
1870
1871 /**
1872 * @brief SPI Serial Interface Mode selection.[set]
1873 *
1874 * @param ctx Read / write interface definitions.(ptr)
1875 * @param val Change the values of sim in reg CTRL_REG1
1876 * @retval Interface status (MANDATORY: return 0 -> no Error).
1877 *
1878 */
lps25hb_spi_mode_set(const stmdev_ctx_t * ctx,lps25hb_sim_t val)1879 int32_t lps25hb_spi_mode_set(const stmdev_ctx_t *ctx, lps25hb_sim_t val)
1880 {
1881 lps25hb_ctrl_reg1_t reg;
1882 int32_t ret;
1883
1884 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
1885
1886 if (ret == 0)
1887 {
1888 reg.sim = (uint8_t)val;
1889 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
1890 }
1891
1892 return ret;
1893 }
1894
1895 /**
1896 * @brief SPI Serial Interface Mode selection.[get]
1897 *
1898 * @param ctx Read / write interface definitions.(ptr)
1899 * @param val Get the values of sim in reg CTRL_REG1.(ptr)
1900 * @retval Interface status (MANDATORY: return 0 -> no Error).
1901 *
1902 */
lps25hb_spi_mode_get(const stmdev_ctx_t * ctx,lps25hb_sim_t * val)1903 int32_t lps25hb_spi_mode_get(const stmdev_ctx_t *ctx, lps25hb_sim_t *val)
1904 {
1905 lps25hb_ctrl_reg1_t reg;
1906 int32_t ret;
1907
1908 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG1, (uint8_t *)®, 1);
1909
1910 switch (reg.sim)
1911 {
1912 case LPS25HB_SPI_4_WIRE:
1913 *val = LPS25HB_SPI_4_WIRE;
1914 break;
1915
1916 case LPS25HB_SPI_3_WIRE:
1917 *val = LPS25HB_SPI_3_WIRE;
1918 break;
1919
1920 default:
1921 *val = LPS25HB_SPI_4_WIRE;
1922 break;
1923 }
1924
1925 return ret;
1926 }
1927
1928 /**
1929 * @brief Disable I2C interface.[set]
1930 *
1931 * @param ctx Read / write interface definitions.(ptr)
1932 * @param val Change the values of i2c_dis in reg CTRL_REG2
1933 * @retval Interface status (MANDATORY: return 0 -> no Error).
1934 *
1935 */
lps25hb_i2c_interface_set(const stmdev_ctx_t * ctx,lps25hb_i2c_dis_t val)1936 int32_t lps25hb_i2c_interface_set(const stmdev_ctx_t *ctx,
1937 lps25hb_i2c_dis_t val)
1938 {
1939 lps25hb_ctrl_reg2_t reg;
1940 int32_t ret;
1941
1942 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1943
1944 if (ret == 0)
1945 {
1946 reg.i2c_dis = (uint8_t)val;
1947 ret = lps25hb_write_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1948 }
1949
1950 return ret;
1951 }
1952
1953 /**
1954 * @brief Disable I2C interface.[get]
1955 *
1956 * @param ctx Read / write interface definitions.(ptr)
1957 * @param val Get the values of i2c_dis in reg CTRL_REG2.(ptr)
1958 * @retval Interface status (MANDATORY: return 0 -> no Error).
1959 *
1960 */
lps25hb_i2c_interface_get(const stmdev_ctx_t * ctx,lps25hb_i2c_dis_t * val)1961 int32_t lps25hb_i2c_interface_get(const stmdev_ctx_t *ctx,
1962 lps25hb_i2c_dis_t *val)
1963 {
1964 lps25hb_ctrl_reg2_t reg;
1965 int32_t ret;
1966
1967 ret = lps25hb_read_reg(ctx, LPS25HB_CTRL_REG2, (uint8_t *)®, 1);
1968
1969 switch (reg.i2c_dis)
1970 {
1971 case LPS25HB_I2C_ENABLE:
1972 *val = LPS25HB_I2C_ENABLE;
1973 break;
1974
1975 case LPS25HB_I2C_DISABLE:
1976 *val = LPS25HB_I2C_DISABLE;
1977 break;
1978
1979 default:
1980 *val = LPS25HB_I2C_ENABLE;
1981 break;
1982 }
1983
1984 return ret;
1985 }
1986
1987 /**
1988 * @}
1989 *
1990 */
1991
1992 /**
1993 * @}
1994 *
1995 */
1996
1997 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1998
