1 /**
2 ******************************************************************************
3 * @file lps22hb_reg.c
4 * @author Sensors Software Solution Team
5 * @brief LPS22HB driver file
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2021 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #include "lps22hb_reg.h"
21
22 /**
23 * @defgroup LPS22HB
24 * @brief This file provides a set of functions needed to drive the
25 * ultra-compact piezoresistive absolute pressure sensor.
26 * @{
27 *
28 */
29
30 /**
31 * @defgroup LPS22HB_Interfaces_functions
32 * @brief This section provide a set of functions used to read and
33 * write a generic register of the device.
34 * @{
35 *
36 */
37
38 /**
39 * @brief Read generic device register
40 *
41 * @param ctx read / write interface definitions(ptr)
42 * @param reg register to read
43 * @param data pointer to buffer that store the data read(ptr)
44 * @param len number of consecutive register to read
45 * @retval interface status (MANDATORY: return 0 -> no Error)
46 *
47 */
lps22hb_read_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)48 int32_t __weak lps22hb_read_reg(const stmdev_ctx_t *ctx, uint8_t reg,
49 uint8_t *data,
50 uint16_t len)
51 {
52 int32_t ret;
53
54 if (ctx == NULL)
55 {
56 return -1;
57 }
58
59 ret = ctx->read_reg(ctx->handle, reg, data, len);
60
61 return ret;
62 }
63
64 /**
65 * @brief Write generic device register
66 *
67 * @param ctx read / write interface definitions(ptr)
68 * @param reg register to write
69 * @param data pointer to data to write in register reg(ptr)
70 * @param len number of consecutive register to write
71 * @retval interface status (MANDATORY: return 0 -> no Error)
72 *
73 */
lps22hb_write_reg(const stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)74 int32_t __weak lps22hb_write_reg(const stmdev_ctx_t *ctx, uint8_t reg,
75 uint8_t *data,
76 uint16_t len)
77 {
78 int32_t ret;
79
80 if (ctx == NULL)
81 {
82 return -1;
83 }
84
85 ret = ctx->write_reg(ctx->handle, reg, data, len);
86
87 return ret;
88 }
89
90 /**
91 * @}
92 *
93 */
94
95 /**
96 * @defgroup LPS22HB_Sensitivity
97 * @brief These functions convert raw-data into engineering units.
98 * @{
99 *
100 */
101
lps22hb_from_lsb_to_hpa(int32_t lsb)102 float_t lps22hb_from_lsb_to_hpa(int32_t lsb)
103 {
104 return ((float_t)lsb / 4096.0f);
105 }
106
lps22hb_from_lsb_to_kpa(int32_t lsb)107 float_t lps22hb_from_lsb_to_kpa(int32_t lsb)
108 {
109 return lps22hb_from_lsb_to_hpa(lsb) / 10.0f;
110 }
111
lps22hb_from_lsb_to_psi(int32_t lsb)112 float_t lps22hb_from_lsb_to_psi(int32_t lsb)
113 {
114 return lps22hb_from_lsb_to_hpa(lsb) * 0.0145038f;
115 }
116
lps22hb_from_lsb_to_altitude(int32_t lsb)117 float_t lps22hb_from_lsb_to_altitude(int32_t lsb)
118 {
119 float_t atmospheric = lps22hb_from_lsb_to_hpa(lsb);
120 // The altitude in meters can be calculated with the
121 // international barometric formula.
122 // Average sea level pressure is 1013.25 hPa.
123 return 44330.0 * (1.0 - pow(atmospheric / 1013.25f, (1.0 / 5.255)));
124 }
125
lps22hb_from_lsb_to_degc(int16_t lsb)126 float_t lps22hb_from_lsb_to_degc(int16_t lsb)
127 {
128 return ((float_t)lsb / 100.0f);
129 }
130
131 /**
132 * @}
133 *
134 */
135
136 /**
137 * @defgroup LPS22HB_data_generation_c
138 * @brief This section group all the functions concerning data
139 * generation
140 * @{
141 *
142 */
143
144
145 /**
146 * @brief Reset Autozero function.[set]
147 *
148 * @param ctx Read / write interface definitions
149 * @param val Change the values of reset_az in reg INTERRUPT_CFG
150 * @retval Interface status (MANDATORY: return 0 -> no Error).
151 *
152 */
153
lps22hb_autozero_rst_set(const stmdev_ctx_t * ctx,uint8_t val)154 int32_t lps22hb_autozero_rst_set(const stmdev_ctx_t *ctx, uint8_t val)
155 {
156 lps22hb_interrupt_cfg_t interrupt_cfg;
157 int32_t ret;
158
159 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
160 (uint8_t *)&interrupt_cfg, 1);
161
162 if (ret == 0)
163 {
164 interrupt_cfg.reset_az = val;
165 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
166 (uint8_t *)&interrupt_cfg, 1);
167 }
168
169 return ret;
170 }
171
172 /**
173 * @brief Reset Autozero function.[get]
174 *
175 * @param ctx Read / write interface definitions
176 * @param val Change the values of reset_az in reg INTERRUPT_CFG
177 * @retval Interface status (MANDATORY: return 0 -> no Error).
178 *
179 */
lps22hb_autozero_rst_get(const stmdev_ctx_t * ctx,uint8_t * val)180 int32_t lps22hb_autozero_rst_get(const stmdev_ctx_t *ctx, uint8_t *val)
181 {
182 lps22hb_interrupt_cfg_t interrupt_cfg;
183 int32_t ret;
184
185 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
186 (uint8_t *)&interrupt_cfg, 1);
187 *val = interrupt_cfg.reset_az;
188
189 return ret;
190 }
191
192 /**
193 * @brief Enable Autozero function.[set]
194 *
195 * @param ctx Read / write interface definitions
196 * @param val Change the values of autozero in reg INTERRUPT_CFG
197 * @retval Interface status (MANDATORY: return 0 -> no Error).
198 *
199 */
lps22hb_autozero_set(const stmdev_ctx_t * ctx,uint8_t val)200 int32_t lps22hb_autozero_set(const stmdev_ctx_t *ctx, uint8_t val)
201 {
202 lps22hb_interrupt_cfg_t interrupt_cfg;
203 int32_t ret;
204
205 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
206 (uint8_t *)&interrupt_cfg, 1);
207
208 if (ret == 0)
209 {
210 interrupt_cfg.autozero = val;
211 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
212 (uint8_t *)&interrupt_cfg, 1);
213 }
214
215 return ret;
216 }
217
218 /**
219 * @brief Enable Autozero function.[get]
220 *
221 * @param ctx Read / write interface definitions
222 * @param val Change the values of autozero in reg INTERRUPT_CFG
223 * @retval Interface status (MANDATORY: return 0 -> no Error).
224 *
225 */
lps22hb_autozero_get(const stmdev_ctx_t * ctx,uint8_t * val)226 int32_t lps22hb_autozero_get(const stmdev_ctx_t *ctx, uint8_t *val)
227 {
228 lps22hb_interrupt_cfg_t interrupt_cfg;
229 int32_t ret;
230
231 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
232 (uint8_t *)&interrupt_cfg, 1);
233 *val = interrupt_cfg.autozero;
234
235 return ret;
236 }
237
238 /**
239 * @brief Reset AutoRifP function.[set]
240 *
241 * @param ctx Read / write interface definitions
242 * @param val Change the values of reset_arp in reg INTERRUPT_CFG
243 * @retval Interface status (MANDATORY: return 0 -> no Error).
244 *
245 */
lps22hb_pressure_snap_rst_set(const stmdev_ctx_t * ctx,uint8_t val)246 int32_t lps22hb_pressure_snap_rst_set(const stmdev_ctx_t *ctx, uint8_t val)
247 {
248 lps22hb_interrupt_cfg_t interrupt_cfg;
249 int32_t ret;
250
251 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
252 (uint8_t *)&interrupt_cfg, 1);
253
254 if (ret == 0)
255 {
256 interrupt_cfg.reset_arp = val;
257 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
258 (uint8_t *)&interrupt_cfg, 1);
259 }
260
261 return ret;
262 }
263
264 /**
265 * @brief Reset AutoRifP function.[get]
266 *
267 * @param ctx Read / write interface definitions
268 * @param val Change the values of reset_arp in reg INTERRUPT_CFG
269 * @retval Interface status (MANDATORY: return 0 -> no Error).
270 *
271 */
lps22hb_pressure_snap_rst_get(const stmdev_ctx_t * ctx,uint8_t * val)272 int32_t lps22hb_pressure_snap_rst_get(const stmdev_ctx_t *ctx, uint8_t *val)
273 {
274 lps22hb_interrupt_cfg_t interrupt_cfg;
275 int32_t ret;
276
277 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
278 (uint8_t *)&interrupt_cfg, 1);
279 *val = interrupt_cfg.reset_arp;
280
281 return ret;
282 }
283
284 /**
285 * @brief Enable AutoRifP function.[set]
286 *
287 * @param ctx Read / write interface definitions
288 * @param val Change the values of autorifp in reg INTERRUPT_CFG.
289 * @retval Interface status (MANDATORY: return 0 -> no Error).
290 *
291 */
lps22hb_pressure_snap_set(const stmdev_ctx_t * ctx,uint8_t val)292 int32_t lps22hb_pressure_snap_set(const stmdev_ctx_t *ctx, uint8_t val)
293 {
294 lps22hb_interrupt_cfg_t interrupt_cfg;
295 int32_t ret;
296
297 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
298 (uint8_t *)&interrupt_cfg, 1);
299
300 if (ret == 0)
301 {
302 interrupt_cfg.autorifp = val;
303 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
304 (uint8_t *)&interrupt_cfg, 1);
305 }
306
307 return ret;
308 }
309
310 /**
311 * @brief Enable AutoRifP function.[get]
312 *
313 * @param ctx Read / write interface definitions
314 * @param val Change the values of autorifp in reg INTERRUPT_CFG
315 * @retval Interface status (MANDATORY: return 0 -> no Error).
316 *
317 */
lps22hb_pressure_snap_get(const stmdev_ctx_t * ctx,uint8_t * val)318 int32_t lps22hb_pressure_snap_get(const stmdev_ctx_t *ctx, uint8_t *val)
319 {
320 lps22hb_interrupt_cfg_t interrupt_cfg;
321 int32_t ret;
322
323 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
324 (uint8_t *)&interrupt_cfg, 1);
325 *val = interrupt_cfg.autorifp;
326
327 return ret;
328 }
329
330 /**
331 * @brief Block data update.[set]
332 *
333 * @param ctx Read / write interface definitions
334 * @param val Change the values of bdu in reg CTRL_REG1
335 * @retval Interface status (MANDATORY: return 0 -> no Error).
336 *
337 */
lps22hb_block_data_update_set(const stmdev_ctx_t * ctx,uint8_t val)338 int32_t lps22hb_block_data_update_set(const stmdev_ctx_t *ctx, uint8_t val)
339 {
340 lps22hb_ctrl_reg1_t ctrl_reg1;
341 int32_t ret;
342
343 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
344
345 if (ret == 0)
346 {
347 ctrl_reg1.bdu = val;
348 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
349 }
350
351 return ret;
352 }
353
354 /**
355 * @brief Block data update.[get]
356 *
357 * @param ctx Read / write interface definitions
358 * @param val Change the values of bdu in reg CTRL_REG1
359 * @retval Interface status (MANDATORY: return 0 -> no Error).
360 *
361 */
lps22hb_block_data_update_get(const stmdev_ctx_t * ctx,uint8_t * val)362 int32_t lps22hb_block_data_update_get(const stmdev_ctx_t *ctx, uint8_t *val)
363 {
364 lps22hb_ctrl_reg1_t ctrl_reg1;
365 int32_t ret;
366
367 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
368 *val = ctrl_reg1.bdu;
369
370 return ret;
371 }
372
373 /**
374 * @brief Low-pass bandwidth selection.[set]
375 *
376 * @param ctx Read / write interface definitions
377 * @param val Change the values of lpfp in reg CTRL_REG1
378 * @retval Interface status (MANDATORY: return 0 -> no Error).
379 *
380 */
lps22hb_low_pass_filter_mode_set(const stmdev_ctx_t * ctx,lps22hb_lpfp_t val)381 int32_t lps22hb_low_pass_filter_mode_set(const stmdev_ctx_t *ctx,
382 lps22hb_lpfp_t val)
383 {
384 lps22hb_ctrl_reg1_t ctrl_reg1;
385 int32_t ret;
386
387 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
388
389 if (ret == 0)
390 {
391 ctrl_reg1.lpfp = (uint8_t)val;
392 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
393 }
394
395 return ret;
396 }
397
398 /**
399 * @brief Low-pass bandwidth selection.[get]
400 *
401 * @param ctx Read / write interface definitions
402 * @param val Get the values of lpfp in reg CTRL_REG1
403 * @retval Interface status (MANDATORY: return 0 -> no Error).
404 *
405 */
lps22hb_low_pass_filter_mode_get(const stmdev_ctx_t * ctx,lps22hb_lpfp_t * val)406 int32_t lps22hb_low_pass_filter_mode_get(const stmdev_ctx_t *ctx,
407 lps22hb_lpfp_t *val)
408 {
409 lps22hb_ctrl_reg1_t ctrl_reg1;
410 int32_t ret;
411
412 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
413
414 switch (ctrl_reg1.lpfp)
415 {
416 case LPS22HB_LPF_ODR_DIV_2:
417 *val = LPS22HB_LPF_ODR_DIV_2;
418 break;
419
420 case LPS22HB_LPF_ODR_DIV_9:
421 *val = LPS22HB_LPF_ODR_DIV_9;
422 break;
423
424 case LPS22HB_LPF_ODR_DIV_20:
425 *val = LPS22HB_LPF_ODR_DIV_20;
426 break;
427
428 default:
429 *val = LPS22HB_LPF_ODR_DIV_2;
430 break;
431 }
432
433 return ret;
434 }
435
436 /**
437 * @brief Output data rate selection.[set]
438 *
439 * @param ctx Read / write interface definitions
440 * @param val Change the values of odr in reg CTRL_REG1
441 * @retval Interface status (MANDATORY: return 0 -> no Error).
442 *
443 */
lps22hb_data_rate_set(const stmdev_ctx_t * ctx,lps22hb_odr_t val)444 int32_t lps22hb_data_rate_set(const stmdev_ctx_t *ctx, lps22hb_odr_t val)
445 {
446 lps22hb_ctrl_reg1_t ctrl_reg1;
447 int32_t ret;
448
449 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
450
451 if (ret == 0)
452 {
453 ctrl_reg1.odr = (uint8_t)val;
454 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
455 }
456
457 return ret;
458 }
459
460 /**
461 * @brief Output data rate selection.[get]
462 *
463 * @param ctx Read / write interface definitions
464 * @param val Get the values of odr in reg CTRL_REG1
465 * @retval Interface status (MANDATORY: return 0 -> no Error).
466 *
467 */
lps22hb_data_rate_get(const stmdev_ctx_t * ctx,lps22hb_odr_t * val)468 int32_t lps22hb_data_rate_get(const stmdev_ctx_t *ctx, lps22hb_odr_t *val)
469 {
470 lps22hb_ctrl_reg1_t ctrl_reg1;
471 int32_t ret;
472
473 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
474
475 switch (ctrl_reg1.odr)
476 {
477 case LPS22HB_POWER_DOWN:
478 *val = LPS22HB_POWER_DOWN;
479 break;
480
481 case LPS22HB_ODR_1_Hz:
482 *val = LPS22HB_ODR_1_Hz;
483 break;
484
485 case LPS22HB_ODR_10_Hz:
486 *val = LPS22HB_ODR_10_Hz;
487 break;
488
489 case LPS22HB_ODR_25_Hz:
490 *val = LPS22HB_ODR_25_Hz;
491 break;
492
493 case LPS22HB_ODR_50_Hz:
494 *val = LPS22HB_ODR_50_Hz;
495 break;
496
497 case LPS22HB_ODR_75_Hz:
498 *val = LPS22HB_ODR_75_Hz;
499 break;
500
501 default:
502 *val = LPS22HB_ODR_1_Hz;
503 break;
504 }
505
506 return ret;
507 }
508
509 /**
510 * @brief One-shot mode. Device perform a single measure.[set]
511 *
512 * @param ctx Read / write interface definitions
513 * @param val Change the values of one_shot in reg CTRL_REG2
514 * @retval Interface status (MANDATORY: return 0 -> no Error).
515 *
516 */
lps22hb_one_shoot_trigger_set(const stmdev_ctx_t * ctx,uint8_t val)517 int32_t lps22hb_one_shoot_trigger_set(const stmdev_ctx_t *ctx, uint8_t val)
518 {
519 lps22hb_ctrl_reg2_t ctrl_reg2;
520 int32_t ret;
521
522 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
523
524 if (ret == 0)
525 {
526 ctrl_reg2.one_shot = val;
527 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
528 }
529
530 return ret;
531 }
532
533 /**
534 * @brief One-shot mode. Device perform a single measure.[get]
535 *
536 * @param ctx Read / write interface definitions
537 * @param val Change the values of one_shot in reg CTRL_REG2
538 * @retval Interface status (MANDATORY: return 0 -> no Error).
539 *
540 */
lps22hb_one_shoot_trigger_get(const stmdev_ctx_t * ctx,uint8_t * val)541 int32_t lps22hb_one_shoot_trigger_get(const stmdev_ctx_t *ctx, uint8_t *val)
542 {
543 lps22hb_ctrl_reg2_t ctrl_reg2;
544 int32_t ret;
545
546 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
547 *val = ctrl_reg2.one_shot;
548
549 return ret;
550 }
551
552 /**
553 * @brief pressure_ref: The Reference pressure value is a 24-bit data
554 * expressed as 2’s complement. The value is used when AUTOZERO
555 * or AUTORIFP function is enabled.[set]
556 *
557 * @param ctx Read / write interface definitions
558 * @param buff Buffer that contains data to write
559 * @retval Interface status (MANDATORY: return 0 -> no Error).
560 *
561 */
lps22hb_pressure_ref_set(const stmdev_ctx_t * ctx,int32_t val)562 int32_t lps22hb_pressure_ref_set(const stmdev_ctx_t *ctx, int32_t val)
563 {
564 uint8_t buff[3];
565 int32_t ret;
566
567 buff[2] = (uint8_t)((uint32_t)val / 65536U);
568 buff[1] = (uint8_t)((uint32_t)val - (buff[2] * 65536U)) / 256U;
569 buff[0] = (uint8_t)((uint32_t)val - (buff[2] * 65536U) -
570 (buff[1] * 256U));
571 ret = lps22hb_write_reg(ctx, LPS22HB_REF_P_XL, buff, 3);
572
573 return ret;
574 }
575
576 /**
577 * @brief pressure_ref: The Reference pressure value is a 24-bit data
578 * expressed as 2’s complement. The value is used when AUTOZERO
579 * or AUTORIFP function is enabled.[get]
580 *
581 * @param ctx Read / write interface definitions
582 * @param buff Buffer that stores data read
583 * @retval Interface status (MANDATORY: return 0 -> no Error).
584 *
585 */
lps22hb_pressure_ref_get(const stmdev_ctx_t * ctx,int32_t * val)586 int32_t lps22hb_pressure_ref_get(const stmdev_ctx_t *ctx, int32_t *val)
587 {
588 uint8_t buff[3];
589 int32_t ret;
590
591 ret = lps22hb_read_reg(ctx, LPS22HB_REF_P_XL, buff, 3);
592 *val = (int32_t)buff[2];
593 *val = (*val * 256) + (int32_t)buff[1];
594 *val = (*val * 256) + (int32_t)buff[0];
595
596 return ret;
597 }
598
599 /**
600 * @brief The pressure offset value is 16-bit data that can be used to
601 * implement one-point calibration (OPC) after soldering.[set]
602 *
603 * @param ctx Read / write interface definitions
604 * @param buff Buffer that contains data to write
605 * @retval Interface status (MANDATORY: return 0 -> no Error).
606 *
607 */
lps22hb_pressure_offset_set(const stmdev_ctx_t * ctx,int16_t val)608 int32_t lps22hb_pressure_offset_set(const stmdev_ctx_t *ctx, int16_t val)
609 {
610 uint8_t buff[2];
611 int32_t ret;
612
613 buff[1] = (uint8_t)((uint16_t)val / 256U);
614 buff[0] = (uint8_t)((uint16_t)val - (buff[1] * 256U));
615 ret = lps22hb_write_reg(ctx, LPS22HB_RPDS_L, buff, 2);
616
617 return ret;
618 }
619
620 /**
621 * @brief The pressure offset value is 16-bit data that can be used to
622 * implement one-point calibration (OPC) after soldering.[get]
623 *
624 * @param ctx Read / write interface definitions
625 * @param buff Buffer that stores data read
626 * @retval Interface status (MANDATORY: return 0 -> no Error).
627 *
628 */
lps22hb_pressure_offset_get(const stmdev_ctx_t * ctx,int16_t * val)629 int32_t lps22hb_pressure_offset_get(const stmdev_ctx_t *ctx, int16_t *val)
630 {
631 uint8_t buff[2];
632 int32_t ret;
633
634 ret = lps22hb_read_reg(ctx, LPS22HB_RPDS_L, buff, 2);
635 *val = (int16_t)buff[1];
636 *val = (*val * 256) + (int16_t)buff[0];
637
638 return ret;
639 }
640
641 /**
642 * @brief Pressure data available.[get]
643 *
644 * @param ctx Read / write interface definitions
645 * @param val Change the values of p_da in reg STATUS
646 * @retval Interface status (MANDATORY: return 0 -> no Error).
647 *
648 */
lps22hb_press_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)649 int32_t lps22hb_press_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
650 {
651 lps22hb_status_t status;
652 int32_t ret;
653
654 ret = lps22hb_read_reg(ctx, LPS22HB_STATUS, (uint8_t *)&status, 1);
655 *val = status.p_da;
656
657 return ret;
658 }
659
660 /**
661 * @brief Temperature data available.[get]
662 *
663 * @param ctx Read / write interface definitions
664 * @param val Change the values of t_da in reg STATUS
665 * @retval Interface status (MANDATORY: return 0 -> no Error).
666 *
667 */
lps22hb_temp_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * val)668 int32_t lps22hb_temp_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *val)
669 {
670 lps22hb_status_t status;
671 int32_t ret;
672
673 ret = lps22hb_read_reg(ctx, LPS22HB_STATUS, (uint8_t *)&status, 1);
674 *val = status.t_da;
675
676 return ret;
677 }
678
679 /**
680 * @brief Pressure and temperature data available.[get]
681 *
682 * @param ctx Read / write interface definitions
683 * @param press_val Change the values of p_da in reg STATUS
684 * @param temp_val Change the values of t_da in reg STATUS
685 * @retval Interface status (MANDATORY: return 0 -> no Error).
686 *
687 */
lps22hb_data_ready_get(const stmdev_ctx_t * ctx,uint8_t * press_val,uint8_t * temp_val)688 int32_t lps22hb_data_ready_get(const stmdev_ctx_t *ctx, uint8_t *press_val, uint8_t *temp_val)
689 {
690 lps22hb_status_t status;
691 int32_t ret;
692
693 ret = lps22hb_read_reg(ctx, LPS22HB_STATUS, (uint8_t *)&status, 1);
694 *press_val = status.p_da;
695 *temp_val = status.t_da;
696
697 return ret;
698 }
699
700 /**
701 * @brief Pressure data overrun.[get]
702 *
703 * @param ctx Read / write interface definitions
704 * @param val Change the values of p_or in reg STATUS
705 * @retval Interface status (MANDATORY: return 0 -> no Error).
706 *
707 */
lps22hb_press_data_ovr_get(const stmdev_ctx_t * ctx,uint8_t * val)708 int32_t lps22hb_press_data_ovr_get(const stmdev_ctx_t *ctx, uint8_t *val)
709 {
710 lps22hb_status_t status;
711 int32_t ret;
712
713 ret = lps22hb_read_reg(ctx, LPS22HB_STATUS, (uint8_t *)&status, 1);
714 *val = status.p_or;
715
716 return ret;
717 }
718
719 /**
720 * @brief Temperature data overrun.[get]
721 *
722 * @param ctx Read / write interface definitions
723 * @param val Change the values of t_or in reg STATUS
724 * @retval Interface status (MANDATORY: return 0 -> no Error).
725 *
726 */
lps22hb_temp_data_ovr_get(const stmdev_ctx_t * ctx,uint8_t * val)727 int32_t lps22hb_temp_data_ovr_get(const stmdev_ctx_t *ctx, uint8_t *val)
728 {
729 lps22hb_status_t status;
730 int32_t ret;
731
732 ret = lps22hb_read_reg(ctx, LPS22HB_STATUS, (uint8_t *)&status, 1);
733 *val = status.t_or;
734
735 return ret;
736 }
737
738 /**
739 * @brief Pressure output value[get]
740 *
741 * @param ctx Read / write interface definitions
742 * @param buff Buffer that stores data read
743 * @retval Interface status (MANDATORY: return 0 -> no Error).
744 *
745 */
lps22hb_pressure_raw_get(const stmdev_ctx_t * ctx,uint32_t * buff)746 int32_t lps22hb_pressure_raw_get(const stmdev_ctx_t *ctx, uint32_t *buff)
747 {
748 uint8_t reg[3];
749 int32_t ret;
750
751 ret = lps22hb_read_reg(ctx, LPS22HB_PRESS_OUT_XL, reg, 3);
752 *buff = reg[2];
753 *buff = (*buff * 256) + reg[1];
754 *buff = (*buff * 256) + reg[0];
755 *buff *= 256;
756
757 return ret;
758 }
759
760 /**
761 * @brief temperature_raw: Temperature output value[get]
762 *
763 * @param ctx Read / write interface definitions
764 * @param buff Buffer that stores data read.
765 * @retval Interface status (MANDATORY: return 0 -> no Error).
766 *
767 */
lps22hb_temperature_raw_get(const stmdev_ctx_t * ctx,int16_t * buff)768 int32_t lps22hb_temperature_raw_get(const stmdev_ctx_t *ctx, int16_t *buff)
769 {
770 uint8_t reg[2];
771 int32_t ret;
772
773 ret = lps22hb_read_reg(ctx, LPS22HB_TEMP_OUT_L, (uint8_t *) reg, 2);
774 *buff = reg[1];
775 *buff = (*buff * 256) + reg[0];
776
777 return ret;
778 }
779
780 /**
781 * @defgroup LPS22HB_FIFO_Output_Data
782 * @brief These functions convert FIFO output data to seperate
783 * (pressure, temperautre) fields.
784 * @{
785 *
786 */
787
lps22hb_fifo_output_data_to_raw_pressure(lps22hb_fifo_output_data_t * val)788 int32_t lps22hb_fifo_output_data_to_raw_pressure(lps22hb_fifo_output_data_t *val)
789 {
790 int32_t pressure = val->bytes[2];
791 pressure = (pressure * 256) + val->bytes[1];
792 return (pressure * 256) + val->bytes[0];
793 }
794
lps22hb_fifo_output_data_to_raw_temperature(lps22hb_fifo_output_data_t * val)795 int16_t lps22hb_fifo_output_data_to_raw_temperature(lps22hb_fifo_output_data_t *val)
796 {
797 int16_t temperature = val->bytes[4];
798 return (temperature * 256) + val->bytes[3];
799 }
800
801 /**
802 * @}
803 *
804 */
805
806 /**
807 * @brief Burst read fifo output data.
808 *
809 * @param ctx Read / write interface definitions
810 * @param buff Buffer that stores data read.
811 * @param len How many pressure-temperature pairs to read from the fifo.
812 * @retval Interface status (MANDATORY: return 0 -> no Error).
813 *
814 */
lps22hb_fifo_output_data_burst_get(const stmdev_ctx_t * ctx,lps22hb_fifo_output_data_t * buff,uint8_t len)815 int32_t lps22hb_fifo_output_data_burst_get(const stmdev_ctx_t *ctx,
816 lps22hb_fifo_output_data_t *buff, uint8_t len)
817 {
818 if (len > 32)
819 {
820 len = 32;
821 }
822 return lps22hb_read_reg(ctx, LPS22HB_PRESS_OUT_XL, (uint8_t *)&buff[0],
823 len * sizeof(lps22hb_fifo_output_data_t));
824 }
825
826 /**
827 * @brief Low-pass filter reset register. If the LPFP is active, in
828 * order to avoid the transitory phase, the filter can be
829 * reset by reading this register before generating pressure
830 * measurements.[get]
831 *
832 * @param ctx Read / write interface definitions
833 * @param buff Buffer that stores data read
834 * @retval Interface status (MANDATORY: return 0 -> no Error).
835 *
836 */
lps22hb_low_pass_rst_get(const stmdev_ctx_t * ctx,uint8_t * buff)837 int32_t lps22hb_low_pass_rst_get(const stmdev_ctx_t *ctx, uint8_t *buff)
838 {
839 int32_t ret;
840
841 ret = lps22hb_read_reg(ctx, LPS22HB_LPFP_RES, (uint8_t *) buff, 1);
842
843 return ret;
844 }
845
846 /**
847 * @}
848 *
849 */
850
851 /**
852 * @defgroup LPS22HB_common
853 * @brief This section group common useful functions
854 * @{
855 *
856 */
857
858 /**
859 * @brief Device Who am I[get]
860 *
861 * @param ctx Read / write interface definitions
862 * @param buff Buffer that stores data read
863 * @retval Interface status (MANDATORY: return 0 -> no Error).
864 *
865 */
lps22hb_device_id_get(const stmdev_ctx_t * ctx,uint8_t * buff)866 int32_t lps22hb_device_id_get(const stmdev_ctx_t *ctx, uint8_t *buff)
867 {
868 int32_t ret;
869
870 ret = lps22hb_read_reg(ctx, LPS22HB_WHO_AM_I, (uint8_t *) buff, 1);
871
872 return ret;
873 }
874
875 /**
876 * @brief Software reset. Restore the default values in user registers[set]
877 *
878 * @param ctx Read / write interface definitions
879 * @param val Change the values of swreset in reg CTRL_REG2
880 * @retval Interface status (MANDATORY: return 0 -> no Error).
881 *
882 */
lps22hb_reset_set(const stmdev_ctx_t * ctx,uint8_t val)883 int32_t lps22hb_reset_set(const stmdev_ctx_t *ctx, uint8_t val)
884 {
885 lps22hb_ctrl_reg2_t ctrl_reg2;
886 int32_t ret;
887
888 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
889
890 if (ret == 0)
891 {
892 ctrl_reg2.swreset = val;
893 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
894 }
895
896 return ret;
897 }
898
899 /**
900 * @brief Software reset. Restore the default values in user registers[get]
901 *
902 * @param ctx Read / write interface definitions
903 * @param val Change the values of swreset in reg CTRL_REG2
904 * @retval Interface status (MANDATORY: return 0 -> no Error).
905 *
906 */
lps22hb_reset_get(const stmdev_ctx_t * ctx,uint8_t * val)907 int32_t lps22hb_reset_get(const stmdev_ctx_t *ctx, uint8_t *val)
908 {
909 lps22hb_ctrl_reg2_t ctrl_reg2;
910 int32_t ret;
911
912 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
913 *val = ctrl_reg2.swreset;
914
915 return ret;
916 }
917
918 /**
919 * @brief Reboot memory content. Reload the calibration parameters.[set]
920 *
921 * @param ctx Read / write interface definitions
922 * @param val Change the values of boot in reg CTRL_REG2
923 * @retval Interface status (MANDATORY: return 0 -> no Error).
924 *
925 */
lps22hb_boot_set(const stmdev_ctx_t * ctx,uint8_t val)926 int32_t lps22hb_boot_set(const stmdev_ctx_t *ctx, uint8_t val)
927 {
928 lps22hb_ctrl_reg2_t ctrl_reg2;
929 int32_t ret;
930
931 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
932
933 if (ret == 0)
934 {
935 ctrl_reg2.boot = val;
936 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
937 }
938
939 return ret;
940 }
941
942 /**
943 * @brief Reboot memory content. Reload the calibration parameters.[get]
944 *
945 * @param ctx Read / write interface definitions
946 * @param val Change the values of boot in reg CTRL_REG2
947 * @retval Interface status (MANDATORY: return 0 -> no Error).
948 *
949 */
lps22hb_boot_get(const stmdev_ctx_t * ctx,uint8_t * val)950 int32_t lps22hb_boot_get(const stmdev_ctx_t *ctx, uint8_t *val)
951 {
952 lps22hb_ctrl_reg2_t ctrl_reg2;
953 int32_t ret;
954
955 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
956 *val = ctrl_reg2.boot;
957
958 return ret;
959 }
960
961 /**
962 * @brief Low current mode.[set]
963 *
964 * @param ctx Read / write interface definitions
965 * @param val Change the values of lc_en in reg RES_CONF
966 * @retval Interface status (MANDATORY: return 0 -> no Error).
967 *
968 */
lps22hb_low_power_set(const stmdev_ctx_t * ctx,uint8_t val)969 int32_t lps22hb_low_power_set(const stmdev_ctx_t *ctx, uint8_t val)
970 {
971 lps22hb_res_conf_t res_conf;
972 int32_t ret;
973
974 ret = lps22hb_read_reg(ctx, LPS22HB_RES_CONF, (uint8_t *)&res_conf, 1);
975
976 if (ret == 0)
977 {
978 res_conf.lc_en = val;
979 ret = lps22hb_write_reg(ctx, LPS22HB_RES_CONF, (uint8_t *)&res_conf, 1);
980 }
981
982 return ret;
983 }
984
985 /**
986 * @brief Low current mode.[get]
987 *
988 * @param ctx Read / write interface definitions
989 * @param val Change the values of lc_en in reg RES_CONF
990 * @retval Interface status (MANDATORY: return 0 -> no Error).
991 *
992 */
lps22hb_low_power_get(const stmdev_ctx_t * ctx,uint8_t * val)993 int32_t lps22hb_low_power_get(const stmdev_ctx_t *ctx, uint8_t *val)
994 {
995 lps22hb_res_conf_t res_conf;
996 int32_t ret;
997
998 ret = lps22hb_read_reg(ctx, LPS22HB_RES_CONF, (uint8_t *)&res_conf, 1);
999 *val = res_conf.lc_en;
1000
1001 return ret;
1002 }
1003
1004 /**
1005 * @brief If ‘1’ indicates that the Boot (Reboot) phase is running.[get]
1006 *
1007 * @param ctx Read / write interface definitions
1008 * @param val Change the values of boot_status in reg INT_SOURCE
1009 * @retval Interface status (MANDATORY: return 0 -> no Error).
1010 *
1011 */
lps22hb_boot_status_get(const stmdev_ctx_t * ctx,uint8_t * val)1012 int32_t lps22hb_boot_status_get(const stmdev_ctx_t *ctx, uint8_t *val)
1013 {
1014 lps22hb_int_source_t int_source;
1015 int32_t ret;
1016
1017 ret = lps22hb_read_reg(ctx, LPS22HB_INT_SOURCE,
1018 (uint8_t *)&int_source, 1);
1019 *val = int_source.boot_status;
1020
1021 return ret;
1022 }
1023
1024 /**
1025 * @brief All the status bit, FIFO and data generation[get]
1026 *
1027 * @param ctx Read / write interface definitions
1028 * @param val Structure of registers from FIFO_STATUS to STATUS
1029 * @retval Interface status (MANDATORY: return 0 -> no Error).
1030 *
1031 */
lps22hb_dev_status_get(const stmdev_ctx_t * ctx,lps22hb_dev_stat_t * val)1032 int32_t lps22hb_dev_status_get(const stmdev_ctx_t *ctx,
1033 lps22hb_dev_stat_t *val)
1034 {
1035 int32_t ret;
1036
1037 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_STATUS, (uint8_t *) val, 2);
1038
1039 return ret;
1040 }
1041
1042 /**
1043 * @}
1044 *
1045 */
1046
1047 /**
1048 * @defgroup LPS22HB_interrupts
1049 * @brief This section group all the functions that manage interrupts
1050 * @{
1051 *
1052 */
1053
1054 /**
1055 * @brief Enable interrupt generation on pressure low/high event.[set]
1056 *
1057 * @param ctx Read / write interface definitions
1058 * @param val Change the values of pe in reg INTERRUPT_CFG
1059 * @retval Interface status (MANDATORY: return 0 -> no Error).
1060 *
1061 */
lps22hb_sign_of_int_threshold_set(const stmdev_ctx_t * ctx,lps22hb_pe_t val)1062 int32_t lps22hb_sign_of_int_threshold_set(const stmdev_ctx_t *ctx,
1063 lps22hb_pe_t val)
1064 {
1065 lps22hb_interrupt_cfg_t interrupt_cfg;
1066 int32_t ret;
1067
1068 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1069 (uint8_t *)&interrupt_cfg, 1);
1070
1071 if (ret == 0)
1072 {
1073 interrupt_cfg.pe = (uint8_t)val;
1074 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
1075 (uint8_t *)&interrupt_cfg, 1);
1076 }
1077
1078 return ret;
1079 }
1080
1081 /**
1082 * @brief Enable interrupt generation on pressure low/high event.[get]
1083 *
1084 * @param ctx Read / write interface definitions
1085 * @param val Get the values of pe in reg INTERRUPT_CFG
1086 * @retval Interface status (MANDATORY: return 0 -> no Error).
1087 *
1088 */
lps22hb_sign_of_int_threshold_get(const stmdev_ctx_t * ctx,lps22hb_pe_t * val)1089 int32_t lps22hb_sign_of_int_threshold_get(const stmdev_ctx_t *ctx,
1090 lps22hb_pe_t *val)
1091 {
1092 lps22hb_interrupt_cfg_t interrupt_cfg;
1093 int32_t ret;
1094
1095 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1096 (uint8_t *)&interrupt_cfg, 1);
1097
1098 switch (interrupt_cfg.pe)
1099 {
1100 case LPS22HB_NO_THRESHOLD:
1101 *val = LPS22HB_NO_THRESHOLD;
1102 break;
1103
1104 case LPS22HB_POSITIVE:
1105 *val = LPS22HB_POSITIVE;
1106 break;
1107
1108 case LPS22HB_NEGATIVE:
1109 *val = LPS22HB_NEGATIVE;
1110 break;
1111
1112 case LPS22HB_BOTH:
1113 *val = LPS22HB_BOTH;
1114 break;
1115
1116 default:
1117 *val = LPS22HB_NO_THRESHOLD;
1118 break;
1119 }
1120
1121 return ret;
1122 }
1123
1124 /**
1125 * @brief Interrupt request to the INT_SOURCE (25h) register
1126 * mode (pulsed / latched) [set]
1127 *
1128 * @param ctx Read / write interface definitions
1129 * @param val Change the values of lir in reg INTERRUPT_CFG
1130 * @retval Interface status (MANDATORY: return 0 -> no Error).
1131 *
1132 */
lps22hb_int_notification_mode_set(const stmdev_ctx_t * ctx,lps22hb_lir_t val)1133 int32_t lps22hb_int_notification_mode_set(const stmdev_ctx_t *ctx,
1134 lps22hb_lir_t val)
1135 {
1136 lps22hb_interrupt_cfg_t interrupt_cfg;
1137 int32_t ret;
1138
1139 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1140 (uint8_t *)&interrupt_cfg, 1);
1141
1142 if (ret == 0)
1143 {
1144 interrupt_cfg.lir = (uint8_t)val;
1145 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
1146 (uint8_t *)&interrupt_cfg, 1);
1147 }
1148
1149 return ret;
1150 }
1151
1152 /**
1153 * @brief Interrupt request to the INT_SOURCE (25h) register
1154 * mode (pulsed / latched) [get]
1155 *
1156 * @param ctx Read / write interface definitions
1157 * @param val Get the values of lir in reg INTERRUPT_CFG
1158 * @retval Interface status (MANDATORY: return 0 -> no Error).
1159 *
1160 */
lps22hb_int_notification_mode_get(const stmdev_ctx_t * ctx,lps22hb_lir_t * val)1161 int32_t lps22hb_int_notification_mode_get(const stmdev_ctx_t *ctx,
1162 lps22hb_lir_t *val)
1163 {
1164 lps22hb_interrupt_cfg_t interrupt_cfg;
1165 int32_t ret;
1166
1167 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1168 (uint8_t *)&interrupt_cfg, 1);
1169
1170 switch (interrupt_cfg.lir)
1171 {
1172 case LPS22HB_INT_PULSED:
1173 *val = LPS22HB_INT_PULSED;
1174 break;
1175
1176 case LPS22HB_INT_LATCHED:
1177 *val = LPS22HB_INT_LATCHED;
1178 break;
1179
1180 default:
1181 *val = LPS22HB_INT_PULSED;
1182 break;
1183 }
1184
1185 return ret;
1186 }
1187
1188 /**
1189 * @brief Enable interrupt generation.[set]
1190 *
1191 * @param ctx Read / write interface definitions
1192 * @param val Change the values of diff_en in reg INTERRUPT_CFG
1193 * @retval Interface status (MANDATORY: return 0 -> no Error).
1194 *
1195 */
lps22hb_int_generation_set(const stmdev_ctx_t * ctx,uint8_t val)1196 int32_t lps22hb_int_generation_set(const stmdev_ctx_t *ctx, uint8_t val)
1197 {
1198 lps22hb_interrupt_cfg_t interrupt_cfg;
1199 int32_t ret;
1200
1201 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1202 (uint8_t *)&interrupt_cfg, 1);
1203
1204 if (ret == 0)
1205 {
1206 interrupt_cfg.diff_en = val;
1207 ret = lps22hb_write_reg(ctx, LPS22HB_INTERRUPT_CFG,
1208 (uint8_t *)&interrupt_cfg, 1);
1209 }
1210
1211 return ret;
1212 }
1213
1214 /**
1215 * @brief Enable interrupt generation.[get]
1216 *
1217 * @param ctx Read / write interface definitions
1218 * @param val Change the values of diff_en in reg INTERRUPT_CFG
1219 * @retval Interface status (MANDATORY: return 0 -> no Error).
1220 *
1221 */
lps22hb_int_generation_get(const stmdev_ctx_t * ctx,uint8_t * val)1222 int32_t lps22hb_int_generation_get(const stmdev_ctx_t *ctx, uint8_t *val)
1223 {
1224 lps22hb_interrupt_cfg_t interrupt_cfg;
1225 int32_t ret;
1226
1227 ret = lps22hb_read_reg(ctx, LPS22HB_INTERRUPT_CFG,
1228 (uint8_t *)&interrupt_cfg, 1);
1229 *val = interrupt_cfg.diff_en;
1230
1231 return ret;
1232 }
1233
1234 /**
1235 * @brief User-defined threshold value for pressure interrupt event[set]
1236 *
1237 * @param ctx Read / write interface definitions
1238 * @param buff Buffer that contains data to write
1239 * @retval Interface status (MANDATORY: return 0 -> no Error).
1240 *
1241 */
lps22hb_int_threshold_set(const stmdev_ctx_t * ctx,uint16_t val)1242 int32_t lps22hb_int_threshold_set(const stmdev_ctx_t *ctx, uint16_t val)
1243 {
1244 uint8_t buff[2];
1245 int32_t ret;
1246
1247 buff[1] = (uint8_t)(val / 256U);
1248 buff[0] = (uint8_t)(val - (buff[1] * 256U));
1249 ret = lps22hb_write_reg(ctx, LPS22HB_THS_P_L, (uint8_t *) buff, 2);
1250
1251 return ret;
1252 }
1253
1254 /**
1255 * @brief User-defined threshold value for pressure interrupt event[get]
1256 *
1257 * @param ctx Read / write interface definitions
1258 * @param buff Buffer that stores data read
1259 * @retval Interface status (MANDATORY: return 0 -> no Error).
1260 *
1261 */
lps22hb_int_threshold_get(const stmdev_ctx_t * ctx,uint16_t * val)1262 int32_t lps22hb_int_threshold_get(const stmdev_ctx_t *ctx, uint16_t *val)
1263 {
1264 uint8_t buff[2];
1265 int32_t ret;
1266
1267 ret = lps22hb_read_reg(ctx, LPS22HB_THS_P_L, (uint8_t *) buff, 2);
1268 *val = buff[1];
1269 *val = (*val * 256) + buff[0];
1270
1271 return ret;
1272 }
1273
1274 /**
1275 * @brief Data signal on INT_DRDY pin control bits.[set]
1276 *
1277 * @param ctx Read / write interface definitions
1278 * @param val Change the values of int_s in reg CTRL_REG3
1279 * @retval Interface status (MANDATORY: return 0 -> no Error).
1280 *
1281 */
lps22hb_int_pin_mode_set(const stmdev_ctx_t * ctx,lps22hb_int_s_t val)1282 int32_t lps22hb_int_pin_mode_set(const stmdev_ctx_t *ctx,
1283 lps22hb_int_s_t val)
1284 {
1285 lps22hb_ctrl_reg3_t ctrl_reg3;
1286 int32_t ret;
1287
1288 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1289
1290 if (ret == 0)
1291 {
1292 ctrl_reg3.int_s = (uint8_t)val;
1293 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1294 }
1295
1296 return ret;
1297 }
1298
1299 /**
1300 * @brief Data signal on INT_DRDY pin control bits.[get]
1301 *
1302 * @param ctx Read / write interface definitions
1303 * @param val Get the values of int_s in reg CTRL_REG3
1304 * @retval Interface status (MANDATORY: return 0 -> no Error).
1305 *
1306 */
lps22hb_int_pin_mode_get(const stmdev_ctx_t * ctx,lps22hb_int_s_t * val)1307 int32_t lps22hb_int_pin_mode_get(const stmdev_ctx_t *ctx,
1308 lps22hb_int_s_t *val)
1309 {
1310 lps22hb_ctrl_reg3_t ctrl_reg3;
1311 int32_t ret;
1312
1313 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1314
1315 switch (ctrl_reg3.int_s)
1316 {
1317 case LPS22HB_DRDY_OR_FIFO_FLAGS:
1318 *val = LPS22HB_DRDY_OR_FIFO_FLAGS;
1319 break;
1320
1321 case LPS22HB_HIGH_PRES_INT:
1322 *val = LPS22HB_HIGH_PRES_INT;
1323 break;
1324
1325 case LPS22HB_LOW_PRES_INT:
1326 *val = LPS22HB_LOW_PRES_INT;
1327 break;
1328
1329 case LPS22HB_EVERY_PRES_INT:
1330 *val = LPS22HB_EVERY_PRES_INT;
1331 break;
1332
1333 default:
1334 *val = LPS22HB_DRDY_OR_FIFO_FLAGS;
1335 break;
1336 }
1337
1338 return ret;
1339 }
1340
1341 /**
1342 * @brief Data-ready signal on INT_DRDY pin.[set]
1343 *
1344 * @param ctx Read / write interface definitions
1345 * @param val Change the values of drdy in reg CTRL_REG3
1346 * @retval Interface status (MANDATORY: return 0 -> no Error).
1347 *
1348 */
lps22hb_drdy_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1349 int32_t lps22hb_drdy_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1350 {
1351 lps22hb_ctrl_reg3_t ctrl_reg3;
1352 int32_t ret;
1353
1354 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1355
1356 if (ret == 0)
1357 {
1358 ctrl_reg3.drdy = val;
1359 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1360 }
1361
1362 return ret;
1363 }
1364
1365 /**
1366 * @brief Data-ready signal on INT_DRDY pin.[get]
1367 *
1368 * @param ctx Read / write interface definitions
1369 * @param val Change the values of drdy in reg CTRL_REG3
1370 * @retval Interface status (MANDATORY: return 0 -> no Error).
1371 *
1372 */
lps22hb_drdy_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1373 int32_t lps22hb_drdy_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1374 {
1375 lps22hb_ctrl_reg3_t ctrl_reg3;
1376 int32_t ret;
1377
1378 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1379 *val = ctrl_reg3.drdy;
1380
1381 return ret;
1382 }
1383
1384 /**
1385 * @brief FIFO overrun interrupt on INT_DRDY pin.[set]
1386 *
1387 * @param ctx Read / write interface definitions
1388 * @param val Change the values of f_ovr in reg CTRL_REG3
1389 * @retval Interface status (MANDATORY: return 0 -> no Error).
1390 *
1391 */
lps22hb_fifo_ovr_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1392 int32_t lps22hb_fifo_ovr_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1393 {
1394 lps22hb_ctrl_reg3_t ctrl_reg3;
1395 int32_t ret;
1396
1397 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1398
1399 if (ret == 0)
1400 {
1401 ctrl_reg3.f_ovr = val;
1402 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1403 }
1404
1405 return ret;
1406 }
1407
1408 /**
1409 * @brief FIFO overrun interrupt on INT_DRDY pin.[get]
1410 *
1411 * @param ctx Read / write interface definitions
1412 * @param val Change the values of f_ovr in reg CTRL_REG3
1413 * @retval Interface status (MANDATORY: return 0 -> no Error).
1414 *
1415 */
lps22hb_fifo_ovr_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1416 int32_t lps22hb_fifo_ovr_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1417 {
1418 lps22hb_ctrl_reg3_t ctrl_reg3;
1419 int32_t ret;
1420
1421 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1422 *val = ctrl_reg3.f_ovr;
1423
1424 return ret;
1425 }
1426
1427 /**
1428 * @brief FIFO watermark status on INT_DRDY pin.[set]
1429 *
1430 * @param ctx Read / write interface definitions
1431 * @param val Change the values of f_fth in reg CTRL_REG3
1432 * @retval Interface status (MANDATORY: return 0 -> no Error).
1433 *
1434 */
lps22hb_fifo_threshold_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1435 int32_t lps22hb_fifo_threshold_on_int_set(const stmdev_ctx_t *ctx,
1436 uint8_t val)
1437 {
1438 lps22hb_ctrl_reg3_t ctrl_reg3;
1439 int32_t ret;
1440
1441 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1442
1443 if (ret == 0)
1444 {
1445 ctrl_reg3.f_fth = val;
1446 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1447 }
1448
1449 return ret;
1450 }
1451
1452 /**
1453 * @brief FIFO watermark status on INT_DRDY pin.[get]
1454 *
1455 * @param ctx Read / write interface definitions
1456 * @param val Change the values of f_fth in reg CTRL_REG3
1457 * @retval Interface status (MANDATORY: return 0 -> no Error).
1458 *
1459 */
lps22hb_fifo_threshold_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1460 int32_t lps22hb_fifo_threshold_on_int_get(const stmdev_ctx_t *ctx,
1461 uint8_t *val)
1462 {
1463 lps22hb_ctrl_reg3_t ctrl_reg3;
1464 int32_t ret;
1465
1466 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1467 *val = ctrl_reg3.f_fth;
1468
1469 return ret;
1470 }
1471
1472 /**
1473 * @brief FIFO full flag on INT_DRDY pin.[set]
1474 *
1475 * @param ctx Read / write interface definitions
1476 * @param val Change the values of f_fss5 in reg CTRL_REG3
1477 * @retval Interface status (MANDATORY: return 0 -> no Error).
1478 *
1479 */
lps22hb_fifo_full_on_int_set(const stmdev_ctx_t * ctx,uint8_t val)1480 int32_t lps22hb_fifo_full_on_int_set(const stmdev_ctx_t *ctx, uint8_t val)
1481 {
1482 lps22hb_ctrl_reg3_t ctrl_reg3;
1483 int32_t ret;
1484
1485 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1486
1487 if (ret == 0)
1488 {
1489 ctrl_reg3.f_fss5 = val;
1490 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1491 }
1492
1493 return ret;
1494 }
1495
1496 /**
1497 * @brief FIFO full flag on INT_DRDY pin.[get]
1498 *
1499 * @param ctx Read / write interface definitions
1500 * @param val Change the values of f_fss5 in reg CTRL_REG3
1501 * @retval Interface status (MANDATORY: return 0 -> no Error).
1502 *
1503 */
lps22hb_fifo_full_on_int_get(const stmdev_ctx_t * ctx,uint8_t * val)1504 int32_t lps22hb_fifo_full_on_int_get(const stmdev_ctx_t *ctx, uint8_t *val)
1505 {
1506 lps22hb_ctrl_reg3_t ctrl_reg3;
1507 int32_t ret;
1508
1509 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1510 *val = ctrl_reg3.f_fss5;
1511
1512 return ret;
1513 }
1514
1515 /**
1516 * @brief Push-pull/open drain selection on interrupt pads.[set]
1517 *
1518 * @param ctx Read / write interface definitions
1519 * @param val Change the values of pp_od in reg CTRL_REG3
1520 * @retval Interface status (MANDATORY: return 0 -> no Error).
1521 *
1522 */
lps22hb_pin_mode_set(const stmdev_ctx_t * ctx,lps22hb_pp_od_t val)1523 int32_t lps22hb_pin_mode_set(const stmdev_ctx_t *ctx, lps22hb_pp_od_t val)
1524 {
1525 lps22hb_ctrl_reg3_t ctrl_reg3;
1526 int32_t ret;
1527
1528 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1529
1530 if (ret == 0)
1531 {
1532 ctrl_reg3.pp_od = (uint8_t)val;
1533 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1534 }
1535
1536 return ret;
1537 }
1538
1539 /**
1540 * @brief Push-pull/open drain selection on interrupt pads.[get]
1541 *
1542 * @param ctx Read / write interface definitions
1543 * @param val Get the values of pp_od in reg CTRL_REG3
1544 * @retval Interface status (MANDATORY: return 0 -> no Error).
1545 *
1546 */
lps22hb_pin_mode_get(const stmdev_ctx_t * ctx,lps22hb_pp_od_t * val)1547 int32_t lps22hb_pin_mode_get(const stmdev_ctx_t *ctx, lps22hb_pp_od_t *val)
1548 {
1549 lps22hb_ctrl_reg3_t ctrl_reg3;
1550 int32_t ret;
1551
1552 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1553
1554 switch (ctrl_reg3.pp_od)
1555 {
1556 case LPS22HB_PUSH_PULL:
1557 *val = LPS22HB_PUSH_PULL;
1558 break;
1559
1560 case LPS22HB_OPEN_DRAIN:
1561 *val = LPS22HB_OPEN_DRAIN;
1562 break;
1563
1564 default:
1565 *val = LPS22HB_PUSH_PULL;
1566 break;
1567 }
1568
1569 return ret;
1570 }
1571
1572 /**
1573 * @brief Interrupt active-high/low.[set]
1574 *
1575 * @param ctx Read / write interface definitions
1576 * @param val Change the values of int_h_l in reg CTRL_REG3
1577 * @retval Interface status (MANDATORY: return 0 -> no Error).
1578 *
1579 */
lps22hb_int_polarity_set(const stmdev_ctx_t * ctx,lps22hb_int_h_l_t val)1580 int32_t lps22hb_int_polarity_set(const stmdev_ctx_t *ctx,
1581 lps22hb_int_h_l_t val)
1582 {
1583 lps22hb_ctrl_reg3_t ctrl_reg3;
1584 int32_t ret;
1585
1586 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1587
1588 if (ret == 0)
1589 {
1590 ctrl_reg3.int_h_l = (uint8_t)val;
1591 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1592 }
1593
1594 return ret;
1595 }
1596
1597 /**
1598 * @brief Interrupt active-high/low.[get]
1599 *
1600 * @param ctx Read / write interface definitions
1601 * @param val Get the values of int_h_l in reg CTRL_REG3
1602 * @retval Interface status (MANDATORY: return 0 -> no Error).
1603 *
1604 */
lps22hb_int_polarity_get(const stmdev_ctx_t * ctx,lps22hb_int_h_l_t * val)1605 int32_t lps22hb_int_polarity_get(const stmdev_ctx_t *ctx,
1606 lps22hb_int_h_l_t *val)
1607 {
1608 lps22hb_ctrl_reg3_t ctrl_reg3;
1609 int32_t ret;
1610
1611 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG3, (uint8_t *)&ctrl_reg3, 1);
1612
1613 switch (ctrl_reg3.int_h_l)
1614 {
1615 case LPS22HB_ACTIVE_HIGH:
1616 *val = LPS22HB_ACTIVE_HIGH;
1617 break;
1618
1619 case LPS22HB_ACTIVE_LOW:
1620 *val = LPS22HB_ACTIVE_LOW;
1621 break;
1622
1623 default:
1624 *val = LPS22HB_ACTIVE_HIGH;
1625 break;
1626 }
1627
1628 return ret;
1629 }
1630
1631 /**
1632 * @brief Interrupt source register[get]
1633 *
1634 * @param ctx Read / write interface definitions
1635 * @param val Register INT_SOURCE
1636 * @retval Interface status (MANDATORY: return 0 -> no Error).
1637 *
1638 */
lps22hb_int_source_get(const stmdev_ctx_t * ctx,lps22hb_int_source_t * val)1639 int32_t lps22hb_int_source_get(const stmdev_ctx_t *ctx,
1640 lps22hb_int_source_t *val)
1641 {
1642 int32_t ret;
1643
1644 ret = lps22hb_read_reg(ctx, LPS22HB_INT_SOURCE, (uint8_t *) val, 1);
1645
1646 return ret;
1647 }
1648
1649 /**
1650 * @brief Differential pressure high interrupt flag.[get]
1651 *
1652 * @param ctx Read / write interface definitions
1653 * @param val Change the values of ph in reg INT_SOURCE
1654 * @retval Interface status (MANDATORY: return 0 -> no Error).
1655 *
1656 */
lps22hb_int_on_press_high_get(const stmdev_ctx_t * ctx,uint8_t * val)1657 int32_t lps22hb_int_on_press_high_get(const stmdev_ctx_t *ctx, uint8_t *val)
1658 {
1659 lps22hb_int_source_t int_source;
1660 int32_t ret;
1661
1662 ret = lps22hb_read_reg(ctx, LPS22HB_INT_SOURCE,
1663 (uint8_t *)&int_source, 1);
1664 *val = int_source.ph;
1665
1666 return ret;
1667 }
1668
1669 /**
1670 * @brief Differential pressure low interrupt flag.[get]
1671 *
1672 * @param ctx Read / write interface definitions
1673 * @param val Change the values of pl in reg INT_SOURCE
1674 * @retval Interface status (MANDATORY: return 0 -> no Error).
1675 *
1676 */
lps22hb_int_on_press_low_get(const stmdev_ctx_t * ctx,uint8_t * val)1677 int32_t lps22hb_int_on_press_low_get(const stmdev_ctx_t *ctx, uint8_t *val)
1678 {
1679 lps22hb_int_source_t int_source;
1680 int32_t ret;
1681
1682 ret = lps22hb_read_reg(ctx, LPS22HB_INT_SOURCE,
1683 (uint8_t *)&int_source, 1);
1684 *val = int_source.pl;
1685
1686 return ret;
1687 }
1688
1689 /**
1690 * @brief Interrupt active flag.[get]
1691 *
1692 * @param ctx Read / write interface definitions
1693 * @param val Change the values of ia in reg INT_SOURCE
1694 * @retval Interface status (MANDATORY: return 0 -> no Error).
1695 *
1696 */
lps22hb_interrupt_event_get(const stmdev_ctx_t * ctx,uint8_t * val)1697 int32_t lps22hb_interrupt_event_get(const stmdev_ctx_t *ctx, uint8_t *val)
1698 {
1699 lps22hb_int_source_t int_source;
1700 int32_t ret;
1701
1702 ret = lps22hb_read_reg(ctx, LPS22HB_INT_SOURCE,
1703 (uint8_t *)&int_source, 1);
1704 *val = int_source.ia;
1705
1706 return ret;
1707 }
1708
1709 /**
1710 * @}
1711 *
1712 */
1713
1714 /**
1715 * @defgroup LPS22HB_fifo
1716 * @brief This section group all the functions concerning the
1717 * fifo usage
1718 * @{
1719 *
1720 */
1721
1722 /**
1723 * @brief Stop on FIFO watermark. Enable FIFO watermark level use.[set]
1724 *
1725 * @param ctx Read / write interface definitions
1726 * @param val Change the values of stop_on_fth in reg CTRL_REG2
1727 * @retval Interface status (MANDATORY: return 0 -> no Error).
1728 *
1729 */
lps22hb_stop_on_fifo_threshold_set(const stmdev_ctx_t * ctx,uint8_t val)1730 int32_t lps22hb_stop_on_fifo_threshold_set(const stmdev_ctx_t *ctx,
1731 uint8_t val)
1732 {
1733 lps22hb_ctrl_reg2_t ctrl_reg2;
1734 int32_t ret;
1735
1736 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1737
1738 if (ret == 0)
1739 {
1740 ctrl_reg2.stop_on_fth = val;
1741 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1742 }
1743
1744 return ret;
1745 }
1746
1747 /**
1748 * @brief Stop on FIFO watermark. Enable FIFO watermark level use.[get]
1749 *
1750 * @param ctx Read / write interface definitions
1751 * @param val Change the values of stop_on_fth in reg CTRL_REG2
1752 * @retval Interface status (MANDATORY: return 0 -> no Error).
1753 *
1754 */
lps22hb_stop_on_fifo_threshold_get(const stmdev_ctx_t * ctx,uint8_t * val)1755 int32_t lps22hb_stop_on_fifo_threshold_get(const stmdev_ctx_t *ctx,
1756 uint8_t *val)
1757 {
1758 lps22hb_ctrl_reg2_t ctrl_reg2;
1759 int32_t ret;
1760
1761 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1762 *val = ctrl_reg2.stop_on_fth;
1763
1764 return ret;
1765 }
1766
1767 /**
1768 * @brief FIFO enable.[set]
1769 *
1770 * @param ctx Read / write interface definitions
1771 * @param val Change the values of fifo_en in reg CTRL_REG2
1772 * @retval Interface status (MANDATORY: return 0 -> no Error).
1773 *
1774 */
lps22hb_fifo_set(const stmdev_ctx_t * ctx,uint8_t val)1775 int32_t lps22hb_fifo_set(const stmdev_ctx_t *ctx, uint8_t val)
1776 {
1777 lps22hb_ctrl_reg2_t ctrl_reg2;
1778 int32_t ret;
1779
1780 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1781
1782 if (ret == 0)
1783 {
1784 ctrl_reg2.fifo_en = val;
1785 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1786 }
1787
1788 return ret;
1789 }
1790
1791 /**
1792 * @brief FIFO enable.[get]
1793 *
1794 * @param ctx Read / write interface definitions
1795 * @param val Change the values of fifo_en in reg CTRL_REG2
1796 * @retval Interface status (MANDATORY: return 0 -> no Error).
1797 *
1798 */
lps22hb_fifo_get(const stmdev_ctx_t * ctx,uint8_t * val)1799 int32_t lps22hb_fifo_get(const stmdev_ctx_t *ctx, uint8_t *val)
1800 {
1801 lps22hb_ctrl_reg2_t ctrl_reg2;
1802 int32_t ret;
1803
1804 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
1805 *val = ctrl_reg2.fifo_en;
1806
1807 return ret;
1808 }
1809
1810 /**
1811 * @brief FIFO watermark level selection.[set]
1812 *
1813 * @param ctx Read / write interface definitions
1814 * @param val Change the values of wtm in reg FIFO_CTRL
1815 * @retval Interface status (MANDATORY: return 0 -> no Error).
1816 *
1817 */
lps22hb_fifo_watermark_set(const stmdev_ctx_t * ctx,uint8_t val)1818 int32_t lps22hb_fifo_watermark_set(const stmdev_ctx_t *ctx, uint8_t val)
1819 {
1820 lps22hb_fifo_ctrl_t fifo_ctrl;
1821 int32_t ret;
1822
1823 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1824
1825 if (ret == 0)
1826 {
1827 fifo_ctrl.wtm = val;
1828 ret = lps22hb_write_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1829 }
1830
1831 return ret;
1832 }
1833
1834 /**
1835 * @brief FIFO watermark level selection.[get]
1836 *
1837 * @param ctx Read / write interface definitions
1838 * @param val Change the values of wtm in reg FIFO_CTRL
1839 * @retval Interface status (MANDATORY: return 0 -> no Error).
1840 *
1841 */
lps22hb_fifo_watermark_get(const stmdev_ctx_t * ctx,uint8_t * val)1842 int32_t lps22hb_fifo_watermark_get(const stmdev_ctx_t *ctx, uint8_t *val)
1843 {
1844 lps22hb_fifo_ctrl_t fifo_ctrl;
1845 int32_t ret;
1846
1847 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1848 *val = fifo_ctrl.wtm;
1849
1850 return ret;
1851 }
1852
1853 /**
1854 * @brief FIFO mode selection.[set]
1855 *
1856 * @param ctx Read / write interface definitions
1857 * @param val Change the values of f_mode in reg FIFO_CTRL
1858 * @retval Interface status (MANDATORY: return 0 -> no Error).
1859 *
1860 */
lps22hb_fifo_mode_set(const stmdev_ctx_t * ctx,lps22hb_f_mode_t val)1861 int32_t lps22hb_fifo_mode_set(const stmdev_ctx_t *ctx, lps22hb_f_mode_t val)
1862 {
1863 lps22hb_fifo_ctrl_t fifo_ctrl;
1864 int32_t ret;
1865
1866 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1867
1868 if (ret == 0)
1869 {
1870 fifo_ctrl.f_mode = (uint8_t)val;
1871 ret = lps22hb_write_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1872 }
1873
1874 return ret;
1875 }
1876
1877 /**
1878 * @brief FIFO mode selection.[get]
1879 *
1880 * @param ctx Read / write interface definitions
1881 * @param val Get the values of f_mode in reg FIFO_CTRL
1882 * @retval Interface status (MANDATORY: return 0 -> no Error).
1883 *
1884 */
lps22hb_fifo_mode_get(const stmdev_ctx_t * ctx,lps22hb_f_mode_t * val)1885 int32_t lps22hb_fifo_mode_get(const stmdev_ctx_t *ctx,
1886 lps22hb_f_mode_t *val)
1887 {
1888 lps22hb_fifo_ctrl_t fifo_ctrl;
1889 int32_t ret;
1890
1891 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_CTRL, (uint8_t *)&fifo_ctrl, 1);
1892
1893 switch (fifo_ctrl.f_mode)
1894 {
1895 case LPS22HB_BYPASS_MODE:
1896 *val = LPS22HB_BYPASS_MODE;
1897 break;
1898
1899 case LPS22HB_FIFO_MODE:
1900 *val = LPS22HB_FIFO_MODE;
1901 break;
1902
1903 case LPS22HB_STREAM_MODE:
1904 *val = LPS22HB_STREAM_MODE;
1905 break;
1906
1907 case LPS22HB_STREAM_TO_FIFO_MODE:
1908 *val = LPS22HB_STREAM_TO_FIFO_MODE;
1909 break;
1910
1911 case LPS22HB_BYPASS_TO_STREAM_MODE:
1912 *val = LPS22HB_BYPASS_TO_STREAM_MODE;
1913 break;
1914
1915 case LPS22HB_DYNAMIC_STREAM_MODE:
1916 *val = LPS22HB_DYNAMIC_STREAM_MODE;
1917 break;
1918
1919 case LPS22HB_BYPASS_TO_FIFO_MODE:
1920 *val = LPS22HB_BYPASS_TO_FIFO_MODE;
1921 break;
1922
1923 default:
1924 *val = LPS22HB_BYPASS_MODE;
1925 break;
1926 }
1927
1928 return ret;
1929 }
1930
1931 /**
1932 * @brief FIFO stored data level.[get]
1933 *
1934 * @param ctx Read / write interface definitions
1935 * @param val Change the values of fss in reg FIFO_STATUS
1936 * @retval Interface status (MANDATORY: return 0 -> no Error).
1937 *
1938 */
lps22hb_fifo_data_level_get(const stmdev_ctx_t * ctx,uint8_t * val)1939 int32_t lps22hb_fifo_data_level_get(const stmdev_ctx_t *ctx, uint8_t *val)
1940 {
1941 lps22hb_fifo_status_t fifo_status;
1942 int32_t ret;
1943
1944 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_STATUS,
1945 (uint8_t *)&fifo_status, 1);
1946 *val = fifo_status.fss;
1947
1948 return ret;
1949 }
1950
1951 /**
1952 * @brief FIFO overrun status.[get]
1953 *
1954 * @param ctx Read / write interface definitions
1955 * @param val Change the values of ovr in reg FIFO_STATUS
1956 * @retval Interface status (MANDATORY: return 0 -> no Error).
1957 *
1958 */
lps22hb_fifo_ovr_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)1959 int32_t lps22hb_fifo_ovr_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
1960 {
1961 lps22hb_fifo_status_t fifo_status;
1962 int32_t ret;
1963
1964 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_STATUS,
1965 (uint8_t *)&fifo_status, 1);
1966 *val = fifo_status.ovr;
1967
1968 return ret;
1969 }
1970
1971 /**
1972 * @brief FIFO watermark status.[get]
1973 *
1974 * @param ctx Read / write interface definitions
1975 * @param val Change the values of fth_fifo in reg FIFO_STATUS
1976 * @retval Interface status (MANDATORY: return 0 -> no Error).
1977 *
1978 */
lps22hb_fifo_fth_flag_get(const stmdev_ctx_t * ctx,uint8_t * val)1979 int32_t lps22hb_fifo_fth_flag_get(const stmdev_ctx_t *ctx, uint8_t *val)
1980 {
1981 lps22hb_fifo_status_t fifo_status;
1982 int32_t ret;
1983
1984 ret = lps22hb_read_reg(ctx, LPS22HB_FIFO_STATUS,
1985 (uint8_t *)&fifo_status, 1);
1986 *val = fifo_status.fth_fifo;
1987
1988 return ret;
1989 }
1990
1991 /**
1992 * @}
1993 *
1994 */
1995
1996 /**
1997 * @defgroup LPS22HB_serial_interface
1998 * @brief This section group all the functions concerning serial
1999 * interface management
2000 * @{
2001 *
2002 */
2003
2004 /**
2005 * @brief SPI Serial Interface Mode selection.[set]
2006 *
2007 * @param ctx Read / write interface definitions
2008 * @param val Change the values of sim in reg CTRL_REG1
2009 * @retval Interface status (MANDATORY: return 0 -> no Error).
2010 *
2011 */
lps22hb_spi_mode_set(const stmdev_ctx_t * ctx,lps22hb_sim_t val)2012 int32_t lps22hb_spi_mode_set(const stmdev_ctx_t *ctx, lps22hb_sim_t val)
2013 {
2014 lps22hb_ctrl_reg1_t ctrl_reg1;
2015 int32_t ret;
2016
2017 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
2018
2019 if (ret == 0)
2020 {
2021 ctrl_reg1.sim = (uint8_t)val;
2022 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
2023 }
2024
2025 return ret;
2026 }
2027
2028 /**
2029 * @brief SPI Serial Interface Mode selection.[get]
2030 *
2031 * @param ctx Read / write interface definitions
2032 * @param val Get the values of sim in reg CTRL_REG1
2033 * @retval Interface status (MANDATORY: return 0 -> no Error).
2034 *
2035 */
lps22hb_spi_mode_get(const stmdev_ctx_t * ctx,lps22hb_sim_t * val)2036 int32_t lps22hb_spi_mode_get(const stmdev_ctx_t *ctx, lps22hb_sim_t *val)
2037 {
2038 lps22hb_ctrl_reg1_t ctrl_reg1;
2039 int32_t ret;
2040
2041 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
2042
2043 switch (ctrl_reg1.sim)
2044 {
2045 case LPS22HB_SPI_4_WIRE:
2046 *val = LPS22HB_SPI_4_WIRE;
2047 break;
2048
2049 case LPS22HB_SPI_3_WIRE:
2050 *val = LPS22HB_SPI_3_WIRE;
2051 break;
2052
2053 default:
2054 *val = LPS22HB_SPI_4_WIRE;
2055 break;
2056 }
2057
2058 return ret;
2059 }
2060
2061 /**
2062 * @brief Disable I2C interface.[set]
2063 *
2064 * @param ctx Read / write interface definitions
2065 * @param val Change the values of i2c_dis in reg CTRL_REG2
2066 * @retval Interface status (MANDATORY: return 0 -> no Error).
2067 *
2068 */
lps22hb_i2c_interface_set(const stmdev_ctx_t * ctx,lps22hb_i2c_dis_t val)2069 int32_t lps22hb_i2c_interface_set(const stmdev_ctx_t *ctx,
2070 lps22hb_i2c_dis_t val)
2071 {
2072 lps22hb_ctrl_reg2_t ctrl_reg2;
2073 int32_t ret;
2074
2075 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2076
2077 if (ret == 0)
2078 {
2079 ctrl_reg2.i2c_dis = (uint8_t)val;
2080 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2081 }
2082
2083 return ret;
2084 }
2085
2086 /**
2087 * @brief Disable I2C interface.[get]
2088 *
2089 * @param ctx Read / write interface definitions
2090 * @param val Get the values of i2c_dis in reg CTRL_REG2
2091 * @retval Interface status (MANDATORY: return 0 -> no Error).
2092 *
2093 */
lps22hb_i2c_interface_get(const stmdev_ctx_t * ctx,lps22hb_i2c_dis_t * val)2094 int32_t lps22hb_i2c_interface_get(const stmdev_ctx_t *ctx,
2095 lps22hb_i2c_dis_t *val)
2096 {
2097 lps22hb_ctrl_reg2_t ctrl_reg2;
2098 int32_t ret;
2099
2100 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2101
2102 switch (ctrl_reg2.i2c_dis)
2103 {
2104 case LPS22HB_I2C_ENABLE:
2105 *val = LPS22HB_I2C_ENABLE;
2106 break;
2107
2108 case LPS22HB_I2C_DISABLE:
2109 *val = LPS22HB_I2C_DISABLE;
2110 break;
2111
2112 default:
2113 *val = LPS22HB_I2C_ENABLE;
2114 break;
2115 }
2116
2117 return ret;
2118 }
2119
2120 /**
2121 * @brief Register address automatically incremented during a
2122 * multiple byte access with a serial interface (I2C or SPI).[set]
2123 *
2124 * @param ctx Read / write interface definitions
2125 * @param val Change the values of if_add_inc in reg CTRL_REG2
2126 * @retval Interface status (MANDATORY: return 0 -> no Error).
2127 *
2128 */
lps22hb_auto_add_inc_set(const stmdev_ctx_t * ctx,uint8_t val)2129 int32_t lps22hb_auto_add_inc_set(const stmdev_ctx_t *ctx, uint8_t val)
2130 {
2131 lps22hb_ctrl_reg2_t ctrl_reg2;
2132 int32_t ret;
2133
2134 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2135
2136 if (ret == 0)
2137 {
2138 ctrl_reg2.if_add_inc = val;
2139 ret = lps22hb_write_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2140 }
2141
2142 return ret;
2143 }
2144
2145 /**
2146 * @brief Register address automatically incremented during a
2147 * multiple byte access with a serial interface (I2C or SPI).[get]
2148 *
2149 * @param ctx Read / write interface definitions
2150 * @param val Change the values of if_add_inc in reg CTRL_REG2
2151 * @retval Interface status (MANDATORY: return 0 -> no Error).
2152 *
2153 */
lps22hb_auto_add_inc_get(const stmdev_ctx_t * ctx,uint8_t * val)2154 int32_t lps22hb_auto_add_inc_get(const stmdev_ctx_t *ctx, uint8_t *val)
2155 {
2156 lps22hb_ctrl_reg2_t ctrl_reg2;
2157 int32_t ret;
2158
2159 ret = lps22hb_read_reg(ctx, LPS22HB_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
2160 *val = ctrl_reg2.if_add_inc;
2161
2162 return ret;
2163 }
2164
2165 /**
2166 * @}
2167 *
2168 */
2169
2170 /**
2171 * @}
2172 *
2173 */
2174
2175 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2176
