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Searched defs:loopDivider (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.h1221 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1228 uint8_t loopDivider; /*!< PLL loop divider. member
1238 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1252 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1262 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1275 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.h1194 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1201 uint8_t loopDivider; /*!< PLL loop divider. member
1211 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1226 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1236 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1250 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.h1185 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1192 uint8_t loopDivider; /*!< PLL loop divider. member
1202 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1216 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1226 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1240 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.h1195 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1202 uint8_t loopDivider; /*!< PLL loop divider. member
1212 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1227 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1237 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1251 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.h1185 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1192 uint8_t loopDivider; /*!< PLL loop divider. member
1202 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1216 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1226 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1240 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.h1222 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1229 uint8_t loopDivider; /*!< PLL loop divider. member
1239 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1253 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1263 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1276 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.h1222 …uint32_t loopDivider; /*!< PLL loop divider. Valid range for divider value: 54-108. Fout=Fin*loopD… member
1229 uint8_t loopDivider; /*!< PLL loop divider. member
1239 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1253 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1263 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1276 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.h846 uint8_t loopDivider; /*!< PLL loop divider. member
856 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
871 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
886 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.h911 uint8_t loopDivider; /*!< PLL loop divider. member
921 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
936 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
951 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_clock.h1056 uint8_t loopDivider; /*!< PLL loop divider. member
1066 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1081 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1096 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_clock.h1050 uint8_t loopDivider; /*!< PLL loop divider. member
1060 uint8_t loopDivider; /*!< PLL loop divider. Intended to be 1 (528M). member
1075 uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54. */ member
1090 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.h1778 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1784 uint8_t loopDivider; /*!< PLL loop divider. member
1820 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1835 uint8_t loopDivider; /*!< PLL loop divider. */ member
1848 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.h1778 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1784 uint8_t loopDivider; /*!< PLL loop divider. member
1820 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1835 uint8_t loopDivider; /*!< PLL loop divider. */ member
1848 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.h1746 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1752 uint8_t loopDivider; /*!< PLL loop divider. member
1788 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1803 uint8_t loopDivider; /*!< PLL loop divider. */ member
1816 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.h1778 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1784 uint8_t loopDivider; /*!< PLL loop divider. member
1820 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1835 uint8_t loopDivider; /*!< PLL loop divider. */ member
1848 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.h1778 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1784 uint8_t loopDivider; /*!< PLL loop divider. member
1820 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1835 uint8_t loopDivider; /*!< PLL loop divider. */ member
1848 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.h1778 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1784 uint8_t loopDivider; /*!< PLL loop divider. member
1820 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1835 uint8_t loopDivider; /*!< PLL loop divider. */ member
1848 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.h1746 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1752 uint8_t loopDivider; /*!< PLL loop divider. member
1788 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
1803 uint8_t loopDivider; /*!< PLL loop divider. */ member
1816 uint8_t loopDivider; /*!< Controls the frequency of the ENET0 reference clock. member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.h1287 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1293 uint8_t loopDivider; /*!< PLL loop divider. member
1329 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.h1287 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1293 uint8_t loopDivider; /*!< PLL loop divider. member
1329 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.h1287 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1293 uint8_t loopDivider; /*!< PLL loop divider. member
1329 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.h1287 uint32_t loopDivider; /*!< PLL loop divider. Valid range: 104-208. */ member
1293 uint8_t loopDivider; /*!< PLL loop divider. member
1329 …uint8_t loopDivider; /*!< PLL loop divider. Valid range for DIV_SELECT divider value: 27~54.… member