1 /** @file
2 * @brief Architecture-specific relocations for RISC-V instruction sets.
3 */
4 /*
5 * Copyright (c) 2024 CISPA Helmholtz Center for Information Security gGmbH
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9 #include <zephyr/llext/elf.h>
10 #include <zephyr/llext/llext.h>
11 #include <zephyr/llext/llext_internal.h>
12 #include <zephyr/llext/loader.h>
13
14 #include <zephyr/logging/log.h>
15 #include <zephyr/sys/util.h>
16
17 #include <zephyr/arch/riscv/elf.h>
18
19 #include <stdlib.h>
20
21 LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
22
23 /*
24 * RISC-V relocations commonly use pairs of U-type and I-type instructions.
25 * U-type instructions have 20-bit immediates, I-type instructions have 12-bit immediates.
26 * Immediates in RISC-V are always sign-extended.
27 * Thereby, this type of relocation can reach any address within a 2^31-1 byte range.
28 */
29 #define RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE INT32_MAX
30
31 /* S-type has 12-bit signed immediate */
32 #define RISCV_MAX_JUMP_DISTANCE_S_TYPE ((1 << 11) - 1)
33
34 /* I-type has 12-bit signed immediate also */
35 #define RISCV_MAX_JUMP_DISTANCE_I_TYPE ((1 << 11) - 1)
36
37 /* B-type has 13-bit signed immediate */
38 #define RISCV_MAX_JUMP_DISTANCE_B_TYPE ((1 << 12) - 1)
39
40 /* CB-type has 9-bit signed immediate */
41 #define RISCV_MAX_JUMP_DISTANCE_CB_TYPE ((1 << 8) - 1)
42
43 /* CJ-type has 12-bit signed immediate (last bit implicit 0) */
44 #define RISCV_MAX_JUMP_DISTANCE_CJ_TYPE ((1 << 11) - 1)
45
riscv_relocation_fits(long long jump_target,long long max_distance,elf_word reloc_type)46 static inline int riscv_relocation_fits(long long jump_target, long long max_distance,
47 elf_word reloc_type)
48 {
49 /*
50 * two's complement encoding
51 * e.g., [-128=0b10000000, 127=0b01111111] encodable with 8 bits
52 */
53 if (jump_target < 0) {
54 max_distance++;
55 }
56 if (llabs(jump_target) > max_distance) {
57 LOG_ERR("%lld byte relocation is not possible for type %" PRIu64 " (max %lld)!",
58 jump_target, (uint64_t)reloc_type, max_distance);
59 return -ENOEXEC; /* jump too far */
60 }
61
62 return 0;
63 }
64
65 static size_t riscv_last_rel_idx;
66
67 /**
68 * @brief On RISC-V, PC-relative relocations (PCREL_LO12_I, PCREL_LO12_S) do not refer to
69 * the actual symbol. Instead, they refer to the location of a different instruction in the
70 * same section, which has a PCREL_HI20 relocation. The relocation offset is then computed based
71 * on the location and symbol from the HI20 relocation. 20 bits from the offset go into the
72 * instruction that has the HI20 relocation, and 12 bits go into the PCREL_LO12 instruction.
73 *
74 * @param[in] ldr llext loader
75 * @param[in] ext current extension
76 * @param[in] pcrel_lo12 the elf relocation structure for the PCREL_LO12I/S relocation.
77 * @param[in] shdr ELF section header for the relocation
78 * @param[in] sym ELF symbol for PCREL_LO12I
79 * @param[out] link_addr_out computed link address
80 *
81 */
llext_riscv_find_sym_pcrel(struct llext_loader * ldr,struct llext * ext,const elf_rela_t * pcrel_lo12,const elf_shdr_t * shdr,const elf_sym_t * sym,intptr_t * link_addr_out)82 static int llext_riscv_find_sym_pcrel(struct llext_loader *ldr, struct llext *ext,
83 const elf_rela_t *pcrel_lo12, const elf_shdr_t *shdr,
84 const elf_sym_t *sym, intptr_t *link_addr_out)
85 {
86 int ret;
87 elf_rela_t candidate;
88 uintptr_t candidate_loc;
89 elf_word reloc_type;
90 elf_sym_t candidate_sym;
91 uintptr_t link_addr;
92 const char *symbol_name;
93 int iteration_start = riscv_last_rel_idx;
94 bool is_first = true;
95 const elf_word rel_cnt = shdr->sh_size / shdr->sh_entsize;
96 const uintptr_t sect_base = (uintptr_t)llext_loaded_sect_ptr(ldr, ext, shdr->sh_info);
97 bool found_candidate = false;
98
99 if (iteration_start >= rel_cnt) {
100 /* value left over from a different section */
101 iteration_start = 0;
102 }
103
104 reloc_type = ELF32_R_TYPE(pcrel_lo12->r_info);
105
106 if (reloc_type != R_RISCV_PCREL_LO12_I && reloc_type != R_RISCV_PCREL_LO12_S) {
107 /* this function does not apply - the symbol is already correct */
108 return 0;
109 }
110
111 for (int i = iteration_start; i != iteration_start || is_first; i++) {
112
113 is_first = false;
114
115 /* get each relocation entry */
116 ret = llext_seek(ldr, shdr->sh_offset + i * shdr->sh_entsize);
117 if (ret != 0) {
118 return ret;
119 }
120
121 ret = llext_read(ldr, &candidate, shdr->sh_entsize);
122 if (ret != 0) {
123 return ret;
124 }
125
126 /* FIXME currently, RISC-V relocations all fit in ELF_32_R_TYPE */
127 reloc_type = ELF32_R_TYPE(candidate.r_info);
128
129 candidate_loc = sect_base + candidate.r_offset;
130
131 /*
132 * RISC-V ELF specification: "value" of the symbol for the PCREL_LO12 relocation
133 * is actually the offset of the PCREL_HI20 relocation instruction from section
134 * start
135 */
136 if (candidate.r_offset == sym->st_value && reloc_type == R_RISCV_PCREL_HI20) {
137 found_candidate = true;
138
139 /*
140 * start here in next iteration
141 * it is fairly likely (albeit not guaranteed) that we require PCREL_HI20
142 * relocations in order
143 * we can safely write this even if an error occurs after the loop -
144 * in that case,we can safely abort the execution anyway
145 */
146 riscv_last_rel_idx = i;
147
148 break;
149 }
150
151 if (i + 1 >= rel_cnt) {
152 /* wrap around and search in previously processed indices as well */
153 i = -1;
154 }
155 }
156
157 if (!found_candidate) {
158 LOG_ERR("Could not find R_RISCV_PCREL_HI20 relocation for "
159 "R_RISCV_PCREL_LO12 relocation!");
160 return -ENOEXEC;
161 }
162
163 /* we found a match - need to compute the relocation for this instruction */
164 /* lower 12 bits go to the PCREL_LO12 relocation */
165
166 /* get corresponding / "actual" symbol */
167 ret = llext_seek(ldr, ldr->sects[LLEXT_MEM_SYMTAB].sh_offset +
168 ELF_R_SYM(candidate.r_info) * sizeof(elf_sym_t));
169 if (ret != 0) {
170 return ret;
171 }
172
173 ret = llext_read(ldr, &candidate_sym, sizeof(elf_sym_t));
174 if (ret != 0) {
175 return ret;
176 }
177
178 symbol_name = llext_symbol_name(ldr, ext, &candidate_sym);
179
180 ret = llext_lookup_symbol(ldr, ext, &link_addr, &candidate, &candidate_sym,
181 symbol_name, shdr);
182
183 if (ret != 0) {
184 return ret;
185 }
186
187 *link_addr_out = (intptr_t)(link_addr + candidate.r_addend - candidate_loc); /* S + A - P */
188
189 /* found the matching entry */
190 return 0;
191 }
192
193 /**
194 * @brief RISC-V specific function for relocating partially linked ELF binaries
195 *
196 * This implementation follows the official RISC-V specification:
197 * https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
198 *
199 */
arch_elf_relocate(struct llext_loader * ldr,struct llext * ext,elf_rela_t * rel,const elf_shdr_t * shdr)200 int arch_elf_relocate(struct llext_loader *ldr, struct llext *ext, elf_rela_t *rel,
201 const elf_shdr_t *shdr)
202 {
203 /* FIXME currently, RISC-V relocations all fit in ELF_32_R_TYPE */
204 elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
205 const uintptr_t load_bias = (uintptr_t)ext->mem[LLEXT_MEM_TEXT];
206 const uintptr_t loc_unsigned = llext_get_reloc_instruction_location(ldr, ext,
207 shdr->sh_info, rel);
208 elf_sym_t sym;
209 uintptr_t sym_base_addr_unsigned;
210 const char *sym_name;
211 int ret;
212
213 ret = llext_read_symbol(ldr, ext, rel, &sym);
214 if (ret != 0) {
215 LOG_ERR("Could not read symbol from binary!");
216 return ret;
217 }
218
219 sym_name = llext_symbol_name(ldr, ext, &sym);
220 ret = llext_lookup_symbol(ldr, ext, &sym_base_addr_unsigned, rel, &sym, sym_name, shdr);
221
222 if (ret != 0) {
223 LOG_ERR("Could not find symbol %s!", sym_name);
224 return ret;
225 }
226 /*
227 * The RISC-V specification uses the following symbolic names for the relocations:
228 *
229 * A - addend (rel->r_addend)
230 * B - base address (load_bias)
231 * G - global offset table (not supported yet)
232 * P - position of the relocation (loc)
233 * S - symbol value (sym_base_addr)
234 * V - value at the relocation position (*loc)
235 * GP - value of __global_pointer$ (not supported yet)
236 * TLSMODULE - TLS module for the object (not supported yet)
237 * TLSOFFSET - TLS static block for the object (not supported yet)
238 */
239 intptr_t loc = (intptr_t)loc_unsigned;
240 uint8_t *loc8 = (uint8_t *)loc, tmp8;
241 uint16_t *loc16 = (uint16_t *)loc, tmp16;
242 uint32_t *loc32 = (uint32_t *)loc, tmp32;
243 uint64_t *loc64 = (uint64_t *)loc, tmp64;
244 /* uint32_t or uint64_t */
245 r_riscv_wordclass_t *loc_word = (r_riscv_wordclass_t *)loc;
246 uint32_t modified_operand;
247 uint16_t modified_compressed_operand;
248 int32_t imm8;
249 long long original_imm8, jump_target;
250 int16_t compressed_imm8;
251 __typeof__(rel->r_addend) target_alignment = 1;
252 intptr_t sym_base_addr = (intptr_t)sym_base_addr_unsigned;
253
254 /*
255 * For HI20/LO12 ("PCREL") relocation pairs, we need a helper function to
256 * determine the address for the LO12 relocation, as it depends on the
257 * value in the HI20 relocation.
258 */
259 ret = llext_riscv_find_sym_pcrel(ldr, ext, rel, shdr, &sym, &sym_base_addr);
260
261 if (ret != 0) {
262 LOG_ERR("Failed to resolve RISC-V PCREL relocation for symbol %s at %p "
263 "with base address %p load address %p type %" PRIu64,
264 sym_name, (void *)loc, (void *)sym_base_addr, (void *)load_bias,
265 (uint64_t)reloc_type);
266 return ret;
267 }
268
269 LOG_DBG("Relocating symbol %s at %p with base address %p load address %p type %" PRIu64,
270 sym_name, (void *)loc, (void *)sym_base_addr, (void *)load_bias,
271 (uint64_t)reloc_type);
272
273 /* FIXME not all types of relocations currently supported, especially TLS */
274
275 switch (reloc_type) {
276 case R_RISCV_NONE:
277 break;
278 case R_RISCV_32:
279 jump_target = sym_base_addr + rel->r_addend; /* S + A */
280 UNALIGNED_PUT((uint32_t)jump_target, loc32);
281 return riscv_relocation_fits(jump_target, INT32_MAX, reloc_type);
282 case R_RISCV_64:
283 /* full 64-bit range, need no range check */
284 UNALIGNED_PUT(sym_base_addr + rel->r_addend, loc64); /* S + A */
285 break;
286 case R_RISCV_RELATIVE:
287 /* either full 32-bit or 64-bit range, need no range check */
288 UNALIGNED_PUT(load_bias + rel->r_addend, loc_word); /* B + A */
289 break;
290 case R_RISCV_JUMP_SLOT:
291 /* either full 32-bit or 64-bit range, need no range check */
292 UNALIGNED_PUT(sym_base_addr, loc_word); /* S */
293 break;
294 case R_RISCV_BRANCH:
295 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
296 modified_operand = UNALIGNED_GET(loc32);
297 imm8 = jump_target;
298 modified_operand = R_RISCV_CLEAR_BTYPE_IMM8(modified_operand);
299 modified_operand = R_RISCV_SET_BTYPE_IMM8(modified_operand, imm8);
300 UNALIGNED_PUT(modified_operand, loc32);
301 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_B_TYPE,
302 reloc_type);
303 case R_RISCV_JAL:
304 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
305 modified_operand = UNALIGNED_GET(loc32);
306 imm8 = jump_target;
307 modified_operand = R_RISCV_CLEAR_JTYPE_IMM8(modified_operand);
308 modified_operand = R_RISCV_SET_JTYPE_IMM8(modified_operand, imm8);
309 UNALIGNED_PUT(modified_operand, loc32);
310 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
311 reloc_type);
312 case R_RISCV_CALL:
313 case R_RISCV_CALL_PLT:
314 case R_RISCV_PCREL_HI20:
315 modified_operand = UNALIGNED_GET(loc32);
316 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
317 imm8 = jump_target;
318 /* bit 12 of the immediate goes to I-type instruction and might
319 * change the sign of the number
320 */
321 /* in order to avoid that, we add 1 to the upper immediate if bit 12 is one */
322 /* see RISC-V la pseudo instruction */
323 imm8 += imm8 & 0x800;
324
325 original_imm8 = imm8;
326
327 modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
328 modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
329 UNALIGNED_PUT(modified_operand, loc32);
330
331 if (reloc_type != R_RISCV_PCREL_HI20) {
332 /* PCREL_HI20 is only U-type, not truly U+I-type */
333 /* for the others, need to also modify following I-type */
334 loc32++;
335
336 imm8 = jump_target;
337
338 modified_operand = UNALIGNED_GET(loc32);
339 modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
340 modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
341 UNALIGNED_PUT(modified_operand, loc32);
342 }
343
344 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
345 reloc_type);
346 case R_RISCV_PCREL_LO12_I:
347 /*
348 * Jump target is resolved in llext_riscv_find_sym_pcrel in llext_link.c
349 * as it depends on other relocations.
350 */
351 modified_operand = UNALIGNED_GET(loc32);
352 imm8 = (int32_t)sym_base_addr; /* already computed */
353 modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
354 modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
355 UNALIGNED_PUT(modified_operand, loc32);
356 /* we have checked that this fits with the associated relocation */
357 break;
358 case R_RISCV_PCREL_LO12_S:
359 /*
360 * Jump target is resolved in llext_riscv_find_sym_pcrel in llext_link.c
361 * as it depends on other relocations.
362 */
363 modified_operand = UNALIGNED_GET(loc32);
364 imm8 = (int32_t)sym_base_addr; /* already computed */
365 modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
366 modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
367 UNALIGNED_PUT(modified_operand, loc32);
368 /* we have checked that this fits with the associated relocation */
369 break;
370 case R_RISCV_HI20:
371 jump_target = sym_base_addr + rel->r_addend; /* S + A */
372 modified_operand = UNALIGNED_GET(loc32);
373 imm8 = jump_target;
374 /* bit 12 of the immediate goes to I-type instruction and might
375 * change the sign of the number
376 */
377 /* in order to avoid that, we add 1 to the upper immediate if bit 12 is one*/
378 /* see RISC-V la pseudo instruction */
379 original_imm8 = imm8;
380 imm8 += imm8 & 0x800;
381 modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
382 modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
383 UNALIGNED_PUT(modified_operand, loc32);
384 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
385 reloc_type);
386 case R_RISCV_LO12_I:
387 modified_operand = UNALIGNED_GET(loc32);
388 jump_target = sym_base_addr + rel->r_addend; /* S + A */
389 imm8 = jump_target;
390 /* this is always used with R_RISCV_HI20 */
391 modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
392 modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
393 UNALIGNED_PUT(modified_operand, loc32);
394 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
395 reloc_type);
396 case R_RISCV_LO12_S:
397 modified_operand = UNALIGNED_GET(loc32);
398 imm8 = sym_base_addr + rel->r_addend; /* S + A */
399 /*
400 * S-type is used for stores/loads etc.
401 * size check is done at compile time, as it depends on the size of
402 * the structure we are trying to load/store
403 */
404 modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
405 modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
406 UNALIGNED_PUT(modified_operand, loc32);
407 break;
408 /* for add/sub/set, compiler needs to ensure that the ELF sections are close enough */
409 case R_RISCV_ADD8:
410 tmp8 = UNALIGNED_GET(loc8);
411 tmp8 += sym_base_addr + rel->r_addend; /* V + S + A */
412 UNALIGNED_PUT(tmp8, loc8);
413 break;
414 case R_RISCV_ADD16:
415 tmp16 = UNALIGNED_GET(loc16);
416 tmp16 += sym_base_addr + rel->r_addend; /* V + S + A */
417 UNALIGNED_PUT(tmp16, loc16);
418 break;
419 case R_RISCV_ADD32:
420 tmp32 = UNALIGNED_GET(loc32);
421 tmp32 += sym_base_addr + rel->r_addend; /* V + S + A */
422 UNALIGNED_PUT(tmp32, loc32);
423 break;
424 case R_RISCV_ADD64:
425 tmp64 = UNALIGNED_GET(loc64);
426 tmp64 += sym_base_addr + rel->r_addend; /* V + S + A */
427 UNALIGNED_PUT(tmp64, loc64);
428 break;
429 case R_RISCV_SUB8:
430 tmp8 = UNALIGNED_GET(loc8);
431 tmp8 -= sym_base_addr + rel->r_addend; /* V - S - A */
432 UNALIGNED_PUT(tmp8, loc8);
433 break;
434 case R_RISCV_SUB16:
435 tmp16 = UNALIGNED_GET(loc16);
436 tmp16 -= sym_base_addr + rel->r_addend; /* V - S - A */
437 UNALIGNED_PUT(tmp16, loc16);
438 break;
439 case R_RISCV_SUB32:
440 tmp32 = UNALIGNED_GET(loc32);
441 tmp32 -= sym_base_addr + rel->r_addend; /* V - S - A */
442 UNALIGNED_PUT(tmp32, loc32);
443 break;
444 case R_RISCV_SUB64:
445 tmp64 = UNALIGNED_GET(loc64);
446 tmp64 -= sym_base_addr + rel->r_addend; /* V - S - A */
447 UNALIGNED_PUT(tmp64, loc64);
448 break;
449 case R_RISCV_SUB6:
450 tmp8 = UNALIGNED_GET(loc8) & (0x1F);
451 UNALIGNED_PUT(tmp8, loc8);
452 tmp8 = tmp8 - sym_base_addr - rel->r_addend; /* V - S - A */
453 tmp8 = tmp8 & (0x1F);
454 tmp8 = tmp8 | UNALIGNED_GET(loc8);
455 UNALIGNED_PUT(tmp8, loc8);
456 break;
457 case R_RISCV_SET6:
458 tmp8 = UNALIGNED_GET(loc8) & (0x1F);
459 UNALIGNED_PUT(tmp8, loc8);
460 tmp8 = sym_base_addr + rel->r_addend; /* S + A */
461 tmp8 = tmp8 | UNALIGNED_GET(loc8);
462 UNALIGNED_PUT(tmp8, loc8);
463 break;
464 case R_RISCV_SET8:
465 tmp8 = sym_base_addr + rel->r_addend; /* S + A */
466 UNALIGNED_PUT(tmp8, loc8);
467 break;
468 case R_RISCV_SET16:
469 tmp16 = sym_base_addr + rel->r_addend; /* S + A */
470 UNALIGNED_PUT(tmp16, loc16);
471 break;
472 case R_RISCV_SET32:
473 tmp32 = sym_base_addr + rel->r_addend; /* S + A */
474 UNALIGNED_PUT(tmp32, loc32);
475 break;
476 case R_RISCV_32_PCREL:
477 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
478 tmp32 = jump_target;
479 UNALIGNED_PUT(tmp32, loc32);
480 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
481 reloc_type);
482 case R_RISCV_PLT32:
483 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
484 tmp32 = jump_target;
485 UNALIGNED_PUT(tmp32, loc32);
486 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
487 reloc_type);
488 case R_RISCV_RVC_BRANCH:
489 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
490 modified_compressed_operand = UNALIGNED_GET(loc16);
491 compressed_imm8 = jump_target;
492 modified_compressed_operand =
493 R_RISCV_CLEAR_CBTYPE_IMM8(modified_compressed_operand);
494 modified_compressed_operand =
495 R_RISCV_SET_CBTYPE_IMM8(modified_compressed_operand, compressed_imm8);
496 UNALIGNED_PUT(modified_compressed_operand, loc16);
497 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CB_TYPE,
498 reloc_type);
499 case R_RISCV_RVC_JUMP:
500 jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
501 modified_compressed_operand = UNALIGNED_GET(loc16);
502 compressed_imm8 = jump_target;
503 modified_compressed_operand =
504 R_RISCV_CLEAR_CJTYPE_IMM8(modified_compressed_operand);
505 modified_compressed_operand =
506 R_RISCV_SET_CJTYPE_IMM8(modified_compressed_operand, compressed_imm8);
507 UNALIGNED_PUT(modified_compressed_operand, loc16);
508 return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CJ_TYPE,
509 reloc_type);
510 case R_RISCV_ALIGN:
511 /* we are supposed to move the symbol such that it is aligned to the next power of
512 * two >= addend
513 */
514 /* this involves moving the symbol */
515 while (target_alignment < rel->r_addend) {
516 target_alignment *= 2;
517 }
518 LOG_ERR("Symbol %s with location %p requires alignment to %" PRIu64 " bytes!",
519 sym_name, (void *)loc, (uint64_t)target_alignment);
520 LOG_ERR("Alignment relocation is currently not supported!");
521 return -ENOEXEC;
522 /* ignored, this is primarily intended for removing instructions during link-time
523 * optimization
524 */
525 case R_RISCV_RELAX:
526 break;
527 default:
528 LOG_ERR("Unsupported relocation type: %" PRIu64 " for symbol: %s",
529 (uint64_t)reloc_type, sym_name);
530 return -ENOEXEC;
531 }
532
533 return 0;
534 }
535
