1 /*
2 * Copyright (c) 2018-2020 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stdint.h>
8 #include <stddef.h>
9
10 #include <zephyr/sys/byteorder.h>
11 #include <zephyr/bluetooth/hci_types.h>
12 #include <soc.h>
13
14 #include "hal/cpu.h"
15 #include "hal/ccm.h"
16 #include "hal/radio.h"
17 #include "hal/ticker.h"
18
19 #include "util/util.h"
20 #include "util/mem.h"
21 #include "util/memq.h"
22 #include "util/dbuf.h"
23
24 #include "pdu_df.h"
25 #include "pdu_vendor.h"
26 #include "pdu.h"
27
28 #include "lll.h"
29 #include "lll_vendor.h"
30 #include "lll_clock.h"
31 #include "lll_chan.h"
32 #include "lll_df_types.h"
33 #include "lll_conn.h"
34 #include "lll_adv_types.h"
35 #include "lll_adv.h"
36 #include "lll_adv_pdu.h"
37 #include "lll_adv_aux.h"
38 #include "lll_adv_sync.h"
39 #include "lll_filter.h"
40
41 #include "lll_internal.h"
42 #include "lll_tim_internal.h"
43 #include "lll_adv_internal.h"
44 #include "lll_prof_internal.h"
45
46 #include "ull_adv_types.h"
47
48 #include "hal/debug.h"
49
50 static int init_reset(void);
51 static int prepare_cb(struct lll_prepare_param *p);
52 static void isr_done(void *param);
53 #if defined(CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK)
54 static void isr_tx_chain(void *param);
55 #endif /* CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK */
56 static void isr_tx_rx(void *param);
57 static void isr_rx(void *param);
58 static inline int isr_rx_pdu(struct lll_adv_aux *lll_aux, uint8_t phy_flags_rx,
59 uint8_t devmatch_ok, uint8_t devmatch_id,
60 uint8_t irkmatch_ok, uint8_t irkmatch_id,
61 uint8_t rssi_ready);
62 #if defined(CONFIG_BT_PERIPHERAL)
63 static struct pdu_adv *init_connect_rsp_pdu(struct pdu_adv *pdu_ci);
64 static void isr_tx_connect_rsp(void *param);
65 #endif /* CONFIG_BT_PERIPHERAL */
66
lll_adv_aux_init(void)67 int lll_adv_aux_init(void)
68 {
69 int err;
70
71 err = init_reset();
72 if (err) {
73 return err;
74 }
75
76 return 0;
77 }
78
lll_adv_aux_reset(void)79 int lll_adv_aux_reset(void)
80 {
81 int err;
82
83 err = init_reset();
84 if (err) {
85 return err;
86 }
87
88 return 0;
89 }
90
lll_adv_aux_prepare(void * param)91 void lll_adv_aux_prepare(void *param)
92 {
93 int err;
94
95 err = lll_hfclock_on();
96 LL_ASSERT(err >= 0);
97
98 err = lll_prepare(lll_is_abort_cb, lll_abort_cb, prepare_cb, 0, param);
99 LL_ASSERT(!err || err == -EINPROGRESS);
100 }
101
lll_adv_aux_pback_prepare(void * param)102 void lll_adv_aux_pback_prepare(void *param)
103 {
104 }
105
init_reset(void)106 static int init_reset(void)
107 {
108 return 0;
109 }
110
prepare_cb(struct lll_prepare_param * p)111 static int prepare_cb(struct lll_prepare_param *p)
112 {
113 uint32_t ticks_at_event, ticks_at_start;
114 struct pdu_adv_com_ext_adv *com_hdr;
115 struct pdu_adv *sec_pdu;
116 struct lll_adv_aux *lll;
117 struct lll_adv *lll_adv;
118 struct ull_hdr *ull;
119 uint32_t remainder;
120 uint32_t start_us;
121 uint8_t chan_idx;
122 uint8_t phy_s;
123 uint8_t upd;
124 uint32_t aa;
125
126 DEBUG_RADIO_START_A(1);
127
128 lll = p->param;
129 lll_adv = lll->adv;
130
131 /* FIXME: get latest only when primary PDU without Aux PDUs */
132 upd = 0U;
133 sec_pdu = lll_adv_aux_data_latest_get(lll, &upd);
134 LL_ASSERT(sec_pdu);
135
136 #if defined(CONFIG_BT_TICKER_EXT_EXPIRE_INFO)
137 struct ll_adv_aux_set *aux;
138
139 /* Get reference to extended header */
140 com_hdr = (void *)&sec_pdu->adv_ext_ind;
141
142 aux = HDR_LLL2ULL(lll);
143 chan_idx = lll_chan_sel_2(lll->data_chan_counter, aux->data_chan_id,
144 aux->chm[aux->chm_first].data_chan_map,
145 aux->chm[aux->chm_first].data_chan_count);
146
147 #else /* !CONFIG_BT_TICKER_EXT_EXPIRE_INFO */
148 struct pdu_adv_aux_ptr *aux_ptr;
149 struct pdu_adv_ext_hdr *pri_hdr;
150 struct pdu_adv *pri_pdu;
151 uint8_t *pri_dptr;
152
153 /* Get reference to primary PDU */
154 pri_pdu = lll_adv_data_curr_get(lll_adv);
155 LL_ASSERT(pri_pdu->type == PDU_ADV_TYPE_EXT_IND);
156
157 /* Get reference to extended header */
158 com_hdr = (void *)&pri_pdu->adv_ext_ind;
159 pri_hdr = (void *)com_hdr->ext_hdr_adv_data;
160 pri_dptr = pri_hdr->data;
161
162 /* NOTE: We shall be here in auxiliary PDU prepare due to
163 * aux_ptr flag being set in the extended common header
164 * flags. Hence, ext_hdr_len is non-zero, an explicit check
165 * is not needed.
166 */
167 LL_ASSERT(com_hdr->ext_hdr_len);
168
169 /* traverse through adv_addr, if present */
170 if (pri_hdr->adv_addr) {
171 pri_dptr += BDADDR_SIZE;
172 }
173
174 /* traverse through tgt_addr, if present */
175 if (pri_hdr->tgt_addr) {
176 pri_dptr += BDADDR_SIZE;
177 }
178
179 /* No CTEInfo flag in primary and secondary channel PDU */
180
181 /* traverse through adi, if present */
182 if (pri_hdr->adi) {
183 pri_dptr += sizeof(struct pdu_adv_adi);
184 }
185
186 aux_ptr = (void *)pri_dptr;
187
188 /* Abort if no aux_ptr filled */
189 if (unlikely(!pri_hdr->aux_ptr || !PDU_ADV_AUX_PTR_OFFSET_GET(aux_ptr))) {
190 radio_isr_set(lll_isr_early_abort, lll);
191 radio_disable();
192
193 return 0;
194 }
195
196 chan_idx = aux_ptr->chan_idx;
197 #endif /* !CONFIG_BT_TICKER_EXT_EXPIRE_INFO */
198
199 /* Increment counter used in ULL for channel index calculation */
200 lll->data_chan_counter++;
201
202 /* Set up Radio H/W */
203 radio_reset();
204
205 #if defined(CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL)
206 radio_tx_power_set(lll_adv->tx_pwr_lvl);
207 #else
208 radio_tx_power_set(RADIO_TXP_DEFAULT);
209 #endif /* CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL */
210
211 phy_s = lll_adv->phy_s;
212
213 /* TODO: if coded we use S8? */
214 radio_phy_set(phy_s, lll_adv->phy_flags);
215 radio_pkt_configure(RADIO_PKT_CONF_LENGTH_8BIT, PDU_AC_PAYLOAD_SIZE_MAX,
216 RADIO_PKT_CONF_PHY(phy_s));
217
218 /* Access address and CRC */
219 aa = sys_cpu_to_le32(PDU_AC_ACCESS_ADDR);
220 radio_aa_set((uint8_t *)&aa);
221 radio_crc_configure(PDU_CRC_POLYNOMIAL,
222 PDU_AC_CRC_IV);
223
224 /* Use channel idx calculated or that was in aux_ptr */
225 lll_chan_set(chan_idx);
226
227 /* Set the Radio Tx Packet */
228 radio_pkt_tx_set(sec_pdu);
229
230 /* Switch to Rx if connectable or scannable */
231 if (com_hdr->adv_mode & (BT_HCI_LE_ADV_PROP_CONN |
232 BT_HCI_LE_ADV_PROP_SCAN)) {
233
234 struct pdu_adv *scan_pdu;
235
236 scan_pdu = lll_adv_scan_rsp_latest_get(lll_adv, &upd);
237 LL_ASSERT(scan_pdu);
238
239 radio_isr_set(isr_tx_rx, lll);
240 radio_tmr_tifs_set(EVENT_IFS_US);
241 radio_switch_complete_and_rx(phy_s);
242
243 if (false) {
244
245 #if defined(CONFIG_BT_CTLR_PRIVACY)
246 } else if (upd) {
247 /* Copy the address from the adv packet we will send
248 * into the scan response.
249 */
250 memcpy(&scan_pdu->adv_ext_ind.ext_hdr.data[ADVA_OFFSET],
251 &sec_pdu->adv_ext_ind.ext_hdr.data[ADVA_OFFSET],
252 BDADDR_SIZE);
253 }
254
255 if (ull_filter_lll_rl_enabled()) {
256 struct lll_filter *filter =
257 ull_filter_lll_get(!!(lll_adv->filter_policy));
258
259 radio_filter_configure(filter->enable_bitmask,
260 filter->addr_type_bitmask,
261 (uint8_t *)filter->bdaddr);
262 #endif /* CONFIG_BT_CTLR_PRIVACY */
263
264 } else if (IS_ENABLED(CONFIG_BT_CTLR_FILTER_ACCEPT_LIST) &&
265 lll_adv->filter_policy) {
266 struct lll_filter *fal = ull_filter_lll_get(true);
267
268 radio_filter_configure(fal->enable_bitmask,
269 fal->addr_type_bitmask,
270 (uint8_t *)fal->bdaddr);
271 ARG_UNUSED(scan_pdu);
272 ARG_UNUSED(upd);
273 } else {
274 ARG_UNUSED(scan_pdu);
275 ARG_UNUSED(upd);
276 }
277
278 #if defined(CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK)
279 } else if (sec_pdu->adv_ext_ind.ext_hdr_len &&
280 sec_pdu->adv_ext_ind.ext_hdr.aux_ptr) {
281 lll->last_pdu = sec_pdu;
282
283 radio_isr_set(isr_tx_chain, lll);
284 radio_tmr_tifs_set(EVENT_B2B_MAFS_US);
285 radio_switch_complete_and_b2b_tx(phy_s, lll_adv->phy_flags,
286 phy_s, lll_adv->phy_flags);
287 #endif /* CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK */
288
289 } else {
290 radio_isr_set(isr_done, lll);
291 radio_switch_complete_and_disable();
292 }
293
294 ticks_at_event = p->ticks_at_expire;
295 ull = HDR_LLL2ULL(lll);
296 ticks_at_event += lll_event_offset_get(ull);
297
298 ticks_at_start = ticks_at_event;
299 ticks_at_start += HAL_TICKER_US_TO_TICKS(EVENT_OVERHEAD_START_US);
300
301 remainder = p->remainder;
302 start_us = radio_tmr_start(1, ticks_at_start, remainder);
303
304 /* capture end of Tx-ed PDU, used to calculate HCTO. */
305 radio_tmr_end_capture();
306
307 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
308 radio_gpio_pa_setup();
309 radio_gpio_pa_lna_enable(start_us +
310 radio_tx_ready_delay_get(phy_s,
311 lll_adv->phy_flags) -
312 HAL_RADIO_GPIO_PA_OFFSET);
313 #else /* !HAL_RADIO_GPIO_HAVE_PA_PIN */
314 ARG_UNUSED(start_us);
315 #endif /* !HAL_RADIO_GPIO_HAVE_PA_PIN */
316
317 #if defined(CONFIG_BT_CTLR_XTAL_ADVANCED) && \
318 (EVENT_OVERHEAD_PREEMPT_US <= EVENT_OVERHEAD_PREEMPT_MIN_US)
319 /* check if preempt to start has changed */
320 if (lll_preempt_calc(ull, (TICKER_ID_ADV_AUX_BASE +
321 ull_adv_aux_lll_handle_get(lll)),
322 ticks_at_event)) {
323 radio_isr_set(lll_isr_abort, lll);
324 radio_disable();
325 } else
326 #endif /* CONFIG_BT_CTLR_XTAL_ADVANCED */
327 {
328 uint32_t ret;
329
330 if (IS_ENABLED(CONFIG_BT_CTLR_ADV_PERIODIC) &&
331 IS_ENABLED(CONFIG_BT_TICKER_EXT_EXPIRE_INFO) &&
332 sec_pdu->adv_ext_ind.ext_hdr_len &&
333 sec_pdu->adv_ext_ind.ext_hdr.sync_info) {
334 ull_adv_sync_lll_syncinfo_fill(sec_pdu, lll);
335 }
336
337 ret = lll_prepare_done(lll);
338 LL_ASSERT(!ret);
339 }
340
341 DEBUG_RADIO_START_A(1);
342
343 return 0;
344 }
345
isr_done(void * param)346 static void isr_done(void *param)
347 {
348 struct event_done_extra *extra;
349
350 /* Clear radio status and events */
351 lll_isr_status_reset();
352
353 /* Generate auxiliary radio event done */
354 extra = ull_done_extra_type_set(EVENT_DONE_EXTRA_TYPE_ADV_AUX);
355 LL_ASSERT(extra);
356
357 /* Cleanup radio event and dispatch the done event */
358 lll_isr_cleanup(param);
359 }
360
361 #if defined(CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK)
isr_tx_chain(void * param)362 static void isr_tx_chain(void *param)
363 {
364 struct lll_adv_aux *lll_aux;
365 struct lll_adv *lll;
366 struct pdu_adv *pdu;
367
368 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
369 lll_prof_latency_capture();
370 }
371
372 /* Clear radio tx status and events */
373 lll_isr_tx_status_reset();
374
375 lll_aux = param;
376 lll = lll_aux->adv;
377
378 /* FIXME: Use implementation defined channel index */
379 lll_chan_set(0);
380
381 pdu = lll_adv_pdu_linked_next_get(lll_aux->last_pdu);
382 LL_ASSERT(pdu);
383 lll_aux->last_pdu = pdu;
384
385 /* setup tIFS switching */
386 if (pdu->adv_ext_ind.ext_hdr_len && pdu->adv_ext_ind.ext_hdr.aux_ptr) {
387 radio_isr_set(isr_tx_chain, lll_aux);
388 radio_tmr_tifs_set(EVENT_B2B_MAFS_US);
389 radio_switch_complete_and_b2b_tx(lll->phy_s, lll->phy_flags,
390 lll->phy_s, lll->phy_flags);
391 } else {
392 radio_isr_set(isr_done, lll_aux);
393 radio_switch_complete_and_disable();
394 }
395
396 radio_pkt_tx_set(pdu);
397
398 /* assert if radio packet ptr is not set and radio started rx */
399 LL_ASSERT(!radio_is_ready());
400
401 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
402 lll_prof_cputime_capture();
403 }
404
405 /* capture end of AUX_SYNC_IND/AUX_CHAIN_IND PDU, used for calculating
406 * next PDU timestamp.
407 */
408 radio_tmr_end_capture();
409
410 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
411 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
412 /* PA/LNA enable is overwriting packet end used in ISR
413 * profiling, hence back it up for later use.
414 */
415 lll_prof_radio_end_backup();
416 }
417
418 radio_gpio_pa_setup();
419 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() +
420 EVENT_B2B_MAFS_US -
421 (EVENT_CLOCK_JITTER_US << 1U) -
422 radio_tx_chain_delay_get(lll->phy_s,
423 lll->phy_flags) -
424 HAL_RADIO_GPIO_PA_OFFSET);
425 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */
426
427 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
428 lll_prof_send();
429 }
430 }
431 #endif /* CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK */
432
isr_tx_rx(void * param)433 static void isr_tx_rx(void *param)
434 {
435 struct node_rx_pdu *node_rx_prof;
436 struct node_rx_pdu *node_rx;
437 struct lll_adv_aux *lll_aux;
438 struct lll_adv *lll;
439 uint32_t hcto;
440
441 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
442 lll_prof_latency_capture();
443 node_rx_prof = lll_prof_reserve();
444 }
445
446 /* Clear radio tx status and events */
447 lll_isr_tx_status_reset();
448
449 lll_aux = param;
450 lll = lll_aux->adv;
451
452 /* setup tIFS switching */
453 radio_tmr_tifs_set(EVENT_IFS_US);
454 radio_switch_complete_and_tx(lll->phy_s, 0, lll->phy_s, lll->phy_flags);
455
456 /* setup Rx buffer */
457 node_rx = ull_pdu_rx_alloc_peek(1);
458 LL_ASSERT(node_rx);
459 radio_pkt_rx_set(node_rx->pdu);
460
461 /* assert if radio packet ptr is not set and radio started rx */
462 LL_ASSERT(!radio_is_ready());
463
464 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
465 lll_prof_cputime_capture();
466 }
467
468 radio_isr_set(isr_rx, param);
469
470 #if defined(CONFIG_BT_CTLR_PRIVACY)
471 if (ull_filter_lll_rl_enabled()) {
472 uint8_t count, *irks = ull_filter_lll_irks_get(&count);
473
474 radio_ar_configure(count, irks, (lll->phy_s << 2) | BIT(0));
475 }
476 #endif /* CONFIG_BT_CTLR_PRIVACY */
477
478 /* +/- 2us active clock jitter, +1 us hcto compensation */
479 hcto = radio_tmr_tifs_base_get() + EVENT_IFS_US +
480 (EVENT_CLOCK_JITTER_US << 1U) + 1U;
481 hcto += radio_rx_chain_delay_get(lll->phy_s, PHY_FLAGS_S8);
482 hcto += addr_us_get(lll->phy_s);
483 hcto -= radio_tx_chain_delay_get(lll->phy_s, PHY_FLAGS_S8);
484 radio_tmr_hcto_configure(hcto);
485
486 /* capture end of CONNECT_IND PDU, used for calculating first
487 * peripheral event.
488 */
489 radio_tmr_end_capture();
490
491 if (IS_ENABLED(CONFIG_BT_CTLR_SCAN_REQ_RSSI) ||
492 IS_ENABLED(CONFIG_BT_CTLR_CONN_RSSI)) {
493 radio_rssi_measure();
494 }
495
496 #if defined(HAL_RADIO_GPIO_HAVE_LNA_PIN)
497 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
498 /* PA/LNA enable is overwriting packet end used in ISR
499 * profiling, hence back it up for later use.
500 */
501 lll_prof_radio_end_backup();
502 }
503
504 radio_gpio_lna_setup();
505 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() + EVENT_IFS_US -
506 (EVENT_CLOCK_JITTER_US << 1U) -
507 radio_tx_chain_delay_get(lll->phy_s,
508 PHY_FLAGS_S8) -
509 HAL_RADIO_GPIO_LNA_OFFSET);
510 #endif /* HAL_RADIO_GPIO_HAVE_LNA_PIN */
511
512 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
513 lll_prof_reserve_send(node_rx_prof);
514 }
515 }
516
isr_rx(void * param)517 static void isr_rx(void *param)
518 {
519 uint8_t phy_flags_rx;
520 uint8_t devmatch_ok;
521 uint8_t devmatch_id;
522 uint8_t irkmatch_ok;
523 uint8_t irkmatch_id;
524 uint8_t rssi_ready;
525 uint8_t trx_done;
526 uint8_t crc_ok;
527
528 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
529 lll_prof_latency_capture();
530 }
531
532 /* Read radio status and events */
533 trx_done = radio_is_done();
534 if (trx_done) {
535 crc_ok = radio_crc_is_valid();
536 phy_flags_rx = radio_phy_flags_rx_get();
537 devmatch_ok = radio_filter_has_match();
538 devmatch_id = radio_filter_match_get();
539 if (IS_ENABLED(CONFIG_BT_CTLR_PRIVACY)) {
540 irkmatch_ok = radio_ar_has_match();
541 irkmatch_id = radio_ar_match_get();
542 } else {
543 irkmatch_ok = 0U;
544 irkmatch_id = FILTER_IDX_NONE;
545 }
546 rssi_ready = radio_rssi_is_ready();
547 } else {
548 crc_ok = devmatch_ok = irkmatch_ok = rssi_ready =
549 phy_flags_rx = 0U;
550 devmatch_id = irkmatch_id = FILTER_IDX_NONE;
551 }
552
553 /* Clear radio status and events */
554 lll_isr_status_reset();
555
556 /* No Rx */
557 if (!trx_done) {
558 goto isr_rx_do_close;
559 }
560
561 if (crc_ok) {
562 int err;
563
564 err = isr_rx_pdu(param, phy_flags_rx, devmatch_ok, devmatch_id,
565 irkmatch_ok, irkmatch_id, rssi_ready);
566 if (!err) {
567 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
568 lll_prof_send();
569 }
570
571 return;
572 }
573 }
574
575 isr_rx_do_close:
576 radio_isr_set(isr_done, param);
577 radio_disable();
578 }
579
isr_rx_pdu(struct lll_adv_aux * lll_aux,uint8_t phy_flags_rx,uint8_t devmatch_ok,uint8_t devmatch_id,uint8_t irkmatch_ok,uint8_t irkmatch_id,uint8_t rssi_ready)580 static inline int isr_rx_pdu(struct lll_adv_aux *lll_aux, uint8_t phy_flags_rx,
581 uint8_t devmatch_ok, uint8_t devmatch_id,
582 uint8_t irkmatch_ok, uint8_t irkmatch_id,
583 uint8_t rssi_ready)
584 {
585 struct node_rx_pdu *node_rx;
586 struct pdu_adv_ext_hdr *hdr;
587 struct pdu_adv *pdu_adv;
588 struct pdu_adv *pdu_aux;
589 struct pdu_adv *pdu_rx;
590 struct lll_adv *lll;
591 uint8_t *tgt_addr;
592 uint8_t tx_addr;
593 uint8_t rx_addr;
594 uint8_t *addr;
595 uint8_t upd;
596
597 #if defined(CONFIG_BT_CTLR_PRIVACY)
598 /* An IRK match implies address resolution enabled */
599 uint8_t rl_idx = irkmatch_ok ? ull_filter_lll_rl_irk_idx(irkmatch_id) :
600 FILTER_IDX_NONE;
601 #else
602 uint8_t rl_idx = FILTER_IDX_NONE;
603 #endif /* CONFIG_BT_CTLR_PRIVACY */
604
605 lll = lll_aux->adv;
606
607 node_rx = ull_pdu_rx_alloc_peek(1);
608 LL_ASSERT(node_rx);
609
610 pdu_rx = (void *)node_rx->pdu;
611 pdu_adv = lll_adv_data_curr_get(lll);
612 pdu_aux = lll_adv_aux_data_latest_get(lll_aux, &upd);
613 LL_ASSERT(pdu_aux);
614
615 hdr = &pdu_aux->adv_ext_ind.ext_hdr;
616
617 addr = &pdu_aux->adv_ext_ind.ext_hdr.data[ADVA_OFFSET];
618 tx_addr = pdu_aux->tx_addr;
619
620 if (hdr->tgt_addr) {
621 tgt_addr = &pdu_aux->adv_ext_ind.ext_hdr.data[TGTA_OFFSET];
622 } else {
623 tgt_addr = NULL;
624 }
625 rx_addr = pdu_aux->rx_addr;
626
627 if ((pdu_rx->type == PDU_ADV_TYPE_AUX_SCAN_REQ) &&
628 (pdu_rx->len == sizeof(struct pdu_adv_scan_req)) &&
629 lll_adv_scan_req_check(lll, pdu_rx, tx_addr, addr, devmatch_ok,
630 &rl_idx)) {
631 struct pdu_adv *sr_pdu;
632
633 sr_pdu = lll_adv_scan_rsp_curr_get(lll);
634
635 if (0) {
636
637 #if defined(CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK)
638 } else if (sr_pdu->adv_ext_ind.ext_hdr_len &&
639 sr_pdu->adv_ext_ind.ext_hdr.aux_ptr) {
640 lll_aux->last_pdu = sr_pdu;
641
642 radio_isr_set(isr_tx_chain, lll_aux);
643 radio_tmr_tifs_set(EVENT_B2B_MAFS_US);
644 radio_switch_complete_and_b2b_tx(lll->phy_s,
645 lll->phy_flags,
646 lll->phy_s,
647 lll->phy_flags);
648 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
649 radio_tmr_end_capture();
650 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */
651
652 #endif /* CONFIG_BT_CTLR_ADV_AUX_PDU_BACK2BACK */
653
654 } else {
655 radio_isr_set(isr_done, lll_aux);
656 radio_switch_complete_and_disable();
657 }
658
659 radio_pkt_tx_set(sr_pdu);
660
661 /* assert if radio packet ptr is not set and radio started tx */
662 LL_ASSERT(!radio_is_ready());
663
664 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
665 lll_prof_cputime_capture();
666 }
667
668 #if defined(CONFIG_BT_CTLR_SCAN_REQ_NOTIFY)
669 if (lll->scan_req_notify) {
670 uint32_t err;
671
672 /* Generate the scan request event */
673 err = lll_adv_scan_req_report(lll, pdu_rx, rl_idx,
674 rssi_ready);
675 if (err) {
676 /* Scan Response will not be transmitted */
677 return err;
678 }
679 }
680 #endif /* CONFIG_BT_CTLR_SCAN_REQ_NOTIFY */
681
682 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
683 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
684 /* PA/LNA enable is overwriting packet end used in ISR
685 * profiling, hence back it up for later use.
686 */
687 lll_prof_radio_end_backup();
688 }
689
690 radio_gpio_pa_setup();
691 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() +
692 EVENT_IFS_US -
693 radio_rx_chain_delay_get(lll->phy_s,
694 phy_flags_rx) -
695 HAL_RADIO_GPIO_PA_OFFSET);
696 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */
697 return 0;
698
699 #if defined(CONFIG_BT_PERIPHERAL)
700 } else if ((pdu_rx->type == PDU_ADV_TYPE_AUX_CONNECT_REQ) &&
701 (pdu_rx->len == sizeof(struct pdu_adv_connect_ind)) &&
702 lll->conn &&
703 lll_adv_connect_ind_check(lll, pdu_rx, tx_addr, addr,
704 rx_addr, tgt_addr,
705 devmatch_ok, &rl_idx)) {
706 struct node_rx_ftr *ftr;
707 struct node_rx_pdu *rx;
708 struct pdu_adv *pdu_tx;
709
710 if (IS_ENABLED(CONFIG_BT_CTLR_CHAN_SEL_2)) {
711 rx = ull_pdu_rx_alloc_peek(4);
712 } else {
713 rx = ull_pdu_rx_alloc_peek(3);
714 }
715
716 if (!rx) {
717 return -ENOBUFS;
718 }
719
720 /* rx is effectively allocated later, after critical isr steps
721 * are done */
722 radio_isr_set(isr_tx_connect_rsp, rx);
723 radio_switch_complete_and_disable();
724 pdu_tx = init_connect_rsp_pdu(pdu_rx);
725 radio_pkt_tx_set(pdu_tx);
726
727 /* assert if radio packet ptr is not set and radio started tx */
728 LL_ASSERT(!radio_is_ready());
729
730 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
731 lll_prof_cputime_capture();
732 }
733
734 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
735 if (IS_ENABLED(CONFIG_BT_CTLR_PROFILE_ISR)) {
736 /* PA/LNA enable is overwriting packet end used in ISR
737 * profiling, hence back it up for later use.
738 */
739 lll_prof_radio_end_backup();
740 }
741
742 radio_gpio_pa_setup();
743 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() +
744 EVENT_IFS_US -
745 radio_rx_chain_delay_get(lll->phy_s,
746 phy_flags_rx) -
747 HAL_RADIO_GPIO_PA_OFFSET);
748 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */
749
750 /* Note: this is the same as previous result from alloc_peek */
751 rx = ull_pdu_rx_alloc();
752
753 rx->hdr.type = NODE_RX_TYPE_CONNECTION;
754 rx->hdr.handle = 0xffff;
755
756 ftr = &(rx->hdr.rx_ftr);
757 ftr->param = lll;
758 ftr->ticks_anchor = radio_tmr_start_get();
759 ftr->radio_end_us = radio_tmr_end_get() -
760 radio_rx_chain_delay_get(lll->phy_s,
761 phy_flags_rx);
762
763 #if defined(CONFIG_BT_CTLR_PRIVACY)
764 ftr->rl_idx = irkmatch_ok ? rl_idx : FILTER_IDX_NONE;
765 #endif /* CONFIG_BT_CTLR_PRIVACY */
766
767 if (IS_ENABLED(CONFIG_BT_CTLR_CHAN_SEL_2)) {
768 ftr->extra = ull_pdu_rx_alloc();
769 }
770
771 return 0;
772 #endif /* CONFIG_BT_PERIPHERAL */
773 }
774
775 return -EINVAL;
776 }
777
778 #if defined(CONFIG_BT_PERIPHERAL)
init_connect_rsp_pdu(struct pdu_adv * pdu_ci)779 static struct pdu_adv *init_connect_rsp_pdu(struct pdu_adv *pdu_ci)
780 {
781 struct pdu_adv_com_ext_adv *cr_com_hdr;
782 struct pdu_adv_ext_hdr *cr_hdr;
783 struct pdu_adv *pdu_cr;
784 uint8_t *cr_dptr;
785
786 pdu_cr = radio_pkt_scratch_get();
787 pdu_cr->type = PDU_ADV_TYPE_AUX_CONNECT_RSP;
788 pdu_cr->rfu = 0;
789 pdu_cr->chan_sel = 0;
790 pdu_cr->tx_addr = pdu_ci->rx_addr;
791 pdu_cr->rx_addr = pdu_ci->tx_addr;
792
793 /* Common Extended Header Format Advertising Mode */
794 cr_com_hdr = &pdu_cr->adv_ext_ind;
795 cr_com_hdr->adv_mode = 0;
796
797 /* Clear Flags */
798 cr_hdr = &cr_com_hdr->ext_hdr;
799 cr_dptr = (void *)cr_hdr;
800 *cr_dptr = 0;
801 cr_dptr = cr_hdr->data;
802
803 /* AdvA */
804 cr_hdr->adv_addr = 1;
805 memcpy(cr_dptr, &pdu_ci->connect_ind.adv_addr, BDADDR_SIZE);
806 cr_dptr += BDADDR_SIZE;
807
808 /* InitA */
809 cr_hdr->tgt_addr = 1;
810 memcpy(cr_dptr, &pdu_ci->connect_ind.init_addr, BDADDR_SIZE);
811 cr_dptr += BDADDR_SIZE;
812
813 /* Common Extended Header Length */
814 cr_com_hdr->ext_hdr_len = cr_dptr - (uint8_t *)&cr_com_hdr->ext_hdr;
815
816 /* PDU length */
817 pdu_cr->len = cr_dptr - &pdu_cr->payload[0];
818
819 return pdu_cr;
820 }
821
isr_tx_connect_rsp(void * param)822 static void isr_tx_connect_rsp(void *param)
823 {
824 struct node_rx_ftr *ftr;
825 struct node_rx_pdu *rx;
826 struct lll_adv *lll;
827 bool is_done;
828
829 rx = param;
830 ftr = &(rx->hdr.rx_ftr);
831 lll = ftr->param;
832
833 is_done = radio_is_done();
834
835 if (!is_done) {
836 /* AUX_CONNECT_RSP was not sent properly, need to release
837 * allocated resources and keep advertising.
838 */
839
840 rx->hdr.type = NODE_RX_TYPE_RELEASE;
841
842 if (IS_ENABLED(CONFIG_BT_CTLR_CHAN_SEL_2)) {
843 ull_rx_put(rx->hdr.link, rx);
844
845 rx = ftr->extra;
846 rx->hdr.type = NODE_RX_TYPE_RELEASE;
847 }
848 }
849
850 ull_rx_put_sched(rx->hdr.link, rx);
851
852 if (is_done) {
853 /* Stop further LLL radio events */
854 lll->conn->periph.initiated = 1;
855 }
856
857 /* Clear radio status and events */
858 lll_isr_status_reset();
859 lll_isr_cleanup(lll);
860 }
861 #endif /* CONFIG_BT_PERIPHERAL */
862
