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/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_usbfs_dev_drv.h1358 #define CY_USBFS_DEV_DRV_SET_SOF_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_SOF_LVL_SEL, l… argument
1360 #define CY_USBFS_DEV_DRV_SET_BUS_RESET_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_BUS_RESET_LVL_… argument
1362 #define CY_USBFS_DEV_DRV_SET_EP0_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_EP0_LVL_SEL, l… argument
1364 #define CY_USBFS_DEV_DRV_SET_LPM_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_LPM_LVL_SEL, l… argument
1366 #define CY_USBFS_DEV_DRV_SET_RESUME_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_RESUME_LVL_SEL… argument
1368 #define CY_USBFS_DEV_DRV_SET_ARB_EP_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_ARB_EP_LVL_SEL… argument
1370 #define CY_USBFS_DEV_DRV_SET_EP1_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_EP1_LVL_SEL, l… argument
1372 #define CY_USBFS_DEV_DRV_SET_EP2_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_EP2_LVL_SEL, l… argument
1374 #define CY_USBFS_DEV_DRV_SET_EP3_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_EP3_LVL_SEL, l… argument
1376 #define CY_USBFS_DEV_DRV_SET_EP4_LVL(level) _VAL2FLD(USBFS_USBLPM_INTR_LVL_SEL_EP4_LVL_SEL, l… argument
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Dcy_scb_common.h840 #define CY_SCB_IS_TRIGGER_LEVEL_VALID(base, level) ((level) < Cy_SCB_GetFifoSize(base)) argument
893 __STATIC_INLINE void Cy_SCB_SetRxFifoLevel(CySCB_Type *base, uint32_t level) in Cy_SCB_SetRxFifoLevel()
997 __STATIC_INLINE void Cy_SCB_SetTxFifoLevel(CySCB_Type *base, uint32_t level) in Cy_SCB_SetTxFifoLevel()
Dcy_sar.h861 #define CY_SAR_IS_FIFO_LEVEL_VALID(level) ((level) <= PASS_FIFO_V2_LEVEL_LEVEL_Msk) argument
1453 …uint32_t level; /**< A trigger (and optional interrupt) event … member
2717 __STATIC_INLINE void Cy_SAR_FifoSetLevel(const SAR_Type *base, uint32_t level) in Cy_SAR_FifoSetLevel()
Dcy_smif.h1629 __STATIC_INLINE void Cy_SMIF_SetTxFifoTriggerLevel(SMIF_Type *base, uint32_t level) in Cy_SMIF_SetTxFifoTriggerLevel()
1651 __STATIC_INLINE void Cy_SMIF_SetRxFifoTriggerLevel(SMIF_Type *base, uint32_t level) in Cy_SMIF_SetRxFifoTriggerLevel()
Dcy_scb_uart.h1055 __STATIC_INLINE void Cy_SCB_UART_SetRtsFifoLevel(CySCB_Type *base, uint32_t level) in Cy_SCB_UART_SetRtsFifoLevel()
Dcy_ctb.h468 #define CY_CTB_COMPLEVEL(level) (((level) == CY_CTB_COMP_DSI_TRIGGER_OUT_PULSE) || ((le… argument
/hal_infineon-latest/XMCLib/drivers/src/
Dxmc_bccu.c210 …SetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_mask, XMC_BCCU_CH_ACTIVE_LEVEL_t level) in XMC_BCCU_ConcurrentSetOutputPassiveLevel()
318 void XMC_BCCU_SetGlobalDimmingLevel (XMC_BCCU_t *const bccu, uint32_t level) in XMC_BCCU_SetGlobalDimmingLevel()
348 …U_SetOutputPassiveLevel(XMC_BCCU_t *const bccu, uint32_t chan_no, XMC_BCCU_CH_ACTIVE_LEVEL_t level) in XMC_BCCU_SetOutputPassiveLevel()
472 void XMC_BCCU_CH_SetPackerOffCompare (XMC_BCCU_CH_t *const channel, uint32_t level) in XMC_BCCU_CH_SetPackerOffCompare()
481 void XMC_BCCU_CH_SetPackerOnCompare (XMC_BCCU_CH_t *const channel, uint32_t level) in XMC_BCCU_CH_SetPackerOnCompare()
551 void XMC_BCCU_DIM_SetTargetDimmingLevel (XMC_BCCU_DIM_t *const dim_engine, uint32_t level) in XMC_BCCU_DIM_SetTargetDimmingLevel()
Dxmc_ccu4.c1123 const XMC_CCU4_SLICE_OUTPUT_PASSIVE_LEVEL_t level) in XMC_CCU4_SLICE_SetPassiveLevel()
Dxmc_ccu8.c1241 const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level) in XMC_CCU8_SLICE_SetPassiveLevel()
Dxmc4_scu.c1380 void XMC_SCU_HIB_SetPinOutputLevel(XMC_SCU_HIB_IO_t pin, XMC_SCU_HIB_IO_OUTPUT_LEVEL_t level) in XMC_SCU_HIB_SetPinOutputLevel()
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_gpio.h103 #define XMC_GPIO_CHECK_OUTPUT_LEVEL(level) ((level == XMC_GPIO_OUTPUT_LEVEL_LOW) || \ argument
229 …SetOutputLevel(XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level) in XMC_GPIO_SetOutputLevel()
Dxmc1_flash.h438 __STATIC_INLINE void XMC_FLASH_SetHardReadLevel(XMC_FLASH_HARDREAD_LEVEL_t level) in XMC_FLASH_SetHardReadLevel()
Dxmc_ccu4.h647 …XMC_CCU4_SLICE_EVENT_LEVEL_SENSITIVITY_t level; /**< Select the event level of the input si… member
Dxmc_hrpwm.h758 XMC_HRPWM_CSG_LVL_SEL_t level; /**< Active level of mapped_input */ member
/hal_infineon-latest/btstack-integration/COMPONENT_BTSS-IPC/platform/common/
Dcybt_platform_trace.c72 cybt_trace_level_t level in cybt_platform_set_trace_level()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_scb_i2c.c2499 uint32_t level = 0UL; in SlaveHandleAddress() local
2566 uint32_t level; in SlaveHandleDataReceive() local
Dcy_scb_spi.c1195 uint32_t level = (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) ? in HandleReceive() local
Dcy_scb_ezi2c.c998 uint32_t level; in UpdateRxFifoLevel() local
Dcy_ctb.c1384 …CompSetConfig(CTBM_Type *base, cy_en_ctb_opamp_sel_t compNum, cy_en_ctb_comp_level_t level, cy_en_… in Cy_CTB_CompSetConfig()
Dcy_scb_uart.c1596 uint32_t level = (numToCopy > 0UL) ? (numToCopy - 1UL) : 0UL; in HandleRingBuffer() local
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_scb_common.c697 cy_rslt_t _cyhal_scb_set_fifo_level(CySCB_Type *base, cyhal_scb_fifo_type_t type, uint16_t level) in _cyhal_scb_set_fifo_level()
Dcyhal_uart.c1686 cy_rslt_t cyhal_uart_set_fifo_level(cyhal_uart_t *obj, cyhal_uart_fifo_type_t type, uint16_t level) in cyhal_uart_set_fifo_level()
Dcyhal_i2c.c961 cy_rslt_t cyhal_i2c_set_fifo_level(cyhal_i2c_t *obj, cyhal_i2c_fifo_type_t type, uint16_t level) in cyhal_i2c_set_fifo_level()
Dcyhal_spi.c1543 cy_rslt_t cyhal_spi_set_fifo_level(cyhal_spi_t *obj, cyhal_spi_fifo_type_t type, uint16_t level) in cyhal_spi_set_fifo_level()
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1B/include/
Dcyhal_missing_pdl.h85 uint32_t level; member

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