1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2019 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_WDOG_H_
9 #define _FSL_WDOG_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup wdog
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 *******************************************************************************/
21 /*! @name Driver version */
22 /*@{*/
23 /*! @brief Defines WDOG driver version */
24 #define FSL_WDOG_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
25 /*@}*/
26 /*! @name Refresh sequence */
27 /*@{*/
28 #define WDOG_REFRESH_KEY (0xAAAA5555U)
29 /*@}*/
30
31 /*! @brief Defines WDOG work mode. */
32 typedef struct _wdog_work_mode
33 {
34 bool enableWait; /*!< continue or suspend WDOG in wait mode */
35 bool enableStop; /*!< continue or suspend WDOG in stop mode */
36 bool enableDebug; /*!< continue or suspend WDOG in debug mode */
37 } wdog_work_mode_t;
38
39 /*! @brief Describes WDOG configuration structure. */
40 typedef struct _wdog_config
41 {
42 bool enableWdog; /*!< Enables or disables WDOG */
43 wdog_work_mode_t workMode; /*!< Configures WDOG work mode in debug stop and wait mode */
44 bool enableInterrupt; /*!< Enables or disables WDOG interrupt */
45 uint16_t timeoutValue; /*!< Timeout value */
46 uint16_t interruptTimeValue; /*!< Interrupt count timeout value */
47 bool softwareResetExtension; /*!< software reset extension */
48 bool enablePowerDown; /*!< power down enable bit */
49 bool enableTimeOutAssert; /*!< Enable WDOG_B timeout assertion. */
50 } wdog_config_t;
51
52 /*!
53 * @brief WDOG interrupt configuration structure, default settings all disabled.
54 *
55 * This structure contains the settings for all of the WDOG interrupt configurations.
56 */
57 enum _wdog_interrupt_enable
58 {
59 kWDOG_InterruptEnable = WDOG_WICR_WIE_MASK /*!< WDOG timeout generates an interrupt before reset*/
60 };
61
62 /*!
63 * @brief WDOG status flags.
64 *
65 * This structure contains the WDOG status flags for use in the WDOG functions.
66 */
67 enum _wdog_status_flags
68 {
69 kWDOG_RunningFlag = WDOG_WCR_WDE_MASK, /*!< Running flag, set when WDOG is enabled*/
70 kWDOG_PowerOnResetFlag = WDOG_WRSR_POR_MASK, /*!< Power On flag, set when reset is the result of a powerOnReset*/
71 kWDOG_TimeoutResetFlag = WDOG_WRSR_TOUT_MASK, /*!< Timeout flag, set when reset is the result of a timeout*/
72 kWDOG_SoftwareResetFlag = WDOG_WRSR_SFTW_MASK, /*!< Software flag, set when reset is the result of a software*/
73 kWDOG_InterruptFlag = WDOG_WICR_WTIS_MASK /*!< interrupt flag,whether interrupt has occurred or not*/
74 };
75
76 /*******************************************************************************
77 * API
78 *******************************************************************************/
79
80 #if defined(__cplusplus)
81 extern "C" {
82 #endif /* __cplusplus */
83
84 /*!
85 * @name WDOG Initialization and De-initialization.
86 * @{
87 */
88
89 /*!
90 * @brief Initializes the WDOG configuration structure.
91 *
92 * This function initializes the WDOG configuration structure to default values. The default
93 * values are as follows.
94 * @code
95 * wdogConfig->enableWdog = true;
96 * wdogConfig->workMode.enableWait = true;
97 * wdogConfig->workMode.enableStop = false;
98 * wdogConfig->workMode.enableDebug = false;
99 * wdogConfig->enableInterrupt = false;
100 * wdogConfig->enablePowerdown = false;
101 * wdogConfig->resetExtension = flase;
102 * wdogConfig->timeoutValue = 0xFFU;
103 * wdogConfig->interruptTimeValue = 0x04u;
104 * @endcode
105 *
106 * @param config Pointer to the WDOG configuration structure.
107 * @see wdog_config_t
108 */
109 void WDOG_GetDefaultConfig(wdog_config_t *config);
110
111 /*!
112 * @brief Initializes the WDOG.
113 *
114 * This function initializes the WDOG. When called, the WDOG runs according to the configuration.
115 *
116 * This is an example.
117 * @code
118 * wdog_config_t config;
119 * WDOG_GetDefaultConfig(&config);
120 * config.timeoutValue = 0xffU;
121 * config->interruptTimeValue = 0x04u;
122 * WDOG_Init(wdog_base,&config);
123 * @endcode
124 *
125 * @param base WDOG peripheral base address
126 * @param config The configuration of WDOG
127 */
128 void WDOG_Init(WDOG_Type *base, const wdog_config_t *config);
129
130 /*!
131 * @brief Shuts down the WDOG.
132 *
133 * This function shuts down the WDOG.
134 * Watchdog Enable bit is a write one once only bit. It is not
135 * possible to clear this bit by a software write, once the bit is set.
136 * This bit(WDE) can be set/reset only in debug mode(exception).
137 */
138 void WDOG_Deinit(WDOG_Type *base);
139
140 /*!
141 * @brief Enables the WDOG module.
142 *
143 * This function writes a value into the WDOG_WCR register to enable the WDOG.
144 * This is a write one once only bit. It is not possible to clear this bit by a software write,
145 * once the bit is set. only debug mode exception.
146 * @param base WDOG peripheral base address
147 */
WDOG_Enable(WDOG_Type * base)148 static inline void WDOG_Enable(WDOG_Type *base)
149 {
150 base->WCR |= WDOG_WCR_WDE_MASK;
151 }
152
153 /*!
154 * @brief Disables the WDOG module.
155 *
156 * This function writes a value into the WDOG_WCR register to disable the WDOG.
157 * This is a write one once only bit. It is not possible to clear this bit by a software write,once the bit is set.
158 * only debug mode exception
159 * @param base WDOG peripheral base address
160 */
WDOG_Disable(WDOG_Type * base)161 static inline void WDOG_Disable(WDOG_Type *base)
162 {
163 base->WCR &= ~(uint16_t)WDOG_WCR_WDE_MASK;
164 }
165
166 /*!
167 * @brief Trigger the system software reset.
168 *
169 * This function will write to the WCR[SRS] bit to trigger a software system reset.
170 * This bit will automatically resets to "1" after it has been asserted to "0".
171 * Note: Calling this API will reset the system right now, please using it with more attention.
172 *
173 * @param base WDOG peripheral base address
174 */
WDOG_TriggerSystemSoftwareReset(WDOG_Type * base)175 static inline void WDOG_TriggerSystemSoftwareReset(WDOG_Type *base)
176 {
177 base->WCR &= ~(uint16_t)WDOG_WCR_SRS_MASK;
178 }
179
180 /*!
181 * @brief Trigger an output assertion.
182 *
183 * This function will write to the WCR[WDA] bit to trigger WDOG_B signal assertion.
184 * The WDOG_B signal can be routed to external pin of the chip, the output pin will turn to
185 * assertion along with WDOG_B signal.
186 * Note: The WDOG_B signal will remain assert until a power on reset occurred, so, please
187 * take more attention while calling it.
188 *
189 * @param base WDOG peripheral base address
190 */
WDOG_TriggerSoftwareSignal(WDOG_Type * base)191 static inline void WDOG_TriggerSoftwareSignal(WDOG_Type *base)
192 {
193 base->WCR &= ~(uint16_t)WDOG_WCR_WDA_MASK;
194 }
195
196 /*!
197 * @brief Enables the WDOG interrupt.
198 *
199 *This bit is a write once only bit. Once the software does a write access to this bit, it will get
200 *locked and cannot be reprogrammed until the next system reset assertion
201 *
202 * @param base WDOG peripheral base address
203 * @param mask The interrupts to enable
204 * The parameter can be combination of the following source if defined.
205 * @arg kWDOG_InterruptEnable
206 */
WDOG_EnableInterrupts(WDOG_Type * base,uint16_t mask)207 static inline void WDOG_EnableInterrupts(WDOG_Type *base, uint16_t mask)
208 {
209 base->WICR |= mask;
210 }
211
212 /*!
213 * @brief Gets the WDOG all reset status flags.
214 *
215 * This function gets all reset status flags.
216 *
217 * @code
218 * uint16_t status;
219 * status = WDOG_GetStatusFlags (wdog_base);
220 * @endcode
221 * @param base WDOG peripheral base address
222 * @return State of the status flag: asserted (true) or not-asserted (false).@see _wdog_status_flags
223 * - true: a related status flag has been set.
224 * - false: a related status flag is not set.
225 */
226 uint16_t WDOG_GetStatusFlags(WDOG_Type *base);
227
228 /*!
229 * @brief Clears the WDOG flag.
230 *
231 * This function clears the WDOG status flag.
232 *
233 * This is an example for clearing the interrupt flag.
234 * @code
235 * WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);
236 * @endcode
237 * @param base WDOG peripheral base address
238 * @param mask The status flags to clear.
239 * The parameter could be any combination of the following values.
240 * kWDOG_TimeoutFlag
241 */
242 void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask);
243
244 /*!
245 * @brief Sets the WDOG timeout value.
246 *
247 * This function sets the timeout value.
248 * This function writes a value into WCR registers.
249 * The time-out value can be written at any point of time but it is loaded to the counter at the time
250 * when WDOG is enabled or after the service routine has been performed.
251 *
252 * @param base WDOG peripheral base address
253 * @param timeoutCount WDOG timeout value; count of WDOG clock tick.
254 */
WDOG_SetTimeoutValue(WDOG_Type * base,uint16_t timeoutCount)255 static inline void WDOG_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
256 {
257 base->WCR = (base->WCR & (uint16_t)~WDOG_WCR_WT_MASK) | WDOG_WCR_WT(timeoutCount);
258 }
259
260 /*!
261 * @brief Sets the WDOG interrupt count timeout value.
262 *
263 * This function sets the interrupt count timeout value.
264 * This function writes a value into WIC registers which are wirte-once.
265 * This field is write once only. Once the software does a write access to this field, it will get locked
266 * and cannot be reprogrammed until the next system reset assertion.
267 * @param base WDOG peripheral base address
268 * @param timeoutCount WDOG timeout value; count of WDOG clock tick.
269 */
WDOG_SetInterrputTimeoutValue(WDOG_Type * base,uint16_t timeoutCount)270 static inline void WDOG_SetInterrputTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
271 {
272 base->WICR = (base->WICR & ~(uint16_t)WDOG_WICR_WICT_MASK) | WDOG_WICR_WICT(timeoutCount);
273 }
274
275 /*!
276 * @brief Disable the WDOG power down enable bit.
277 *
278 * This function disable the WDOG power down enable(PDE).
279 * This function writes a value into WMCR registers which are wirte-once.
280 * This field is write once only. Once software sets this bit it cannot be reset until the next system reset.
281 * @param base WDOG peripheral base address
282 */
WDOG_DisablePowerDownEnable(WDOG_Type * base)283 static inline void WDOG_DisablePowerDownEnable(WDOG_Type *base)
284 {
285 base->WMCR &= ~(uint16_t)WDOG_WMCR_PDE_MASK;
286 }
287
288 /*!
289 * @brief Refreshes the WDOG timer.
290 *
291 * This function feeds the WDOG.
292 * This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.
293 *
294 * @param base WDOG peripheral base address
295 */
296 void WDOG_Refresh(WDOG_Type *base);
297 /*@}*/
298
299 #if defined(__cplusplus)
300 }
301 #endif /* __cplusplus */
302
303 /*! @}*/
304
305 #endif /* _FSL_WDOG_H_ */
306
