1 /* 2 * Copyright 2018 NXP 3 * All rights reserved. 4 * 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef __SERIAL_PORT_UART_H__ 10 #define __SERIAL_PORT_UART_H__ 11 12 #include "fsl_adapter_uart.h" 13 14 /*! 15 * @addtogroup serial_port_uart 16 * @ingroup serialmanager 17 * @{ 18 */ 19 20 /******************************************************************************* 21 * Definitions 22 ******************************************************************************/ 23 /*! @brief serial port uart handle size*/ 24 25 #ifndef SERIAL_PORT_UART_DMA_RECEIVE_DATA_LENGTH 26 #define SERIAL_PORT_UART_DMA_RECEIVE_DATA_LENGTH (64U) 27 #endif 28 29 #if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U)) 30 31 #define SERIAL_PORT_UART_HANDLE_SIZE (76U + HAL_UART_HANDLE_SIZE) 32 #define SERIAL_PORT_UART_BLOCK_HANDLE_SIZE (HAL_UART_BLOCK_HANDLE_SIZE) 33 #else 34 #define SERIAL_PORT_UART_HANDLE_SIZE (HAL_UART_HANDLE_SIZE) 35 #endif 36 37 #if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U)) 38 #define SERIAL_PORT_UART_DMA_HANDLE_SIZE (76U + HAL_UART_DMA_HANDLE_SIZE + 132U) 39 #endif 40 41 #ifndef SERIAL_USE_CONFIGURE_STRUCTURE 42 #define SERIAL_USE_CONFIGURE_STRUCTURE (0U) /*!< Enable or disable the confgure structure pointer */ 43 #endif 44 45 /*! @brief serial port uart parity mode*/ 46 typedef enum _serial_port_uart_parity_mode 47 { 48 kSerialManager_UartParityDisabled = 0x0U, /*!< Parity disabled */ 49 kSerialManager_UartParityEven = 0x2U, /*!< Parity even enabled */ 50 kSerialManager_UartParityOdd = 0x3U, /*!< Parity odd enabled */ 51 } serial_port_uart_parity_mode_t; 52 53 /*! @brief serial port uart stop bit count*/ 54 typedef enum _serial_port_uart_stop_bit_count 55 { 56 kSerialManager_UartOneStopBit = 0U, /*!< One stop bit */ 57 kSerialManager_UartTwoStopBit = 1U, /*!< Two stop bits */ 58 } serial_port_uart_stop_bit_count_t; 59 60 typedef struct _serial_port_uart_config 61 { 62 uint32_t clockRate; /*!< clock rate */ 63 uint32_t baudRate; /*!< baud rate */ 64 serial_port_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */ 65 serial_port_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */ 66 67 uint8_t enableRx; /*!< Enable RX */ 68 uint8_t enableTx; /*!< Enable TX */ 69 uint8_t enableRxRTS; /*!< Enable RX RTS */ 70 uint8_t enableTxCTS; /*!< Enable TX CTS */ 71 uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information 72 please refer to the SOC corresponding RM. */ 73 74 #if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u)) 75 uint8_t txFifoWatermark; 76 uint8_t rxFifoWatermark; 77 #endif 78 } serial_port_uart_config_t; 79 #if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U)) 80 typedef struct _serial_port_uart_dma_config 81 { 82 uint32_t clockRate; /*!< clock rate */ 83 uint32_t baudRate; /*!< baud rate */ 84 serial_port_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */ 85 serial_port_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */ 86 87 uint8_t enableRx; /*!< Enable RX */ 88 uint8_t enableTx; /*!< Enable TX */ 89 uint8_t enableRxRTS; /*!< Enable RX RTS */ 90 uint8_t enableTxCTS; /*!< Enable TX CTS */ 91 uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information 92 please refer to the SOC corresponding RM. */ 93 #if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u)) 94 uint8_t txFifoWatermark; 95 uint8_t rxFifoWatermark; 96 #endif 97 uint8_t dma_instance; 98 uint8_t rx_channel; 99 uint8_t tx_channel; 100 void *dma_mux_configure; 101 void *dma_channel_mux_configure; 102 103 } serial_port_uart_dma_config_t; 104 #endif 105 /*! @} */ 106 #endif /* __SERIAL_PORT_UART_H__ */ 107
