1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _LPC_GPIO_H_
10 #define _LPC_GPIO_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup lpc_gpio
16 * @{
17 */
18
19 /*! @file */
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 /*! @name Driver version */
26 /*@{*/
27 /*! @brief LPC GPIO driver version. */
28 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 7))
29 /*@}*/
30
31 /*! @brief LPC GPIO direction definition */
32 typedef enum _gpio_pin_direction
33 {
34 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
35 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
36 } gpio_pin_direction_t;
37
38 /*!
39 * @brief The GPIO pin configuration structure.
40 *
41 * Every pin can only be configured as either output pin or input pin at a time.
42 * If configured as a input pin, then leave the outputConfig unused.
43 */
44 typedef struct _gpio_pin_config
45 {
46 gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
47 /* Output configurations, please ignore if configured as a input one */
48 uint8_t outputLogic; /*!< Set default output logic, no use in input */
49 } gpio_pin_config_t;
50
51 #if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT)
52 #define GPIO_PIN_INT_LEVEL 0x00U
53 #define GPIO_PIN_INT_EDGE 0x01U
54
55 #define PINT_PIN_INT_HIGH_OR_RISE_TRIGGER 0x00U
56 #define PINT_PIN_INT_LOW_OR_FALL_TRIGGER 0x01U
57
58 /*! @brief GPIO Pin Interrupt enable mode */
59 typedef enum _gpio_pin_enable_mode
60 {
61 kGPIO_PinIntEnableLevel = GPIO_PIN_INT_LEVEL, /*!< Generate Pin Interrupt on level mode */
62 kGPIO_PinIntEnableEdge = GPIO_PIN_INT_EDGE /*!< Generate Pin Interrupt on edge mode */
63 } gpio_pin_enable_mode_t;
64
65 /*! @brief GPIO Pin Interrupt enable polarity */
66 typedef enum _gpio_pin_enable_polarity
67 {
68 kGPIO_PinIntEnableHighOrRise =
69 PINT_PIN_INT_HIGH_OR_RISE_TRIGGER, /*!< Generate Pin Interrupt on high level or rising edge */
70 kGPIO_PinIntEnableLowOrFall =
71 PINT_PIN_INT_LOW_OR_FALL_TRIGGER /*!< Generate Pin Interrupt on low level or falling edge */
72 } gpio_pin_enable_polarity_t;
73
74 /*! @brief LPC GPIO interrupt index definition */
75 typedef enum _gpio_interrupt_index
76 {
77 kGPIO_InterruptA = 0U, /*!< Set current pin as interrupt A*/
78 kGPIO_InterruptB = 1U, /*!< Set current pin as interrupt B*/
79 } gpio_interrupt_index_t;
80
81 /*! @brief Configures the interrupt generation condition. */
82 typedef struct _gpio_interrupt_config
83 {
84 uint8_t mode; /* The trigger mode of GPIO interrupts */
85 uint8_t polarity; /* The polarity of GPIO interrupts */
86 } gpio_interrupt_config_t;
87 #endif
88
89 /*******************************************************************************
90 * API
91 ******************************************************************************/
92 #if defined(__cplusplus)
93 extern "C" {
94 #endif
95
96 /*! @name GPIO Configuration */
97 /*@{*/
98
99 /*!
100 * @brief Initializes the GPIO peripheral.
101 *
102 * This function ungates the GPIO clock.
103 *
104 * @param base GPIO peripheral base pointer.
105 * @param port GPIO port number.
106 */
107 void GPIO_PortInit(GPIO_Type *base, uint32_t port);
108
109 /*!
110 * @brief Initializes a GPIO pin used by the board.
111 *
112 * To initialize the GPIO, define a pin configuration, either input or output, in the user file.
113 * Then, call the GPIO_PinInit() function.
114 *
115 * This is an example to define an input pin or output pin configuration:
116 * @code
117 * Define a digital input pin configuration,
118 * gpio_pin_config_t config =
119 * {
120 * kGPIO_DigitalInput,
121 * 0,
122 * }
123 * Define a digital output pin configuration,
124 * gpio_pin_config_t config =
125 * {
126 * kGPIO_DigitalOutput,
127 * 0,
128 * }
129 * @endcode
130 *
131 * @param base GPIO peripheral base pointer(Typically GPIO)
132 * @param port GPIO port number
133 * @param pin GPIO pin number
134 * @param config GPIO pin configuration pointer
135 */
136 void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config);
137
138 /*@}*/
139
140 /*! @name GPIO Output Operations */
141 /*@{*/
142
143 /*!
144 * @brief Sets the output level of the one GPIO pin to the logic 1 or 0.
145 *
146 * @param base GPIO peripheral base pointer(Typically GPIO)
147 * @param port GPIO port number
148 * @param pin GPIO pin number
149 * @param output GPIO pin output logic level.
150 * - 0: corresponding pin output low-logic level.
151 * - 1: corresponding pin output high-logic level.
152 */
GPIO_PinWrite(GPIO_Type * base,uint32_t port,uint32_t pin,uint8_t output)153 static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)
154 {
155 base->B[port][pin] = output;
156 }
157
158 /*@}*/
159 /*! @name GPIO Input Operations */
160 /*@{*/
161
162 /*!
163 * @brief Reads the current input value of the GPIO PIN.
164 *
165 * @param base GPIO peripheral base pointer(Typically GPIO)
166 * @param port GPIO port number
167 * @param pin GPIO pin number
168 * @retval GPIO port input value
169 * - 0: corresponding pin input low-logic level.
170 * - 1: corresponding pin input high-logic level.
171 */
GPIO_PinRead(GPIO_Type * base,uint32_t port,uint32_t pin)172 static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)
173 {
174 return (uint32_t)base->B[port][pin];
175 }
176
177 /*@}*/
178
179 /*!
180 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
181 *
182 * @param base GPIO peripheral base pointer(Typically GPIO)
183 * @param port GPIO port number
184 * @param mask GPIO pin number macro
185 */
GPIO_PortSet(GPIO_Type * base,uint32_t port,uint32_t mask)186 static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)
187 {
188 base->SET[port] = mask;
189 }
190
191 /*!
192 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
193 *
194 * @param base GPIO peripheral base pointer(Typically GPIO)
195 * @param port GPIO port number
196 * @param mask GPIO pin number macro
197 */
GPIO_PortClear(GPIO_Type * base,uint32_t port,uint32_t mask)198 static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)
199 {
200 base->CLR[port] = mask;
201 }
202
203 /*!
204 * @brief Reverses current output logic of the multiple GPIO pins.
205 *
206 * @param base GPIO peripheral base pointer(Typically GPIO)
207 * @param port GPIO port number
208 * @param mask GPIO pin number macro
209 */
GPIO_PortToggle(GPIO_Type * base,uint32_t port,uint32_t mask)210 static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)
211 {
212 base->NOT[port] = mask;
213 }
214
215 /*@}*/
216
217 /*!
218 * @brief Reads the current input value of the whole GPIO port.
219 *
220 * @param base GPIO peripheral base pointer(Typically GPIO)
221 * @param port GPIO port number
222 */
GPIO_PortRead(GPIO_Type * base,uint32_t port)223 static inline uint32_t GPIO_PortRead(GPIO_Type *base, uint32_t port)
224 {
225 return (uint32_t)base->PIN[port];
226 }
227
228 /*@}*/
229 /*! @name GPIO Mask Operations */
230 /*@{*/
231
232 /*!
233 * @brief Sets port mask, 0 - enable pin, 1 - disable pin.
234 *
235 * @param base GPIO peripheral base pointer(Typically GPIO)
236 * @param port GPIO port number
237 * @param mask GPIO pin number macro
238 */
GPIO_PortMaskedSet(GPIO_Type * base,uint32_t port,uint32_t mask)239 static inline void GPIO_PortMaskedSet(GPIO_Type *base, uint32_t port, uint32_t mask)
240 {
241 base->MASK[port] = mask;
242 }
243
244 /*!
245 * @brief Sets the output level of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be affected.
246 *
247 * @param base GPIO peripheral base pointer(Typically GPIO)
248 * @param port GPIO port number
249 * @param output GPIO port output value.
250 */
GPIO_PortMaskedWrite(GPIO_Type * base,uint32_t port,uint32_t output)251 static inline void GPIO_PortMaskedWrite(GPIO_Type *base, uint32_t port, uint32_t output)
252 {
253 base->MPIN[port] = output;
254 }
255
256 /*!
257 * @brief Reads the current input value of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be
258 * affected.
259 *
260 * @param base GPIO peripheral base pointer(Typically GPIO)
261 * @param port GPIO port number
262 * @retval masked GPIO port value
263 */
GPIO_PortMaskedRead(GPIO_Type * base,uint32_t port)264 static inline uint32_t GPIO_PortMaskedRead(GPIO_Type *base, uint32_t port)
265 {
266 return (uint32_t)base->MPIN[port];
267 }
268
269 #if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
270 /*!
271 * @brief Set the configuration of pin interrupt.
272 *
273 * @param base GPIO base pointer.
274 * @param port GPIO port number
275 * @param pin GPIO pin number.
276 * @param config GPIO pin interrupt configuration..
277 */
278 void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config);
279
280 /*!
281 * @brief Enables multiple pins interrupt.
282 *
283 * @param base GPIO base pointer.
284 * @param port GPIO port number.
285 * @param index GPIO interrupt number.
286 * @param mask GPIO pin number macro.
287 */
288 void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
289
290 /*!
291 * @brief Disables multiple pins interrupt.
292 *
293 * @param base GPIO base pointer.
294 * @param port GPIO port number.
295 * @param index GPIO interrupt number.
296 * @param mask GPIO pin number macro.
297 */
298 void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
299
300 /*!
301 * @brief Clears pin interrupt flag. Status flags are cleared by
302 * writing a 1 to the corresponding bit position.
303 *
304 * @param base GPIO base pointer.
305 * @param port GPIO port number.
306 * @param index GPIO interrupt number.
307 * @param mask GPIO pin number macro.
308 */
309 void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
310
311 /*!
312 * @ Read port interrupt status.
313 *
314 * @param base GPIO base pointer.
315 * @param port GPIO port number
316 * @param index GPIO interrupt number.
317 * @retval masked GPIO status value
318 */
319 uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);
320
321 /*!
322 * @brief Enables the specific pin interrupt.
323 *
324 * @param base GPIO base pointer.
325 * @param port GPIO port number.
326 * @param pin GPIO pin number.
327 * @param index GPIO interrupt number.
328 */
329 void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
330
331 /*!
332 * @brief Disables the specific pin interrupt.
333 *
334 * @param base GPIO base pointer.
335 * @param port GPIO port number.
336 * @param pin GPIO pin number.
337 * @param index GPIO interrupt number.
338 */
339 void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
340
341 /*!
342 * @brief Clears the specific pin interrupt flag. Status flags are cleared by
343 * writing a 1 to the corresponding bit position.
344 *
345 * @param base GPIO base pointer.
346 * @param port GPIO port number.
347 * @param pin GPIO pin number.
348 * @param index GPIO interrupt number.
349 */
350 void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
351
352 #endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
353
354 /*@}*/
355
356 #if defined(__cplusplus)
357 }
358 #endif
359
360 /*!
361 * @}
362 */
363
364 #endif /* _LPC_GPIO_H_*/
365
