1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020, 2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_FLEXIO_H_
9 #define FSL_FLEXIO_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup flexio_driver
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief FlexIO driver version. */
25 #define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
26 /*! @} */
27
28 /*! @brief Calculate FlexIO timer trigger.*/
29 #define FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x) ((uint32_t)(x) << 1U)
30 #define FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x) (((uint32_t)(x) << 2U) | 0x1U)
31 #define FLEXIO_TIMER_TRIGGER_SEL_TIMn(x) (((uint32_t)(x) << 2U) | 0x3U)
32
33 /*! @brief Define time of timer trigger polarity.*/
34 typedef enum _flexio_timer_trigger_polarity
35 {
36 kFLEXIO_TimerTriggerPolarityActiveHigh = 0x0U, /*!< Active high. */
37 kFLEXIO_TimerTriggerPolarityActiveLow = 0x1U, /*!< Active low. */
38 } flexio_timer_trigger_polarity_t;
39
40 /*! @brief Define type of timer trigger source.*/
41 typedef enum _flexio_timer_trigger_source
42 {
43 kFLEXIO_TimerTriggerSourceExternal = 0x0U, /*!< External trigger selected. */
44 kFLEXIO_TimerTriggerSourceInternal = 0x1U, /*!< Internal trigger selected. */
45 } flexio_timer_trigger_source_t;
46
47 /*! @brief Define type of timer/shifter pin configuration.*/
48 typedef enum _flexio_pin_config
49 {
50 kFLEXIO_PinConfigOutputDisabled = 0x0U, /*!< Pin output disabled. */
51 kFLEXIO_PinConfigOpenDrainOrBidirection = 0x1U, /*!< Pin open drain or bidirectional output enable. */
52 kFLEXIO_PinConfigBidirectionOutputData = 0x2U, /*!< Pin bidirectional output data. */
53 kFLEXIO_PinConfigOutput = 0x3U, /*!< Pin output. */
54 } flexio_pin_config_t;
55
56 /*! @brief Definition of pin polarity.*/
57 typedef enum _flexio_pin_polarity
58 {
59 kFLEXIO_PinActiveHigh = 0x0U, /*!< Active high. */
60 kFLEXIO_PinActiveLow = 0x1U, /*!< Active low. */
61 } flexio_pin_polarity_t;
62
63 /*! @brief Define type of timer work mode.*/
64 typedef enum _flexio_timer_mode
65 {
66 kFLEXIO_TimerModeDisabled = 0x0U, /*!< Timer Disabled. */
67 kFLEXIO_TimerModeDual8BitBaudBit = 0x1U, /*!< Dual 8-bit counters baud/bit mode. */
68 kFLEXIO_TimerModeDual8BitPWM = 0x2U, /*!< Dual 8-bit counters PWM mode. */
69 kFLEXIO_TimerModeSingle16Bit = 0x3U, /*!< Single 16-bit counter mode. */
70 kFLEXIO_TimerModeDual8BitPWMLow = 0x6U, /*!< Dual 8-bit counters PWM Low mode. */
71 } flexio_timer_mode_t;
72
73 /*! @brief Define type of timer initial output or timer reset condition.*/
74 typedef enum _flexio_timer_output
75 {
76 kFLEXIO_TimerOutputOneNotAffectedByReset = 0x0U, /*!< Logic one when enabled and is not affected by timer
77 reset. */
78 kFLEXIO_TimerOutputZeroNotAffectedByReset = 0x1U, /*!< Logic zero when enabled and is not affected by timer
79 reset. */
80 kFLEXIO_TimerOutputOneAffectedByReset = 0x2U, /*!< Logic one when enabled and on timer reset. */
81 kFLEXIO_TimerOutputZeroAffectedByReset = 0x3U, /*!< Logic zero when enabled and on timer reset. */
82 } flexio_timer_output_t;
83
84 /*! @brief Define type of timer decrement.*/
85 typedef enum _flexio_timer_decrement_source
86 {
87 kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput = 0x0U, /*!< Decrement counter on FlexIO clock, Shift clock
88 equals Timer output. */
89 kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput, /*!< Decrement counter on Trigger input (both edges),
90 Shift clock equals Timer output. */
91 kFLEXIO_TimerDecSrcOnPinInputShiftPinInput, /*!< Decrement counter on Pin input (both edges),
92 Shift clock equals Pin input. */
93 kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput /*!< Decrement counter on Trigger input (both edges),
94 Shift clock equals Trigger input. */
95 #if (defined(FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH) && (FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH == 3))
96 ,
97 kFLEXIO_TimerDecSrcDiv16OnFlexIOClockShiftTimerOutput, /*!< Decrement counter on FlexIO clock divided by 16,
98 Shift clock equals Timer output. */
99 kFLEXIO_TimerDecSrcDiv256OnFlexIOClockShiftTimerOutput, /*!< Decrement counter on FlexIO clock divided by 256,
100 Shift clock equals Timer output. */
101 kFLEXIO_TimerRisSrcOnPinInputShiftPinInput, /*!< Decrement counter on Pin input (rising edges),
102 Shift clock equals Pin input. */
103 kFLEXIO_TimerRisSrcOnTriggerInputShiftTriggerInput /*!< Decrement counter on Trigger input (rising edges), Shift
104 clock equals Trigger input. */
105 #endif /* FSL_FEATURE_FLEXIO_TIMCFG_TIMDCE_FIELD_WIDTH */
106 } flexio_timer_decrement_source_t;
107
108 /*! @brief Define type of timer reset condition.*/
109 typedef enum _flexio_timer_reset_condition
110 {
111 kFLEXIO_TimerResetNever = 0x0U, /*!< Timer never reset. */
112 kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput = 0x2U, /*!< Timer reset on Timer Pin equal to Timer Output. */
113 kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput = 0x3U, /*!< Timer reset on Timer Trigger equal to
114 Timer Output. */
115 kFLEXIO_TimerResetOnTimerPinRisingEdge = 0x4U, /*!< Timer reset on Timer Pin rising edge. */
116 kFLEXIO_TimerResetOnTimerTriggerRisingEdge = 0x6U, /*!< Timer reset on Trigger rising edge. */
117 kFLEXIO_TimerResetOnTimerTriggerBothEdge = 0x7U, /*!< Timer reset on Trigger rising or falling edge. */
118 } flexio_timer_reset_condition_t;
119
120 /*! @brief Define type of timer disable condition.*/
121 typedef enum _flexio_timer_disable_condition
122 {
123 kFLEXIO_TimerDisableNever = 0x0U, /*!< Timer never disabled. */
124 kFLEXIO_TimerDisableOnPreTimerDisable = 0x1U, /*!< Timer disabled on Timer N-1 disable. */
125 kFLEXIO_TimerDisableOnTimerCompare = 0x2U, /*!< Timer disabled on Timer compare. */
126 kFLEXIO_TimerDisableOnTimerCompareTriggerLow = 0x3U, /*!< Timer disabled on Timer compare and Trigger Low. */
127 kFLEXIO_TimerDisableOnPinBothEdge = 0x4U, /*!< Timer disabled on Pin rising or falling edge. */
128 kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh = 0x5U, /*!< Timer disabled on Pin rising or falling edge provided
129 Trigger is high. */
130 kFLEXIO_TimerDisableOnTriggerFallingEdge = 0x6U, /*!< Timer disabled on Trigger falling edge. */
131 } flexio_timer_disable_condition_t;
132
133 /*! @brief Define type of timer enable condition.*/
134 typedef enum _flexio_timer_enable_condition
135 {
136 kFLEXIO_TimerEnabledAlways = 0x0U, /*!< Timer always enabled. */
137 kFLEXIO_TimerEnableOnPrevTimerEnable = 0x1U, /*!< Timer enabled on Timer N-1 enable. */
138 kFLEXIO_TimerEnableOnTriggerHigh = 0x2U, /*!< Timer enabled on Trigger high. */
139 kFLEXIO_TimerEnableOnTriggerHighPinHigh = 0x3U, /*!< Timer enabled on Trigger high and Pin high. */
140 kFLEXIO_TimerEnableOnPinRisingEdge = 0x4U, /*!< Timer enabled on Pin rising edge. */
141 kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh = 0x5U, /*!< Timer enabled on Pin rising edge and Trigger high. */
142 kFLEXIO_TimerEnableOnTriggerRisingEdge = 0x6U, /*!< Timer enabled on Trigger rising edge. */
143 kFLEXIO_TimerEnableOnTriggerBothEdge = 0x7U, /*!< Timer enabled on Trigger rising or falling edge. */
144 } flexio_timer_enable_condition_t;
145
146 /*! @brief Define type of timer stop bit generate condition.*/
147 typedef enum _flexio_timer_stop_bit_condition
148 {
149 kFLEXIO_TimerStopBitDisabled = 0x0U, /*!< Stop bit disabled. */
150 kFLEXIO_TimerStopBitEnableOnTimerCompare = 0x1U, /*!< Stop bit is enabled on timer compare. */
151 kFLEXIO_TimerStopBitEnableOnTimerDisable = 0x2U, /*!< Stop bit is enabled on timer disable. */
152 kFLEXIO_TimerStopBitEnableOnTimerCompareDisable = 0x3U, /*!< Stop bit is enabled on timer compare and timer
153 disable. */
154 } flexio_timer_stop_bit_condition_t;
155
156 /*! @brief Define type of timer start bit generate condition.*/
157 typedef enum _flexio_timer_start_bit_condition
158 {
159 kFLEXIO_TimerStartBitDisabled = 0x0U, /*!< Start bit disabled. */
160 kFLEXIO_TimerStartBitEnabled = 0x1U, /*!< Start bit enabled. */
161 } flexio_timer_start_bit_condition_t;
162
163 /*! @brief FlexIO as PWM channel output state */
164 typedef enum _flexio_timer_output_state
165 {
166 kFLEXIO_PwmLow = 0, /*!< The output state of PWM channel is low */
167 kFLEXIO_PwmHigh, /*!< The output state of PWM channel is high */
168 } flexio_timer_output_state_t;
169
170 /*! @brief Define type of timer polarity for shifter control. */
171 typedef enum _flexio_shifter_timer_polarity
172 {
173 kFLEXIO_ShifterTimerPolarityOnPositive = 0x0U, /*!< Shift on positive edge of shift clock. */
174 kFLEXIO_ShifterTimerPolarityOnNegitive = 0x1U, /*!< Shift on negative edge of shift clock. */
175 } flexio_shifter_timer_polarity_t;
176
177 /*! @brief Define type of shifter working mode.*/
178 typedef enum _flexio_shifter_mode
179 {
180 kFLEXIO_ShifterDisabled = 0x0U, /*!< Shifter is disabled. */
181 kFLEXIO_ShifterModeReceive = 0x1U, /*!< Receive mode. */
182 kFLEXIO_ShifterModeTransmit = 0x2U, /*!< Transmit mode. */
183 kFLEXIO_ShifterModeMatchStore = 0x4U, /*!< Match store mode. */
184 kFLEXIO_ShifterModeMatchContinuous = 0x5U, /*!< Match continuous mode. */
185 #if FSL_FEATURE_FLEXIO_HAS_STATE_MODE
186 kFLEXIO_ShifterModeState = 0x6U, /*!< SHIFTBUF contents are used for storing
187 programmable state attributes. */
188 #endif /* FSL_FEATURE_FLEXIO_HAS_STATE_MODE */
189 #if FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE
190 kFLEXIO_ShifterModeLogic = 0x7U, /*!< SHIFTBUF contents are used for implementing
191 programmable logic look up table. */
192 #endif /* FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE */
193 } flexio_shifter_mode_t;
194
195 /*! @brief Define type of shifter input source.*/
196 typedef enum _flexio_shifter_input_source
197 {
198 kFLEXIO_ShifterInputFromPin = 0x0U, /*!< Shifter input from pin. */
199 kFLEXIO_ShifterInputFromNextShifterOutput = 0x1U, /*!< Shifter input from Shifter N+1. */
200 } flexio_shifter_input_source_t;
201
202 /*! @brief Define of STOP bit configuration.*/
203 typedef enum _flexio_shifter_stop_bit
204 {
205 kFLEXIO_ShifterStopBitDisable = 0x0U, /*!< Disable shifter stop bit. */
206 kFLEXIO_ShifterStopBitLow = 0x2U, /*!< Set shifter stop bit to logic low level. */
207 kFLEXIO_ShifterStopBitHigh = 0x3U, /*!< Set shifter stop bit to logic high level. */
208 } flexio_shifter_stop_bit_t;
209
210 /*! @brief Define type of START bit configuration.*/
211 typedef enum _flexio_shifter_start_bit
212 {
213 kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable = 0x0U, /*!< Disable shifter start bit, transmitter loads
214 data on enable. */
215 kFLEXIO_ShifterStartBitDisabledLoadDataOnShift = 0x1U, /*!< Disable shifter start bit, transmitter loads
216 data on first shift. */
217 kFLEXIO_ShifterStartBitLow = 0x2U, /*!< Set shifter start bit to logic low level. */
218 kFLEXIO_ShifterStartBitHigh = 0x3U, /*!< Set shifter start bit to logic high level. */
219 } flexio_shifter_start_bit_t;
220
221 /*! @brief Define FlexIO shifter buffer type*/
222 typedef enum _flexio_shifter_buffer_type
223 {
224 kFLEXIO_ShifterBuffer = 0x0U, /*!< Shifter Buffer N Register. */
225 kFLEXIO_ShifterBufferBitSwapped = 0x1U, /*!< Shifter Buffer N Bit Byte Swapped Register. */
226 kFLEXIO_ShifterBufferByteSwapped = 0x2U, /*!< Shifter Buffer N Byte Swapped Register. */
227 kFLEXIO_ShifterBufferBitByteSwapped = 0x3U, /*!< Shifter Buffer N Bit Swapped Register. */
228 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
229 kFLEXIO_ShifterBufferNibbleByteSwapped = 0x4U, /*!< Shifter Buffer N Nibble Byte Swapped Register. */
230 #endif /*FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP*/
231 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
232 kFLEXIO_ShifterBufferHalfWordSwapped = 0x5U, /*!< Shifter Buffer N Half Word Swapped Register. */
233 #endif
234 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
235 kFLEXIO_ShifterBufferNibbleSwapped = 0x6U, /*!< Shifter Buffer N Nibble Swapped Register. */
236 #endif
237 } flexio_shifter_buffer_type_t;
238
239 /*! @brief Define FlexIO user configuration structure. */
240 typedef struct _flexio_config_
241 {
242 bool enableFlexio; /*!< Enable/disable FlexIO module */
243 #if !(defined(FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT) && (FSL_FEATURE_FLEXIO_HAS_DOZE_MODE_SUPPORT == 0))
244 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode */
245 #endif
246 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode */
247 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
248 the FlexIO clock to be at least twice the frequency of the bus clock. */
249 } flexio_config_t;
250
251 /*! @brief Define FlexIO timer configuration structure. */
252 typedef struct _flexio_timer_config
253 {
254 /* Trigger. */
255 uint32_t triggerSelect; /*!< The internal trigger selection number using MACROs. */
256 flexio_timer_trigger_polarity_t triggerPolarity; /*!< Trigger Polarity. */
257 flexio_timer_trigger_source_t triggerSource; /*!< Trigger Source, internal (see 'trgsel') or external. */
258 /* Pin. */
259 flexio_pin_config_t pinConfig; /*!< Timer Pin Configuration. */
260 uint32_t pinSelect; /*!< Timer Pin number Select. */
261 flexio_pin_polarity_t pinPolarity; /*!< Timer Pin Polarity. */
262 /* Timer. */
263 flexio_timer_mode_t timerMode; /*!< Timer work Mode. */
264 flexio_timer_output_t timerOutput; /*!< Configures the initial state of the Timer Output and
265 whether it is affected by the Timer reset. */
266 flexio_timer_decrement_source_t timerDecrement; /*!< Configures the source of the Timer decrement and the
267 source of the Shift clock. */
268 flexio_timer_reset_condition_t timerReset; /*!< Configures the condition that causes the timer counter
269 (and optionally the timer output) to be reset. */
270 flexio_timer_disable_condition_t timerDisable; /*!< Configures the condition that causes the Timer to be
271 disabled and stop decrementing. */
272 flexio_timer_enable_condition_t timerEnable; /*!< Configures the condition that causes the Timer to be
273 enabled and start decrementing. */
274 flexio_timer_stop_bit_condition_t timerStop; /*!< Timer STOP Bit generation. */
275 flexio_timer_start_bit_condition_t timerStart; /*!< Timer STRAT Bit generation. */
276 uint32_t timerCompare; /*!< Value for Timer Compare N Register. */
277 } flexio_timer_config_t;
278
279 /*! @brief Define FlexIO shifter configuration structure. */
280 typedef struct _flexio_shifter_config
281 {
282 /* Timer. */
283 uint32_t timerSelect; /*!< Selects which Timer is used for controlling the
284 logic/shift register and generating the Shift clock. */
285 flexio_shifter_timer_polarity_t timerPolarity; /*!< Timer Polarity. */
286 /* Pin. */
287 flexio_pin_config_t pinConfig; /*!< Shifter Pin Configuration. */
288 uint32_t pinSelect; /*!< Shifter Pin number Select. */
289 flexio_pin_polarity_t pinPolarity; /*!< Shifter Pin Polarity. */
290 /* Shifter. */
291 flexio_shifter_mode_t shifterMode; /*!< Configures the mode of the Shifter. */
292 #if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
293 uint32_t parallelWidth; /*!< Configures the parallel width when using parallel mode.*/
294 #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
295 flexio_shifter_input_source_t inputSource; /*!< Selects the input source for the shifter. */
296 flexio_shifter_stop_bit_t shifterStop; /*!< Shifter STOP bit. */
297 flexio_shifter_start_bit_t shifterStart; /*!< Shifter START bit. */
298 } flexio_shifter_config_t;
299
300 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER
301 /*! @brief FLEXIO gpio direction definition */
302 typedef enum _flexio_gpio_direction
303 {
304 kFLEXIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
305 kFLEXIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
306 } flexio_gpio_direction_t;
307
308 /*! @brief FLEXIO gpio input config */
309 typedef enum _flexio_pin_input_config
310 {
311 kFLEXIO_InputInterruptDisabled = 0x0U, /*!< Interrupt request is disabled. */
312 kFLEXIO_InputInterruptEnable = 0x1U, /*!< Interrupt request is enable. */
313 kFLEXIO_FlagRisingEdgeEnable = 0x2U, /*!< Input pin flag on rising edge. */
314 kFLEXIO_FlagFallingEdgeEnable = 0x4U, /*!< Input pin flag on falling edge. */
315 } flexio_pin_input_config_t;
316
317 /*!
318 * @brief The FLEXIO pin configuration structure.
319 *
320 * Each pin can only be configured as either an output pin or an input pin at a time.
321 * If configured as an input pin, use inputConfig param.
322 * If configured as an output pin, use outputLogic.
323 */
324 typedef struct _flexio_gpio_config
325 {
326 flexio_gpio_direction_t pinDirection; /*!< FLEXIO pin direction, input or output */
327 uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */
328 uint8_t inputConfig; /*!< Set an input config */
329 } flexio_gpio_config_t;
330 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER*/
331
332 /*! @brief typedef for FlexIO simulated driver interrupt handler.*/
333 typedef void (*flexio_isr_t)(void *base, void *handle);
334
335 /*******************************************************************************
336 * Variables
337 ******************************************************************************/
338 /*! @brief Pointers to flexio bases for each instance. */
339 extern FLEXIO_Type *const s_flexioBases[];
340
341 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
342 /*! @brief Pointers to flexio clocks for each instance. */
343 extern const clock_ip_name_t s_flexioClocks[];
344 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
345 /*******************************************************************************
346 * API
347 ******************************************************************************/
348
349 #if defined(__cplusplus)
350 extern "C" {
351 #endif /*_cplusplus*/
352
353 /*!
354 * @name FlexIO Initialization and De-initialization
355 * @{
356 */
357
358 /*!
359 * @brief Gets the default configuration to configure the FlexIO module. The configuration
360 * can used directly to call the FLEXIO_Configure().
361 *
362 * Example:
363 @code
364 flexio_config_t config;
365 FLEXIO_GetDefaultConfig(&config);
366 @endcode
367 *
368 * @param userConfig pointer to flexio_config_t structure
369 */
370 void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig);
371
372 /*!
373 * @brief Configures the FlexIO with a FlexIO configuration. The configuration structure
374 * can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().
375 *
376 * Example
377 @code
378 flexio_config_t config = {
379 .enableFlexio = true,
380 .enableInDoze = false,
381 .enableInDebug = true,
382 .enableFastAccess = false
383 };
384 FLEXIO_Configure(base, &config);
385 @endcode
386 *
387 * @param base FlexIO peripheral base address
388 * @param userConfig pointer to flexio_config_t structure
389 */
390 void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig);
391
392 /*!
393 * @brief Gates the FlexIO clock. Call this API to stop the FlexIO clock.
394 *
395 * @note After calling this API, call the FLEXO_Init to use the FlexIO module.
396 *
397 * @param base FlexIO peripheral base address
398 */
399 void FLEXIO_Deinit(FLEXIO_Type *base);
400
401 /*!
402 * @brief Get instance number for FLEXIO module.
403 *
404 * @param base FLEXIO peripheral base address.
405 */
406 uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
407
408 /*! @} */
409
410 /*!
411 * @name FlexIO Basic Operation
412 * @{
413 */
414
415 /*!
416 * @brief Resets the FlexIO module.
417 *
418 * @param base FlexIO peripheral base address
419 */
420 void FLEXIO_Reset(FLEXIO_Type *base);
421
422 /*!
423 * @brief Enables the FlexIO module operation.
424 *
425 * @param base FlexIO peripheral base address
426 * @param enable true to enable, false to disable.
427 */
FLEXIO_Enable(FLEXIO_Type * base,bool enable)428 static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)
429 {
430 if (enable)
431 {
432 base->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
433 }
434 else
435 {
436 base->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
437 }
438 }
439
440 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_STATUS) && FSL_FEATURE_FLEXIO_HAS_PIN_STATUS
441 /*!
442 * @brief Reads the input data on each of the FlexIO pins.
443 *
444 * @param base FlexIO peripheral base address
445 * @return FlexIO pin input data
446 */
FLEXIO_ReadPinInput(FLEXIO_Type * base)447 static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)
448 {
449 return base->PIN;
450 }
451 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_STATUS*/
452
453 #if defined(FSL_FEATURE_FLEXIO_HAS_STATE_MODE) && FSL_FEATURE_FLEXIO_HAS_STATE_MODE
454 /*!
455 * @brief Gets the current state pointer for state mode use.
456 *
457 * @param base FlexIO peripheral base address
458 * @return current State pointer
459 */
FLEXIO_GetShifterState(FLEXIO_Type * base)460 static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)
461 {
462 return ((uint8_t)(base->SHIFTSTATE) & FLEXIO_SHIFTSTATE_STATE_MASK);
463 }
464 #endif /*FSL_FEATURE_FLEXIO_HAS_STATE_MODE*/
465
466 /*!
467 * @brief Configures the shifter with the shifter configuration. The configuration structure
468 * covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper
469 * mode, select which timer controls the shifter to shift, whether to generate start bit/stop
470 * bit, and the polarity of start bit and stop bit.
471 *
472 * Example
473 @code
474 flexio_shifter_config_t config = {
475 .timerSelect = 0,
476 .timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
477 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
478 .pinPolarity = kFLEXIO_PinActiveLow,
479 .shifterMode = kFLEXIO_ShifterModeTransmit,
480 .inputSource = kFLEXIO_ShifterInputFromPin,
481 .shifterStop = kFLEXIO_ShifterStopBitHigh,
482 .shifterStart = kFLEXIO_ShifterStartBitLow
483 };
484 FLEXIO_SetShifterConfig(base, &config);
485 @endcode
486 *
487 * @param base FlexIO peripheral base address
488 * @param index Shifter index
489 * @param shifterConfig Pointer to flexio_shifter_config_t structure
490 */
491 void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig);
492 /*!
493 * @brief Configures the timer with the timer configuration. The configuration structure
494 * covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper
495 * mode, select trigger source for timer and the timer pin output and the timing for timer.
496 *
497 * Example
498 @code
499 flexio_timer_config_t config = {
500 .triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
501 .triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
502 .triggerSource = kFLEXIO_TimerTriggerSourceInternal,
503 .pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
504 .pinSelect = 0,
505 .pinPolarity = kFLEXIO_PinActiveHigh,
506 .timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
507 .timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
508 .timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
509 .timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
510 .timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
511 .timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
512 .timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
513 .timerStart = kFLEXIO_TimerStartBitEnabled
514 };
515 FLEXIO_SetTimerConfig(base, &config);
516 @endcode
517 *
518 * @param base FlexIO peripheral base address
519 * @param index Timer index
520 * @param timerConfig Pointer to the flexio_timer_config_t structure
521 */
522 void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig);
523
524 /*!
525 * @brief This function set the value of the prescaler on flexio channels
526 *
527 * @param base Pointer to the FlexIO simulated peripheral type.
528 * @param index Timer index
529 * @param clocksource Set clock value
530 */
FLEXIO_SetClockMode(FLEXIO_Type * base,uint8_t index,flexio_timer_decrement_source_t clocksource)531 static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)
532 {
533 uint32_t reg = base->TIMCFG[index];
534
535 reg &= ~FLEXIO_TIMCFG_TIMDEC_MASK;
536
537 reg |= FLEXIO_TIMCFG_TIMDEC(clocksource);
538
539 base->TIMCFG[index] = reg;
540 }
541
542 /*! @} */
543
544 /*!
545 * @name FlexIO Interrupt Operation
546 * @{
547 */
548
549 /*!
550 * @brief Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.
551 *
552 * @param base FlexIO peripheral base address
553 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
554 * @note For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate
555 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
556 */
FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type * base,uint32_t mask)557 static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
558 {
559 base->SHIFTSIEN |= mask;
560 }
561
562 /*!
563 * @brief Disables the shifter status interrupt. The interrupt won't generate when the corresponding SSF is set.
564 *
565 * @param base FlexIO peripheral base address
566 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
567 * @note For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate
568 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
569 */
FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type * base,uint32_t mask)570 static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
571 {
572 base->SHIFTSIEN &= ~mask;
573 }
574
575 /*!
576 * @brief Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.
577 *
578 * @param base FlexIO peripheral base address
579 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
580 * @note For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate
581 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
582 */
FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type * base,uint32_t mask)583 static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
584 {
585 base->SHIFTEIEN |= mask;
586 }
587
588 /*!
589 * @brief Disables the shifter error interrupt. The interrupt won't generate when the corresponding SEF is set.
590 *
591 * @param base FlexIO peripheral base address
592 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
593 * @note For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate
594 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
595 */
FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type * base,uint32_t mask)596 static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)
597 {
598 base->SHIFTEIEN &= ~mask;
599 }
600
601 /*!
602 * @brief Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.
603 *
604 * @param base FlexIO peripheral base address
605 * @param mask The timer status mask which can be calculated by (1 << timer index)
606 * @note For multiple timer status interrupt enable, for example, two timer status enable, can calculate
607 * the mask by using ((1 << timer index0) | (1 << timer index1))
608 */
FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type * base,uint32_t mask)609 static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
610 {
611 base->TIMIEN |= mask;
612 }
613
614 /*!
615 * @brief Disables the timer status interrupt. The interrupt won't generate when the corresponding SSF is set.
616 *
617 * @param base FlexIO peripheral base address
618 * @param mask The timer status mask which can be calculated by (1 << timer index)
619 * @note For multiple timer status interrupt enable, for example, two timer status enable, can calculate
620 * the mask by using ((1 << timer index0) | (1 << timer index1))
621 */
FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type * base,uint32_t mask)622 static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)
623 {
624 base->TIMIEN &= ~mask;
625 }
626
627 /*! @} */
628
629 /*!
630 * @name FlexIO Status Operation
631 * @{
632 */
633
634 /*!
635 * @brief Gets the shifter status flags.
636 *
637 * @param base FlexIO peripheral base address
638 * @return Shifter status flags
639 */
FLEXIO_GetShifterStatusFlags(FLEXIO_Type * base)640 static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)
641 {
642 return ((base->SHIFTSTAT) & FLEXIO_SHIFTSTAT_SSF_MASK);
643 }
644
645 /*!
646 * @brief Clears the shifter status flags.
647 *
648 * @param base FlexIO peripheral base address
649 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
650 * @note For clearing multiple shifter status flags, for example, two shifter status flags, can calculate
651 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
652 */
FLEXIO_ClearShifterStatusFlags(FLEXIO_Type * base,uint32_t mask)653 static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)
654 {
655 base->SHIFTSTAT = mask;
656 }
657
658 /*!
659 * @brief Gets the shifter error flags.
660 *
661 * @param base FlexIO peripheral base address
662 * @return Shifter error flags
663 */
FLEXIO_GetShifterErrorFlags(FLEXIO_Type * base)664 static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)
665 {
666 return ((base->SHIFTERR) & FLEXIO_SHIFTERR_SEF_MASK);
667 }
668
669 /*!
670 * @brief Clears the shifter error flags.
671 *
672 * @param base FlexIO peripheral base address
673 * @param mask The shifter error mask which can be calculated by (1 << shifter index)
674 * @note For clearing multiple shifter error flags, for example, two shifter error flags, can calculate
675 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
676 */
FLEXIO_ClearShifterErrorFlags(FLEXIO_Type * base,uint32_t mask)677 static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)
678 {
679 base->SHIFTERR = mask;
680 }
681
682 /*!
683 * @brief Gets the timer status flags.
684 *
685 * @param base FlexIO peripheral base address
686 * @return Timer status flags
687 */
FLEXIO_GetTimerStatusFlags(FLEXIO_Type * base)688 static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)
689 {
690 return ((base->TIMSTAT) & FLEXIO_TIMSTAT_TSF_MASK);
691 }
692
693 /*!
694 * @brief Clears the timer status flags.
695 *
696 * @param base FlexIO peripheral base address
697 * @param mask The timer status mask which can be calculated by (1 << timer index)
698 * @note For clearing multiple timer status flags, for example, two timer status flags, can calculate
699 * the mask by using ((1 << timer index0) | (1 << timer index1))
700 */
FLEXIO_ClearTimerStatusFlags(FLEXIO_Type * base,uint32_t mask)701 static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)
702 {
703 base->TIMSTAT = mask;
704 }
705
706 /*! @} */
707
708 /*!
709 * @name FlexIO DMA Operation
710 * @{
711 */
712
713 /*!
714 * @brief Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.
715 *
716 * @note For multiple shifter status DMA enables, for example, calculate
717 * the mask by using ((1 << shifter index0) | (1 << shifter index1))
718 *
719 * @param base FlexIO peripheral base address
720 * @param mask The shifter status mask which can be calculated by (1 << shifter index)
721 * @param enable True to enable, false to disable.
722 */
FLEXIO_EnableShifterStatusDMA(FLEXIO_Type * base,uint32_t mask,bool enable)723 static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)
724 {
725 if (enable)
726 {
727 base->SHIFTSDEN |= mask;
728 }
729 else
730 {
731 base->SHIFTSDEN &= ~mask;
732 }
733 }
734
735 /*!
736 * @brief Gets the shifter buffer address for the DMA transfer usage.
737 *
738 * @param base FlexIO peripheral base address
739 * @param type Shifter type of flexio_shifter_buffer_type_t
740 * @param index Shifter index
741 * @return Corresponding shifter buffer index
742 */
743 uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index);
744
745 /*!
746 * @brief Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.
747 *
748 * @param base Pointer to the FlexIO simulated peripheral type.
749 * @param handle Pointer to the handler for FlexIO simulated peripheral.
750 * @param isr FlexIO simulated peripheral interrupt handler.
751 * @retval kStatus_Success Successfully create the handle.
752 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
753 */
754 status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr);
755
756 /*!
757 * @brief Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.
758 *
759 * @param base Pointer to the FlexIO simulated peripheral type.
760 * @retval kStatus_Success Successfully create the handle.
761 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
762 */
763 status_t FLEXIO_UnregisterHandleIRQ(void *base);
764 /*! @} */
765
766 #if defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER
767
768 /*!
769 * @brief Configure a FLEXIO pin used by the board.
770 *
771 * To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file.
772 * Then, call the FLEXIO_SetPinConfig() function.
773 *
774 * This is an example to define an input pin or an output pin configuration.
775 * @code
776 * Define a digital input pin configuration,
777 * flexio_gpio_config_t config =
778 * {
779 * kFLEXIO_DigitalInput,
780 * 0U,
781 * kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
782 * }
783 * Define a digital output pin configuration,
784 * flexio_gpio_config_t config =
785 * {
786 * kFLEXIO_DigitalOutput,
787 * 0U,
788 * 0U
789 * }
790 * @endcode
791 * @param base FlexIO peripheral base address
792 * @param pin FLEXIO pin number.
793 * @param config FLEXIO pin configuration pointer.
794 */
795 void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config);
796
797 /*!
798 * @name GPIO Output Operations
799 * @{
800 */
801
802 /*!
803 * @brief Sets the output level of the multiple FLEXIO pins to the logic 0.
804 *
805 * @param base FlexIO peripheral base address
806 * @param mask FLEXIO pin number mask
807 */
FLEXIO_ClearPortOutput(FLEXIO_Type * base,uint32_t mask)808 static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)
809 {
810 base->PINOUTCLR = mask;
811 }
812
813 /*!
814 * @brief Sets the output level of the multiple FLEXIO pins to the logic 1.
815 *
816 * @param base FlexIO peripheral base address
817 * @param mask FLEXIO pin number mask
818 */
FLEXIO_SetPortOutput(FLEXIO_Type * base,uint32_t mask)819 static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)
820 {
821 base->PINOUTSET = mask;
822 }
823
824 /*!
825 * @brief Reverses the current output logic of the multiple FLEXIO pins.
826 *
827 * @param base FlexIO peripheral base address
828 * @param mask FLEXIO pin number mask
829 */
FLEXIO_TogglePortOutput(FLEXIO_Type * base,uint32_t mask)830 static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)
831 {
832 base->PINOUTTOG = mask;
833 }
834
835 /*!
836 * @brief Sets the output level of the FLEXIO pins to the logic 1 or 0.
837 *
838 * @param base FlexIO peripheral base address
839 * @param pin FLEXIO pin number.
840 * @param output FLEXIO pin output logic level.
841 * - 0: corresponding pin output low-logic level.
842 * - 1: corresponding pin output high-logic level.
843 */
FLEXIO_PinWrite(FLEXIO_Type * base,uint32_t pin,uint8_t output)844 static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)
845 {
846 if (output == 0U)
847 {
848 FLEXIO_ClearPortOutput(base, 1UL << pin);
849 }
850 else
851 {
852 FLEXIO_SetPortOutput(base, 1UL << pin);
853 }
854 }
855
856 /*!
857 * @brief Enables the FLEXIO output pin function.
858 *
859 * @param base FlexIO peripheral base address
860 * @param pin FLEXIO pin number.
861 */
FLEXIO_EnablePinOutput(FLEXIO_Type * base,uint32_t pin)862 static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)
863 {
864 base->PINOUTE |= (1UL << pin);
865 }
866 /*! @} */
867
868 /*!
869 * @name FLEXIO PIN Input Operations
870 * @{
871 */
872
873 /*!
874 * @brief Reads the current input value of the FLEXIO pin.
875 *
876 * @param base FlexIO peripheral base address
877 * @param pin FLEXIO pin number.
878 * @retval FLEXIO port input value
879 * - 0: corresponding pin input low-logic level.
880 * - 1: corresponding pin input high-logic level.
881 */
FLEXIO_PinRead(FLEXIO_Type * base,uint32_t pin)882 static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)
883 {
884 return (((base->PIN) >> pin) & 0x01U);
885 }
886
887 /*!
888 * @brief Gets the FLEXIO input pin status.
889 *
890 * @param base FlexIO peripheral base address
891 * @param pin FLEXIO pin number.
892 * @retval FLEXIO port input status
893 * - 0: corresponding pin input capture no status.
894 * - 1: corresponding pin input capture rising or falling edge.
895 */
FLEXIO_GetPinStatus(FLEXIO_Type * base,uint32_t pin)896 static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)
897 {
898 return (((base->PINSTAT) >> pin) & 0x01U);
899 }
900
901 /*!
902 * @brief Sets the FLEXIO output pin level.
903 *
904 * @param base FlexIO peripheral base address
905 * @param pin FlexIO pin number.
906 * @param level FlexIO output pin level to set, can be either 0 or 1.
907 */
FLEXIO_SetPinLevel(FLEXIO_Type * base,uint8_t pin,bool level)908 static inline void FLEXIO_SetPinLevel(FLEXIO_Type *base, uint8_t pin, bool level)
909 {
910 base->PINOUTD =
911 (base->PINOUTD & ~((uint32_t)((uint32_t)1U << pin))) |
912 (FLEXIO_PINOUTD_OUTD((uint32_t)((true == level)
913 ? (uint32_t)0x1U : (uint32_t)0x0U) << pin));
914 }
915
916 /*!
917 * @brief Gets the enabled status of a FLEXIO output pin.
918 *
919 * @param base FlexIO peripheral base address
920 * @param pin FlexIO pin number.
921 * @retval FlexIO port enabled status
922 * - 0: corresponding output pin is in disabled state.
923 * - 1: corresponding output pin is in enabled state.
924 */
FLEXIO_GetPinOverride(const FLEXIO_Type * const base,uint8_t pin)925 static inline bool FLEXIO_GetPinOverride(const FLEXIO_Type *const base, uint8_t pin)
926 {
927 return ((base->PINOUTE & (uint32_t)((uint32_t)1U << pin)) != 0UL);
928 }
929
930 /*!
931 * @brief Enables or disables a FLEXIO output pin.
932 *
933 * @param base FlexIO peripheral base address
934 * @param pin Flexio pin number.
935 * @param enabled Enable or disable the FlexIO pin.
936 */
FLEXIO_ConfigPinOverride(FLEXIO_Type * base,uint8_t pin,bool enabled)937 static inline void FLEXIO_ConfigPinOverride(FLEXIO_Type *base, uint8_t pin, bool enabled)
938 {
939 base->PINOUTE =
940 (base->PINOUTE & ~((uint32_t)((uint32_t)1U << pin))) |
941 FLEXIO_PINOUTE_OUTE((uint32_t)((true == enabled)
942 ? (uint32_t)0x1U : (uint32_t)0x0U) << pin);
943 }
944
945 /*!
946 * @brief Clears the multiple FLEXIO input pins status.
947 *
948 * @param base FlexIO peripheral base address
949 * @param mask FLEXIO pin number mask
950 */
FLEXIO_ClearPortStatus(FLEXIO_Type * base,uint32_t mask)951 static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)
952 {
953 base->PINSTAT = mask;
954 }
955 /*! @} */
956
957 #endif /*FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER*/
958
959 #if defined(__cplusplus)
960 }
961 #endif /*_cplusplus*/
962 /*! @} */
963
964 #endif /*FSL_FLEXIO_H_*/
965
