1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_FLEXIO_SPI_H_
10 #define _FSL_FLEXIO_SPI_H_
11
12 #include "fsl_common.h"
13 #include "fsl_flexio.h"
14
15 /*!
16 * @addtogroup flexio_spi
17 * @{
18 */
19
20 /*******************************************************************************
21 * Definitions
22 ******************************************************************************/
23
24 /*! @name Driver version */
25 /*@{*/
26 /*! @brief FlexIO SPI driver version 2.1.1. */
27 #define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
28 /*@}*/
29
30 #ifndef FLEXIO_SPI_DUMMYDATA
31 /*! @brief FlexIO SPI dummy transfer data, the data is sent while txData is NULL. */
32 #define FLEXIO_SPI_DUMMYDATA (0xFFFFU)
33 #endif
34
35 /*! @brief Error codes for the FlexIO SPI driver. */
36 enum _flexio_spi_status
37 {
38 kStatus_FLEXIO_SPI_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 1), /*!< FlexIO SPI is busy. */
39 kStatus_FLEXIO_SPI_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 2), /*!< SPI is idle */
40 kStatus_FLEXIO_SPI_Error = MAKE_STATUS(kStatusGroup_FLEXIO_SPI, 3), /*!< FlexIO SPI error. */
41 };
42
43 /*! @brief FlexIO SPI clock phase configuration. */
44 typedef enum _flexio_spi_clock_phase
45 {
46 kFLEXIO_SPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SPSCK occurs at the middle of the first
47 * cycle of a data transfer. */
48 kFLEXIO_SPI_ClockPhaseSecondEdge = 0x1U, /*!< First edge on SPSCK occurs at the start of the
49 * first cycle of a data transfer. */
50 } flexio_spi_clock_phase_t;
51
52 /*! @brief FlexIO SPI data shifter direction options. */
53 typedef enum _flexio_spi_shift_direction
54 {
55 kFLEXIO_SPI_MsbFirst = 0, /*!< Data transfers start with most significant bit. */
56 kFLEXIO_SPI_LsbFirst = 1, /*!< Data transfers start with least significant bit. */
57 } flexio_spi_shift_direction_t;
58
59 /*! @brief FlexIO SPI data length mode options. */
60 typedef enum _flexio_spi_data_bitcount_mode
61 {
62 kFLEXIO_SPI_8BitMode = 0x08U, /*!< 8-bit data transmission mode. */
63 kFLEXIO_SPI_16BitMode = 0x10U, /*!< 16-bit data transmission mode. */
64 } flexio_spi_data_bitcount_mode_t;
65
66 /*! @brief Define FlexIO SPI interrupt mask. */
67 enum _flexio_spi_interrupt_enable
68 {
69 kFLEXIO_SPI_TxEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */
70 kFLEXIO_SPI_RxFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */
71 };
72
73 /*! @brief Define FlexIO SPI status mask. */
74 enum _flexio_spi_status_flags
75 {
76 kFLEXIO_SPI_TxBufferEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */
77 kFLEXIO_SPI_RxBufferFullFlag = 0x2U, /*!< Receive buffer full flag. */
78 };
79
80 /*! @brief Define FlexIO SPI DMA mask. */
81 enum _flexio_spi_dma_enable
82 {
83 kFLEXIO_SPI_TxDmaEnable = 0x1U, /*!< Tx DMA request source */
84 kFLEXIO_SPI_RxDmaEnable = 0x2U, /*!< Rx DMA request source */
85 kFLEXIO_SPI_DmaAllEnable = 0x3U, /*!< All DMA request source*/
86 };
87
88 /*! @brief Define FlexIO SPI transfer flags. */
89 enum _flexio_spi_transfer_flags
90 {
91 kFLEXIO_SPI_8bitMsb = 0x1U, /*!< FlexIO SPI 8-bit MSB first */
92 kFLEXIO_SPI_8bitLsb = 0x2U, /*!< FlexIO SPI 8-bit LSB first */
93 kFLEXIO_SPI_16bitMsb = 0x9U, /*!< FlexIO SPI 16-bit MSB first */
94 kFLEXIO_SPI_16bitLsb = 0xaU, /*!< FlexIO SPI 16-bit LSB first */
95 };
96
97 /*! @brief Define FlexIO SPI access structure typedef. */
98 typedef struct _flexio_spi_type
99 {
100 FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
101 uint8_t SDOPinIndex; /*!< Pin select for data output. */
102 uint8_t SDIPinIndex; /*!< Pin select for data input. */
103 uint8_t SCKPinIndex; /*!< Pin select for clock. */
104 uint8_t CSnPinIndex; /*!< Pin select for enable. */
105 uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO SPI. */
106 uint8_t timerIndex[2]; /*!< Timer index used in FlexIO SPI. */
107 } FLEXIO_SPI_Type;
108
109 /*! @brief Define FlexIO SPI master configuration structure. */
110 typedef struct _flexio_spi_master_config
111 {
112 bool enableMaster; /*!< Enable/disable FlexIO SPI master after configuration. */
113 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
114 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
115 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
116 fast access requires the FlexIO clock to be at least
117 twice the frequency of the bus clock. */
118 uint32_t baudRate_Bps; /*!< Baud rate in Bps. */
119 flexio_spi_clock_phase_t phase; /*!< Clock phase. */
120 flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
121 } flexio_spi_master_config_t;
122
123 /*! @brief Define FlexIO SPI slave configuration structure. */
124 typedef struct _flexio_spi_slave_config
125 {
126 bool enableSlave; /*!< Enable/disable FlexIO SPI slave after configuration. */
127 bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
128 bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
129 bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers,
130 fast access requires the FlexIO clock to be at least
131 twice the frequency of the bus clock. */
132 flexio_spi_clock_phase_t phase; /*!< Clock phase. */
133 flexio_spi_data_bitcount_mode_t dataMode; /*!< 8bit or 16bit mode. */
134 } flexio_spi_slave_config_t;
135
136 /*! @brief Define FlexIO SPI transfer structure. */
137 typedef struct _flexio_spi_transfer
138 {
139 uint8_t *txData; /*!< Send buffer. */
140 uint8_t *rxData; /*!< Receive buffer. */
141 size_t dataSize; /*!< Transfer bytes. */
142 uint8_t flags; /*!< FlexIO SPI control flag, MSB first or LSB first. */
143 } flexio_spi_transfer_t;
144
145 /*! @brief typedef for flexio_spi_master_handle_t in advance. */
146 typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t;
147
148 /*! @brief Slave handle is the same with master handle. */
149 typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t;
150
151 /*! @brief FlexIO SPI master callback for finished transmit */
152 typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base,
153 flexio_spi_master_handle_t *handle,
154 status_t status,
155 void *userData);
156
157 /*! @brief FlexIO SPI slave callback for finished transmit */
158 typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base,
159 flexio_spi_slave_handle_t *handle,
160 status_t status,
161 void *userData);
162
163 /*! @brief Define FlexIO SPI handle structure. */
164 struct _flexio_spi_master_handle
165 {
166 uint8_t *txData; /*!< Transfer buffer. */
167 uint8_t *rxData; /*!< Receive buffer. */
168 size_t transferSize; /*!< Total bytes to be transferred. */
169 volatile size_t txRemainingBytes; /*!< Send data remaining in bytes. */
170 volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes. */
171 volatile uint32_t state; /*!< FlexIO SPI internal state. */
172 uint8_t bytePerFrame; /*!< SPI mode, 2bytes or 1byte in a frame */
173 flexio_spi_shift_direction_t direction; /*!< Shift direction. */
174 flexio_spi_master_transfer_callback_t callback; /*!< FlexIO SPI callback. */
175 void *userData; /*!< Callback parameter. */
176 };
177
178 /*******************************************************************************
179 * API
180 ******************************************************************************/
181
182 #if defined(__cplusplus)
183 extern "C" {
184 #endif /*_cplusplus*/
185
186 /*!
187 * @name FlexIO SPI Configuration
188 * @{
189 */
190
191 /*!
192 * @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware,
193 * and configures the FlexIO SPI with FlexIO SPI master configuration. The
194 * configuration structure can be filled by the user, or be set with default values
195 * by the FLEXIO_SPI_MasterGetDefaultConfig().
196 *
197 * @note FlexIO SPI master only support CPOL = 0, which means clock inactive low.
198 *
199 * Example
200 @code
201 FLEXIO_SPI_Type spiDev = {
202 .flexioBase = FLEXIO,
203 .SDOPinIndex = 0,
204 .SDIPinIndex = 1,
205 .SCKPinIndex = 2,
206 .CSnPinIndex = 3,
207 .shifterIndex = {0,1},
208 .timerIndex = {0,1}
209 };
210 flexio_spi_master_config_t config = {
211 .enableMaster = true,
212 .enableInDoze = false,
213 .enableInDebug = true,
214 .enableFastAccess = false,
215 .baudRate_Bps = 500000,
216 .phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
217 .direction = kFLEXIO_SPI_MsbFirst,
218 .dataMode = kFLEXIO_SPI_8BitMode
219 };
220 FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);
221 @endcode
222 *
223 * @param base Pointer to the FLEXIO_SPI_Type structure.
224 * @param masterConfig Pointer to the flexio_spi_master_config_t structure.
225 * @param srcClock_Hz FlexIO source clock in Hz.
226 */
227 void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz);
228
229 /*!
230 * @brief Gates the FlexIO clock.
231 *
232 * @param base Pointer to the FLEXIO_SPI_Type.
233 */
234 void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base);
235
236 /*!
237 * @brief Gets the default configuration to configure the FlexIO SPI master. The configuration
238 * can be used directly by calling the FLEXIO_SPI_MasterConfigure().
239 * Example:
240 @code
241 flexio_spi_master_config_t masterConfig;
242 FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);
243 @endcode
244 * @param masterConfig Pointer to the flexio_spi_master_config_t structure.
245 */
246 void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig);
247
248 /*!
249 * @brief Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware
250 * configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The
251 * configuration structure can be filled by the user, or be set with default values
252 * by the FLEXIO_SPI_SlaveGetDefaultConfig().
253 *
254 * @note Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored.
255 * FlexIO SPI slave only support CPOL = 0, which means clock inactive low.
256 * Example
257 @code
258 FLEXIO_SPI_Type spiDev = {
259 .flexioBase = FLEXIO,
260 .SDOPinIndex = 0,
261 .SDIPinIndex = 1,
262 .SCKPinIndex = 2,
263 .CSnPinIndex = 3,
264 .shifterIndex = {0,1},
265 .timerIndex = {0}
266 };
267 flexio_spi_slave_config_t config = {
268 .enableSlave = true,
269 .enableInDoze = false,
270 .enableInDebug = true,
271 .enableFastAccess = false,
272 .phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
273 .direction = kFLEXIO_SPI_MsbFirst,
274 .dataMode = kFLEXIO_SPI_8BitMode
275 };
276 FLEXIO_SPI_SlaveInit(&spiDev, &config);
277 @endcode
278 * @param base Pointer to the FLEXIO_SPI_Type structure.
279 * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
280 */
281 void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig);
282
283 /*!
284 * @brief Gates the FlexIO clock.
285 *
286 * @param base Pointer to the FLEXIO_SPI_Type.
287 */
288 void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base);
289
290 /*!
291 * @brief Gets the default configuration to configure the FlexIO SPI slave. The configuration
292 * can be used directly for calling the FLEXIO_SPI_SlaveConfigure().
293 * Example:
294 @code
295 flexio_spi_slave_config_t slaveConfig;
296 FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);
297 @endcode
298 * @param slaveConfig Pointer to the flexio_spi_slave_config_t structure.
299 */
300 void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig);
301
302 /*@}*/
303
304 /*!
305 * @name Status
306 * @{
307 */
308
309 /*!
310 * @brief Gets FlexIO SPI status flags.
311 *
312 * @param base Pointer to the FLEXIO_SPI_Type structure.
313 * @return status flag; Use the status flag to AND the following flag mask and get the status.
314 * @arg kFLEXIO_SPI_TxEmptyFlag
315 * @arg kFLEXIO_SPI_RxEmptyFlag
316 */
317
318 uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base);
319
320 /*!
321 * @brief Clears FlexIO SPI status flags.
322 *
323 * @param base Pointer to the FLEXIO_SPI_Type structure.
324 * @param mask status flag
325 * The parameter can be any combination of the following values:
326 * @arg kFLEXIO_SPI_TxEmptyFlag
327 * @arg kFLEXIO_SPI_RxEmptyFlag
328 */
329
330 void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask);
331
332 /*@}*/
333
334 /*!
335 * @name Interrupts
336 * @{
337 */
338
339 /*!
340 * @brief Enables the FlexIO SPI interrupt.
341 *
342 * This function enables the FlexIO SPI interrupt.
343 *
344 * @param base Pointer to the FLEXIO_SPI_Type structure.
345 * @param mask interrupt source. The parameter can be any combination of the following values:
346 * @arg kFLEXIO_SPI_RxFullInterruptEnable
347 * @arg kFLEXIO_SPI_TxEmptyInterruptEnable
348 */
349 void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
350
351 /*!
352 * @brief Disables the FlexIO SPI interrupt.
353 *
354 * This function disables the FlexIO SPI interrupt.
355 *
356 * @param base Pointer to the FLEXIO_SPI_Type structure.
357 * @param mask interrupt source The parameter can be any combination of the following values:
358 * @arg kFLEXIO_SPI_RxFullInterruptEnable
359 * @arg kFLEXIO_SPI_TxEmptyInterruptEnable
360 */
361 void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask);
362
363 /*@}*/
364
365 /*!
366 * @name DMA Control
367 * @{
368 */
369
370 /*!
371 * @brief Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA,
372 * which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn't trigger the DMA request.
373 *
374 * @param base Pointer to the FLEXIO_SPI_Type structure.
375 * @param mask SPI DMA source.
376 * @param enable True means enable DMA, false means disable DMA.
377 */
378 void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable);
379
380 /*!
381 * @brief Gets the FlexIO SPI transmit data register address for MSB first transfer.
382 *
383 * This function returns the SPI data register address, which is mainly used by DMA/eDMA.
384 *
385 * @param base Pointer to the FLEXIO_SPI_Type structure.
386 * @param direction Shift direction of MSB first or LSB first.
387 * @return FlexIO SPI transmit data register address.
388 */
FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)389 static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base,
390 flexio_spi_shift_direction_t direction)
391 {
392 if (direction == kFLEXIO_SPI_MsbFirst)
393 {
394 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped,
395 base->shifterIndex[0]) +
396 3U;
397 }
398 else
399 {
400 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]);
401 }
402 }
403
404 /*!
405 * @brief Gets the FlexIO SPI receive data register address for the MSB first transfer.
406 *
407 * This function returns the SPI data register address, which is mainly used by DMA/eDMA.
408 *
409 * @param base Pointer to the FLEXIO_SPI_Type structure.
410 * @param direction Shift direction of MSB first or LSB first.
411 * @return FlexIO SPI receive data register address.
412 */
FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)413 static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base,
414 flexio_spi_shift_direction_t direction)
415 {
416 if (direction == kFLEXIO_SPI_MsbFirst)
417 {
418 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferBitSwapped, base->shifterIndex[1]);
419 }
420 else
421 {
422 return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[1]) + 3U;
423 }
424 }
425
426 /*@}*/
427
428 /*!
429 * @name Bus Operations
430 * @{
431 */
432
433 /*!
434 * @brief Enables/disables the FlexIO SPI module operation.
435 *
436 * @param base Pointer to the FLEXIO_SPI_Type.
437 * @param enable True to enable, false to disable.
438 */
FLEXIO_SPI_Enable(FLEXIO_SPI_Type * base,bool enable)439 static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)
440 {
441 if (enable)
442 {
443 base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
444 }
445 else
446 {
447 base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
448 }
449 }
450
451 /*!
452 * @brief Sets baud rate for the FlexIO SPI transfer, which is only used for the master.
453 *
454 * @param base Pointer to the FLEXIO_SPI_Type structure.
455 * @param baudRate_Bps Baud Rate needed in Hz.
456 * @param srcClockHz SPI source clock frequency in Hz.
457 */
458 void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz);
459
460 /*!
461 * @brief Writes one byte of data, which is sent using the MSB method.
462 *
463 * @note This is a non-blocking API, which returns directly after the data is put into the
464 * data register but the data transfer is not finished on the bus. Ensure that
465 * the TxEmptyFlag is asserted before calling this API.
466 *
467 * @param base Pointer to the FLEXIO_SPI_Type structure.
468 * @param direction Shift direction of MSB first or LSB first.
469 * @param data 8 bit/16 bit data.
470 */
FLEXIO_SPI_WriteData(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction,uint16_t data)471 static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint16_t data)
472 {
473 if (direction == kFLEXIO_SPI_MsbFirst)
474 {
475 base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
476 }
477 else
478 {
479 base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = data;
480 }
481 }
482
483 /*!
484 * @brief Reads 8 bit/16 bit data.
485 *
486 * @note This is a non-blocking API, which returns directly after the data is read from the
487 * data register. Ensure that the RxFullFlag is asserted before calling this API.
488 *
489 * @param base Pointer to the FLEXIO_SPI_Type structure.
490 * @param direction Shift direction of MSB first or LSB first.
491 * @return 8 bit/16 bit data received.
492 */
FLEXIO_SPI_ReadData(FLEXIO_SPI_Type * base,flexio_spi_shift_direction_t direction)493 static inline uint16_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)
494 {
495 if (direction == kFLEXIO_SPI_MsbFirst)
496 {
497 return base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]];
498 }
499 else
500 {
501 return base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]];
502 }
503 }
504
505 /*!
506 * @brief Sends a buffer of data bytes.
507 *
508 * @note This function blocks using the polling method until all bytes have been sent.
509 *
510 * @param base Pointer to the FLEXIO_SPI_Type structure.
511 * @param direction Shift direction of MSB first or LSB first.
512 * @param buffer The data bytes to send.
513 * @param size The number of data bytes to send.
514 */
515 void FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base,
516 flexio_spi_shift_direction_t direction,
517 const uint8_t *buffer,
518 size_t size);
519
520 /*!
521 * @brief Receives a buffer of bytes.
522 *
523 * @note This function blocks using the polling method until all bytes have been received.
524 *
525 * @param base Pointer to the FLEXIO_SPI_Type structure.
526 * @param direction Shift direction of MSB first or LSB first.
527 * @param buffer The buffer to store the received bytes.
528 * @param size The number of data bytes to be received.
529 * @param direction Shift direction of MSB first or LSB first.
530 */
531 void FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base,
532 flexio_spi_shift_direction_t direction,
533 uint8_t *buffer,
534 size_t size);
535
536 /*!
537 * @brief Receives a buffer of bytes.
538 *
539 * @note This function blocks via polling until all bytes have been received.
540 *
541 * @param base pointer to FLEXIO_SPI_Type structure
542 * @param xfer FlexIO SPI transfer structure, see #flexio_spi_transfer_t.
543 */
544 void FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer);
545
546 /*Transactional APIs*/
547
548 /*!
549 * @name Transactional
550 * @{
551 */
552
553 /*!
554 * @brief Initializes the FlexIO SPI Master handle, which is used in transactional functions.
555 *
556 * @param base Pointer to the FLEXIO_SPI_Type structure.
557 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
558 * @param callback The callback function.
559 * @param userData The parameter of the callback function.
560 * @retval kStatus_Success Successfully create the handle.
561 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
562 */
563 status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base,
564 flexio_spi_master_handle_t *handle,
565 flexio_spi_master_transfer_callback_t callback,
566 void *userData);
567
568 /*!
569 * @brief Master transfer data using IRQ.
570 *
571 * This function sends data using IRQ. This is a non-blocking function, which returns
572 * right away. When all data is sent out/received, the callback function is called.
573 *
574 * @param base Pointer to the FLEXIO_SPI_Type structure.
575 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
576 * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
577 * @retval kStatus_Success Successfully start a transfer.
578 * @retval kStatus_InvalidArgument Input argument is invalid.
579 * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle, is running another transfer.
580 */
581 status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base,
582 flexio_spi_master_handle_t *handle,
583 flexio_spi_transfer_t *xfer);
584
585 /*!
586 * @brief Aborts the master data transfer, which used IRQ.
587 *
588 * @param base Pointer to the FLEXIO_SPI_Type structure.
589 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
590 */
591 void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle);
592
593 /*!
594 * @brief Gets the data transfer status which used IRQ.
595 *
596 * @param base Pointer to the FLEXIO_SPI_Type structure.
597 * @param handle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
598 * @param count Number of bytes transferred so far by the non-blocking transaction.
599 * @retval kStatus_InvalidArgument count is Invalid.
600 * @retval kStatus_Success Successfully return the count.
601 */
602 status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count);
603
604 /*!
605 * @brief FlexIO SPI master IRQ handler function.
606 *
607 * @param spiType Pointer to the FLEXIO_SPI_Type structure.
608 * @param spiHandle Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
609 */
610 void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle);
611
612 /*!
613 * @brief Initializes the FlexIO SPI Slave handle, which is used in transactional functions.
614 *
615 * @param base Pointer to the FLEXIO_SPI_Type structure.
616 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
617 * @param callback The callback function.
618 * @param userData The parameter of the callback function.
619 * @retval kStatus_Success Successfully create the handle.
620 * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range.
621 */
622 status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base,
623 flexio_spi_slave_handle_t *handle,
624 flexio_spi_slave_transfer_callback_t callback,
625 void *userData);
626
627 /*!
628 * @brief Slave transfer data using IRQ.
629 *
630 * This function sends data using IRQ. This is a non-blocking function, which returns
631 * right away. When all data is sent out/received, the callback function is called.
632 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
633 *
634 * @param base Pointer to the FLEXIO_SPI_Type structure.
635 * @param xfer FlexIO SPI transfer structure. See #flexio_spi_transfer_t.
636 * @retval kStatus_Success Successfully start a transfer.
637 * @retval kStatus_InvalidArgument Input argument is invalid.
638 * @retval kStatus_FLEXIO_SPI_Busy SPI is not idle; it is running another transfer.
639 */
640 status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base,
641 flexio_spi_slave_handle_t *handle,
642 flexio_spi_transfer_t *xfer);
643
644 /*!
645 * @brief Aborts the slave data transfer which used IRQ, share same API with master.
646 *
647 * @param base Pointer to the FLEXIO_SPI_Type structure.
648 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
649 */
FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type * base,flexio_spi_slave_handle_t * handle)650 static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)
651 {
652 FLEXIO_SPI_MasterTransferAbort(base, handle);
653 }
654 /*!
655 * @brief Gets the data transfer status which used IRQ, share same API with master.
656 *
657 * @param base Pointer to the FLEXIO_SPI_Type structure.
658 * @param handle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
659 * @param count Number of bytes transferred so far by the non-blocking transaction.
660 * @retval kStatus_InvalidArgument count is Invalid.
661 * @retval kStatus_Success Successfully return the count.
662 */
FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type * base,flexio_spi_slave_handle_t * handle,size_t * count)663 static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base,
664 flexio_spi_slave_handle_t *handle,
665 size_t *count)
666 {
667 return FLEXIO_SPI_MasterTransferGetCount(base, handle, count);
668 }
669
670 /*!
671 * @brief FlexIO SPI slave IRQ handler function.
672 *
673 * @param spiType Pointer to the FLEXIO_SPI_Type structure.
674 * @param spiHandle Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
675 */
676 void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle);
677
678 /*@}*/
679
680 #if defined(__cplusplus)
681 }
682 #endif /*_cplusplus*/
683 /*@}*/
684
685 #endif /*_FSL_FLEXIO_SPI_H_*/
686
