1 /* 2 * Copyright (c) 2021 Antony Pavlov <antonynpavlov@gmail.com> 3 * 4 * Register names for o32 ABI, see [1] for details. 5 * 6 * [1] See MIPS Run (The Morgan Kaufmann Series in Computer 7 * Architecture and Design) 2nd Edition by Dominic Sweetman 8 * 9 * SPDX-License-Identifier: Apache-2.0 10 */ 11 12 #ifndef ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_REGDEF_H_ 13 #define ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_REGDEF_H_ 14 15 /* always 0 */ 16 #define zero $0 17 18 /* assembly temporary */ 19 #define AT $1 20 21 /* subroutine return values */ 22 #define v0 $2 23 #define v1 $3 24 25 /* arguments */ 26 #define a0 $4 27 #define a1 $5 28 #define a2 $6 29 #define a3 $7 30 31 /* temporaries */ 32 #define t0 $8 33 #define t1 $9 34 #define t2 $10 35 #define t3 $11 36 #define t4 $12 37 #define t5 $13 38 #define t6 $14 39 #define t7 $15 40 41 /* subroutine register variables */ 42 #define s0 $16 43 #define s1 $17 44 #define s2 $18 45 #define s3 $19 46 #define s4 $20 47 #define s5 $21 48 #define s6 $22 49 #define s7 $23 50 51 /* temporaries */ 52 #define t8 $24 53 #define t9 $25 54 55 /* interrupt/trap handler scratch registers */ 56 #define k0 $26 57 #define k1 $27 58 59 /* global pointer */ 60 #define gp $28 61 62 /* stack pointer */ 63 #define sp $29 64 65 /* frame pointer / ninth subroutine register variable */ 66 #define fp $30 67 #define s8 $30 68 69 /* return address */ 70 #define ra $31 71 72 #endif /* ZEPHYR_ARCH_MIPS_INCLUDE_MIPS_REGDEF_H_ */ 73
