1 /* 2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef _CMSIS_RENAME_EXCEPTIONS_H 8 #define _CMSIS_RENAME_EXCEPTIONS_H 9 10 #if LIB_CMSIS_CORE 11 // PICO_CONFIG: PICO_CMSIS_RENAME_EXCEPTIONS, Whether to rename SDK exceptions such as isr_nmi to their CMSIS equivalent i.e. NMI_Handler, type=bool, default=1, group=cmsis_core 12 13 // Note that since this header is included at the config stage, if you wish to override this you should do so via build compiler define 14 #ifndef PICO_CMSIS_RENAME_EXCEPTIONS 15 #define PICO_CMSIS_RENAME_EXCEPTIONS 1 16 #endif 17 18 #if PICO_CMSIS_RENAME_EXCEPTIONS 19 #if PICO_RP2040 20 #define isr_nmi NMI_Handler 21 #define isr_hardfault HardFault_Handler 22 #define isr_svcall SVC_Handler 23 #define isr_pendsv PendSV_Handler 24 #define isr_systick SysTick_Handler 25 #define isr_irq0 TIMER_IRQ_0_Handler 26 #define isr_irq1 TIMER_IRQ_1_Handler 27 #define isr_irq2 TIMER_IRQ_2_Handler 28 #define isr_irq3 TIMER_IRQ_3_Handler 29 #define isr_irq4 PWM_IRQ_WRAP_Handler 30 #define isr_irq5 USBCTRL_IRQ_Handler 31 #define isr_irq6 XIP_IRQ_Handler 32 #define isr_irq7 PIO0_IRQ_0_Handler 33 #define isr_irq8 PIO0_IRQ_1_Handler 34 #define isr_irq9 PIO1_IRQ_0_Handler 35 #define isr_irq10 PIO1_IRQ_1_Handler 36 #define isr_irq11 DMA_IRQ_0_Handler 37 #define isr_irq12 DMA_IRQ_1_Handler 38 #define isr_irq13 IO_IRQ_BANK0_Handler 39 #define isr_irq14 IO_IRQ_QSPI_Handler 40 #define isr_irq15 SIO_IRQ_PROC0_Handler 41 #define isr_irq16 SIO_IRQ_PROC1_Handler 42 #define isr_irq17 CLOCKS_IRQ_Handler 43 #define isr_irq18 SPI0_IRQ_Handler 44 #define isr_irq19 SPI1_IRQ_Handler 45 #define isr_irq20 UART0_IRQ_Handler 46 #define isr_irq21 UART1_IRQ_Handler 47 #define isr_irq22 ADC_IRQ_FIFO_Handler 48 #define isr_irq23 I2C0_IRQ_Handler 49 #define isr_irq24 I2C1_IRQ_Handler 50 #define isr_irq25 RTC_IRQ_Handler 51 #endif 52 #if PICO_RP2350 53 #define isr_nmi NMI_Handler 54 #define isr_hardfault HardFault_Handler 55 #define isr_svcall SVC_Handler 56 #define isr_pendsv PendSV_Handler 57 #define isr_systick SysTick_Handler 58 #define isr_irq0 TIMER0_IRQ_0_Handler 59 #define isr_irq1 TIMER0_IRQ_1_Handler 60 #define isr_irq2 TIMER0_IRQ_2_Handler 61 #define isr_irq3 TIMER0_IRQ_3_Handler 62 #define isr_irq4 TIMER1_IRQ_0_Handler 63 #define isr_irq5 TIMER1_IRQ_1_Handler 64 #define isr_irq6 TIMER1_IRQ_2_Handler 65 #define isr_irq7 TIMER1_IRQ_3_Handler 66 #define isr_irq8 PWM_IRQ_WRAP_0_Handler 67 #define isr_irq9 PWM_IRQ_WRAP_1_Handler 68 #define isr_irq10 DMA_IRQ_0_Handler 69 #define isr_irq11 DMA_IRQ_1_Handler 70 #define isr_irq12 DMA_IRQ_2_Handler 71 #define isr_irq13 DMA_IRQ_3_Handler 72 #define isr_irq14 USBCTRL_IRQ_Handler 73 #define isr_irq15 PIO0_IRQ_0_Handler 74 #define isr_irq16 PIO0_IRQ_1_Handler 75 #define isr_irq17 PIO1_IRQ_0_Handler 76 #define isr_irq18 PIO1_IRQ_1_Handler 77 #define isr_irq19 PIO2_IRQ_0_Handler 78 #define isr_irq20 PIO2_IRQ_1_Handler 79 #define isr_irq21 IO_IRQ_BANK0_Handler 80 #define isr_irq22 IO_IRQ_BANK0_NS_Handler 81 #define isr_irq23 IO_IRQ_QSPI_Handler 82 #define isr_irq24 IO_IRQ_QSPI_NS_Handler 83 #define isr_irq25 SIO_IRQ_FIFO_Handler 84 #define isr_irq26 SIO_IRQ_BELL_Handler 85 #define isr_irq27 SIO_IRQ_FIFO_NS_Handler 86 #define isr_irq28 SIO_IRQ_BELL_NS_Handler 87 #define isr_irq29 SIO_IRQ_MTIMECMP_Handler 88 #define isr_irq30 CLOCKS_IRQ_Handler 89 #define isr_irq31 SPI0_IRQ_Handler 90 #define isr_irq32 SPI1_IRQ_Handler 91 #define isr_irq33 UART0_IRQ_Handler 92 #define isr_irq34 UART1_IRQ_Handler 93 #define isr_irq35 ADC_IRQ_FIFO_Handler 94 #define isr_irq36 I2C0_IRQ_Handler 95 #define isr_irq37 I2C1_IRQ_Handler 96 #define isr_irq38 OTP_IRQ_Handler 97 #define isr_irq39 TRNG_IRQ_Handler 98 #define isr_irq42 PLL_SYS_IRQ_Handler 99 #define isr_irq43 PLL_USB_IRQ_Handler 100 #define isr_irq44 POWMAN_IRQ_POW_Handler 101 #define isr_irq45 POWMAN_IRQ_TIMER_Handler 102 #endif 103 #endif 104 105 #endif 106 #endif /* _CMSIS_RENAME_EXCEPTIONS_H */ 107
