1 /*!
2 \file gd32l23x_syscfg.c
3 \brief SYSCFG driver
4
5 \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 */
7
8 /*
9 Copyright (c) 2021, GigaDevice Semiconductor Inc.
10
11 Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13
14 1. Redistributions of source code must retain the above copyright notice, this
15 list of conditions and the following disclaimer.
16 2. Redistributions in binary form must reproduce the above copyright notice,
17 this list of conditions and the following disclaimer in the documentation
18 and/or other materials provided with the distribution.
19 3. Neither the name of the copyright holder nor the names of its contributors
20 may be used to endorse or promote products derived from this software without
21 specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34
35 #include "gd32l23x_syscfg.h"
36
37 /*!
38 \brief reset the SYSCFG registers
39 \param[in] none
40 \param[out] none
41 \retval none
42 */
syscfg_deinit(void)43 void syscfg_deinit(void)
44 {
45 rcu_periph_reset_enable(RCU_SYSCFGRST);
46 rcu_periph_reset_disable(RCU_SYSCFGRST);
47 }
48
49 /*!
50 \brief configure the GPIO pin as EXTI Line
51 \param[in] exti_port: specify the GPIO port used in EXTI
52 only one parameter can be selected which is shown as below:
53 \arg EXTI_SOURCE_GPIOx(x = A,B,C,D,F): EXTI GPIO port
54 \param[in] exti_pin: specify the EXTI line
55 only one parameter can be selected which is shown as below:
56 \arg EXTI_SOURCE_PINx(GPIOAx = 0..15, GPIOBx = 0..15, GPIOCx = 0..15, GPIODx = 0..6,8,9, GPIOFx = 0,1): EXTI GPIO pin
57 \param[out] none
58 \retval none
59 */
syscfg_exti_line_config(uint8_t exti_port,uint8_t exti_pin)60 void syscfg_exti_line_config(uint8_t exti_port, uint8_t exti_pin)
61 {
62 uint32_t clear_exti_mask = ~((uint32_t)EXTI_SS_MASK << (EXTI_SS_MSTEP(exti_pin)));
63 uint32_t config_exti_mask = ((uint32_t)exti_port) << (EXTI_SS_MSTEP(exti_pin));
64
65 switch(exti_pin / EXTI_SS_JSTEP) {
66 case EXTISS0:
67 /* clear EXTI source line(0..3) */
68 SYSCFG_EXTISS0 &= clear_exti_mask;
69 /* configure EXTI soure line(0..3) */
70 SYSCFG_EXTISS0 |= config_exti_mask;
71 break;
72 case EXTISS1:
73 /* clear EXTI soure line(4..7) */
74 SYSCFG_EXTISS1 &= clear_exti_mask;
75 /* configure EXTI soure line(4..7) */
76 SYSCFG_EXTISS1 |= config_exti_mask;
77 break;
78 case EXTISS2:
79 /* clear EXTI soure line(8..11) */
80 SYSCFG_EXTISS2 &= clear_exti_mask;
81 /* configure EXTI soure line(8..11) */
82 SYSCFG_EXTISS2 |= config_exti_mask;
83 break;
84 case EXTISS3:
85 /* clear EXTI soure line(12..15) */
86 SYSCFG_EXTISS3 &= clear_exti_mask;
87 /* configure EXTI soure line(12..15) */
88 SYSCFG_EXTISS3 |= config_exti_mask;
89 break;
90 default:
91 break;
92 }
93 }
94
95 /*!
96 \brief enable remap pin function for small packages
97 \param[in] remap_pin
98 one or more parameters can be selected which are shown as below:
99 \arg SYSCFG_PA11_PA12_REMAP: PA11 PA12 remap
100 \arg SYSCFG_BOOT0_PD3_REMAP: BOOT0 PD3 remap
101 \param[out] none
102 \retval none
103 */
syscfg_pin_remap_enable(uint32_t remap_pin)104 void syscfg_pin_remap_enable(uint32_t remap_pin)
105 {
106 SYSCFG_CFG0 |= remap_pin;
107 }
108
109 /*!
110 \brief disable remap pin function for small packages
111 \param[in] remap_pin
112 one or more parameters can be selected which are shown as below:
113 \arg SYSCFG_PA11_PA12_REMAP: PA11 PA12 remap
114 \arg SYSCFG_BOOT0_PD3_REMAP: BOOT0 PD3 remap
115 \param[out] none
116 \retval none
117 */
syscfg_pin_remap_disable(uint32_t remap_pin)118 void syscfg_pin_remap_disable(uint32_t remap_pin)
119 {
120 SYSCFG_CFG0 &= ~remap_pin;
121 }
122
123 /*!
124 \brief enable PBx(x=6,7,8,9) high current capability
125 \param[in] syscfg_gpio
126 one or more parameters can be selected which are shown as below:
127 \arg SYSCFG_PB6_HIGH_CURRENT: PB6 pin high current capability
128 \arg SYSCFG_PB7_HIGH_CURRENT: PB7 pin high current capability
129 \arg SYSCFG_PB8_HIGH_CURRENT: PB8 pin high current capability
130 \arg SYSCFG_PB9_HIGH_CURRENT: PB9 pin high current capability
131 \param[out] none
132 \retval none
133 */
syscfg_high_current_enable(uint32_t syscfg_gpio)134 void syscfg_high_current_enable(uint32_t syscfg_gpio)
135 {
136 SYSCFG_CFG0 |= syscfg_gpio;
137 }
138
139 /*!
140 \brief disable PBx(x=6,7,8,9) high current capability
141 \param[in] syscfg_gpio
142 one or more parameters can be selected which are shown as below:
143 \arg SYSCFG_PB6_HIGH_CURRENT: PB6 pin high current capability
144 \arg SYSCFG_PB7_HIGH_CURRENT: PB7 pin high current capability
145 \arg SYSCFG_PB8_HIGH_CURRENT: PB8 pin high current capability
146 \arg SYSCFG_PB9_HIGH_CURRENT: PB9 pin high current capability
147 \param[out] none
148 \retval none
149 */
syscfg_high_current_disable(uint32_t syscfg_gpio)150 void syscfg_high_current_disable(uint32_t syscfg_gpio)
151 {
152 SYSCFG_CFG0 &= (uint32_t)~syscfg_gpio;
153 }
154
155 /*!
156 \brief set the IRQ_LATENCY value
157 \param[in] irq_latency: IRQ_LATENCY value (0x00 - 0xFF)
158 \param[out] none
159 \retval none
160 */
irq_latency_set(uint8_t irq_latency)161 void irq_latency_set(uint8_t irq_latency)
162 {
163 uint32_t reg;
164
165 reg = SYSCFG_CPU_IRQ_LAT & (~(uint32_t)SYSCFG_CPU_IRQ_LAT_IRQ_LATENCY);
166 reg |= (uint32_t)(IRQ_LATENCY(irq_latency));
167
168 SYSCFG_CPU_IRQ_LAT = (uint32_t)reg;
169 }
170
171 /*!
172 \brief get the current boot mode
173 \param[in] none
174 \param[out] none
175 \retval the boot mode
176 \arg SYSCFG_BOOTMODE_FLASH: boot from the main flash
177 \arg SYSCFG_BOOTMODE_SYSTEM: boot from the system flash memory
178 \arg SYSCFG_BOOTMODE_SRAM: boot from the embedded SRAM
179 */
syscfg_bootmode_get(void)180 uint8_t syscfg_bootmode_get(void)
181 {
182 /* get the bootmode */
183 uint8_t temp = (uint8_t)(SYSCFG_CFG0 & 0x03U);
184
185 return temp;
186 }
187
