1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #pragma once
16 
17 #include <stdbool.h>
18 #include "hal/interrupt_controller_types.h"
19 #include "hal/interrupt_controller_ll.h"
20 #include "soc/soc_caps.h"
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
26 #ifndef SOC_CPU_HAS_FLEXIBLE_INTC
27 /**
28  * @brief Gets target platform interrupt descriptor table
29  *
30  * @return Address of interrupt descriptor table
31  */
32 __attribute__((pure))  const int_desc_t *interrupt_controller_hal_desc_table(void);
33 #endif
34 
35 /**
36  * @brief Gets the interrupt type given an interrupt number.
37  *
38  * @param interrupt_number Interrupt number 0 to 31
39  * @return interrupt type
40  */
41 __attribute__((pure))  int_type_t interrupt_controller_hal_desc_type(int interrupt_number);
42 
43 /**
44  * @brief Gets the interrupt level given an interrupt number.
45  *
46  * @param interrupt_number Interrupt number 0 to 31
47  * @return interrupt level bitmask
48  */
49 __attribute__((pure))  int interrupt_controller_hal_desc_level(int interrupt_number);
50 
51 /**
52  * @brief Gets the cpu flags given the interrupt number and target cpu.
53  *
54  * @param interrupt_number Interrupt number 0 to 31
55  * @param cpu_number CPU number between 0 and SOC_CPU_CORES_NUM - 1
56  * @return flags for that interrupt number
57  */
58 __attribute__((pure))  int_desc_flag_t interrupt_controller_hal_desc_flags(int interrupt_number, int cpu_number);
59 
60 /**
61  * @brief Gets the interrupt type given an interrupt number.
62  *
63  * @param interrupt_number Interrupt number 0 to 31
64  * @return interrupt type
65  */
interrupt_controller_hal_get_type(int interrupt_number)66 static inline int_type_t interrupt_controller_hal_get_type(int interrupt_number)
67 {
68     return interrupt_controller_hal_desc_type(interrupt_number);
69 }
70 
71 /**
72  * @brief Gets the interrupt level given an interrupt number.
73  *
74  * @param interrupt_number Interrupt number 0 to 31
75  * @return interrupt level bitmask
76  */
interrupt_controller_hal_get_level(int interrupt_number)77 static inline int interrupt_controller_hal_get_level(int interrupt_number)
78 {
79     return interrupt_controller_hal_desc_level(interrupt_number);
80 }
81 
82 #ifdef SOC_CPU_HAS_FLEXIBLE_INTC
83 /**
84  * @brief Set the type of an interrupt in the controller.
85  *
86  * @param interrupt_number Interrupt number 0 to 31
87  * @param type interrupt type as edge or level triggered
88  */
interrupt_controller_hal_set_int_type(int intr,int_type_t type)89 static inline void interrupt_controller_hal_set_int_type(int intr, int_type_t type)
90 {
91     intr_cntrl_ll_set_int_type(intr, type);
92 }
93 
94 /**
95  * @brief Sets the interrupt level int the interrupt controller.
96  *
97  * @param interrupt_number Interrupt number 0 to 31
98  * @param level priority between 1 (lowest) to 7 (highest)
99  */
interrupt_controller_hal_set_int_level(int intr,int level)100 static inline void interrupt_controller_hal_set_int_level(int intr, int level)
101 {
102     intr_cntrl_ll_set_int_level(intr, level);
103 }
104 #endif
105 
106 /**
107  * @brief Gets the cpu flags given the interrupt number and target cpu.
108  *
109  * @param interrupt_number Interrupt number 0 to 31
110  * @param cpu_number CPU number between 0 and SOC_CPU_CORES_NUM - 1
111  * @return flags for that interrupt number
112  */
interrupt_controller_hal_get_cpu_desc_flags(int interrupt_number,int cpu_number)113 static inline uint32_t interrupt_controller_hal_get_cpu_desc_flags(int interrupt_number, int cpu_number)
114 {
115     return interrupt_controller_hal_desc_flags(interrupt_number, cpu_number);
116 }
117 
118 /**
119  * @brief enable interrupts specified by the mask
120  *
121  * @param mask bitmask of interrupts that needs to be enabled
122  */
interrupt_controller_hal_enable_interrupts(uint32_t mask)123 static inline void interrupt_controller_hal_enable_interrupts(uint32_t mask)
124 {
125     intr_cntrl_ll_enable_interrupts(mask);
126 }
127 
128 /**
129  * @brief disable interrupts specified by the mask
130  *
131  * @param mask bitmask of interrupts that needs to be disabled
132  */
interrupt_controller_hal_disable_interrupts(uint32_t mask)133 static inline void interrupt_controller_hal_disable_interrupts(uint32_t mask)
134 {
135     intr_cntrl_ll_disable_interrupts(mask);
136 }
137 
138 /**
139  * @brief checks if given interrupt number has a valid handler
140  *
141  * @param intr interrupt number ranged from 0 to 31
142  * @param cpu cpu number ranged betweeen 0 to SOC_CPU_CORES_NUM - 1
143  * @return true for valid handler, false otherwise
144  */
interrupt_controller_hal_has_handler(int intr,int cpu)145 static inline bool interrupt_controller_hal_has_handler(int intr, int cpu)
146 {
147     return intr_cntrl_ll_has_handler(intr, cpu);
148 }
149 
150 /**
151  * @brief sets interrupt handler and optional argument of a given interrupt number
152  *
153  * @param intr interrupt number ranged from 0 to 31
154  * @param handler handler invoked when an interrupt occurs
155  * @param arg optional argument to pass to the handler
156  */
interrupt_controller_hal_set_int_handler(uint8_t intr,interrupt_handler_t handler,void * arg)157 static inline void interrupt_controller_hal_set_int_handler(uint8_t intr, interrupt_handler_t handler, void *arg)
158 {
159     intr_cntrl_ll_set_int_handler(intr, handler, arg);
160 }
161 
162 /**
163  * @brief Gets argument passed to handler of a given interrupt number
164  *
165  * @param intr interrupt number ranged from 0 to 31
166  *
167  * @return argument used by handler of passed interrupt number
168  */
interrupt_controller_hal_get_int_handler_arg(uint8_t intr)169 static inline void * interrupt_controller_hal_get_int_handler_arg(uint8_t intr)
170 {
171     return intr_cntrl_ll_get_int_handler_arg(intr);
172 }
173 
174 /**
175  * @brief Disables interrupts that are not located in iram
176  *
177  * @param newmask mask of interrupts needs to be disabled
178  * @return oldmask where to store old interrupts state
179  */
interrupt_controller_hal_disable_int_mask(uint32_t newmask)180 static inline uint32_t interrupt_controller_hal_disable_int_mask(uint32_t newmask)
181 {
182     return intr_cntrl_ll_disable_int_mask(newmask);
183 }
184 
185 /**
186  * @brief Enables interrupts that are not located in iram
187  *
188  * @param newmask mask of interrupts needs to be disabled
189  */
interrupt_controller_hal_enable_int_mask(uint32_t newmask)190 static inline void interrupt_controller_hal_enable_int_mask(uint32_t newmask)
191 {
192     intr_cntrl_ll_enable_int_mask(newmask);
193 }
194 
195 /**
196  * @brief Acknowledge an edge-trigger interrupt by clearing its pending flag
197  *
198  * @param intr interrupt number ranged from 0 to 31
199  */
interrupt_controller_hal_edge_int_acknowledge(int intr)200 static inline void interrupt_controller_hal_edge_int_acknowledge(int intr)
201 {
202     intr_cntrl_ll_edge_int_acknowledge(intr);
203 }
204 
205 #ifdef __cplusplus
206 }
207 #endif
208