1 /*
2 * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_elementwise_add_s8
22 * Description: Element wise add
23 *
24 * $Date: 01. March 2021
25 * $Revision: V.2.5.3
26 *
27 * Target Processor: Cortex-M CPUs
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33 #if defined(ARM_MATH_MVEI)
34 #include "arm_helium_utils.h"
35 #endif
36
37 #if defined(ARM_MATH_MVEI)
38 #define SAT_INPUT_VECT(__INPUT_V, __MULT, __SHIFT) \
39 __INPUT_V = arm_doubling_high_mult_mve(__INPUT_V, __MULT); \
40 __INPUT_V = arm_divide_by_power_of_two_mve(__INPUT_V, -__SHIFT);
41 #endif
42
43 /**
44 * @note The *_no_sat API does not mean that the input not saturated, Since
45 * __MULT is a positive integer, it is saturated. The API definition
46 * has more info about it.
47 */
48 #define SAT_INPUT(__INPUT, __MULT, __SHIFT) \
49 __INPUT = arm_nn_doubling_high_mult_no_sat(__INPUT, __MULT); \
50 __INPUT = arm_nn_divide_by_power_of_two(__INPUT, -__SHIFT);
51
52 /**
53 * @ingroup groupNN
54 */
55
56 /**
57 * @addtogroup BasicMath
58 * @{
59 */
60
61 /*
62 * s8 element wise add
63 *
64 * Refer header file for details.
65 *
66 */
67
68 /* Note: __SHIFT is expected to be <=0 */
69
arm_elementwise_add_s8(const int8_t * input_1_vect,const int8_t * input_2_vect,const int32_t input_1_offset,const int32_t input_1_mult,const int32_t input_1_shift,const int32_t input_2_offset,const int32_t input_2_mult,const int32_t input_2_shift,const int32_t left_shift,int8_t * output,const int32_t out_offset,const int32_t out_mult,const int32_t out_shift,const int32_t out_activation_min,const int32_t out_activation_max,const uint32_t block_size)70 arm_status arm_elementwise_add_s8(const int8_t *input_1_vect,
71 const int8_t *input_2_vect,
72 const int32_t input_1_offset,
73 const int32_t input_1_mult,
74 const int32_t input_1_shift,
75 const int32_t input_2_offset,
76 const int32_t input_2_mult,
77 const int32_t input_2_shift,
78 const int32_t left_shift,
79 int8_t *output,
80 const int32_t out_offset,
81 const int32_t out_mult,
82 const int32_t out_shift,
83 const int32_t out_activation_min,
84 const int32_t out_activation_max,
85 const uint32_t block_size)
86 {
87 #if defined(ARM_MATH_MVEI)
88 int32_t count = (int32_t)block_size;
89
90 while (count > 0)
91 {
92 int32x4_t vect_1;
93 int32x4_t vect_2;
94
95 mve_pred16_t p = vctp32q((uint32_t)count);
96
97 vect_1 = vldrbq_z_s32(input_1_vect, p);
98 vect_2 = vldrbq_z_s32(input_2_vect, p);
99
100 vect_1 = vaddq_s32(vect_1, vdupq_n_s32(input_1_offset));
101 vect_2 = vaddq_s32(vect_2, vdupq_n_s32(input_2_offset));
102
103 vect_1 = vshlq_r_s32(vect_1, left_shift);
104 vect_2 = vshlq_r_s32(vect_2, left_shift);
105
106 SAT_INPUT_VECT(vect_1, input_1_mult, input_1_shift);
107 SAT_INPUT_VECT(vect_2, input_2_mult, input_2_shift);
108
109 vect_1 = vaddq_s32(vect_1, vect_2);
110 SAT_INPUT_VECT(vect_1, out_mult, out_shift);
111
112 vect_1 = vaddq_n_s32(vect_1, out_offset);
113
114 vect_1 = vmaxq_s32(vect_1, vdupq_n_s32(out_activation_min));
115 vect_1 = vminq_s32(vect_1, vdupq_n_s32(out_activation_max));
116
117 input_1_vect += 4;
118 input_2_vect += 4;
119 vstrbq_p_s32(output, vect_1, p);
120
121 output += 4;
122 count -= 4;
123 }
124 #else
125 uint32_t loop_count;
126 int32_t input_1;
127 int32_t input_2;
128 int32_t sum;
129
130 #if defined(ARM_MATH_DSP)
131 int32_t a_1, b_1, a_2, b_2;
132
133 int32_t offset_1_packed, offset_2_packed;
134
135 int8_t r1, r2, r3, r4;
136
137 offset_1_packed = (input_1_offset << 16U) | (input_1_offset & 0x0FFFFL);
138 offset_2_packed = (input_2_offset << 16U) | (input_2_offset & 0x0FFFFL);
139
140 loop_count = block_size >> 2;
141
142 while (loop_count > 0U)
143 {
144 /* 4 outputs are calculated in one loop. The order of calculation is follows the order of output sign extension
145 intrinsic */
146 input_1_vect = read_and_pad_reordered(input_1_vect, &b_1, &a_1);
147 input_2_vect = read_and_pad_reordered(input_2_vect, &b_2, &a_2);
148
149 a_1 = __SADD16(a_1, offset_1_packed);
150 b_1 = __SADD16(b_1, offset_1_packed);
151
152 a_2 = __SADD16(a_2, offset_2_packed);
153 b_2 = __SADD16(b_2, offset_2_packed);
154
155 /* Sum 1 */
156 input_1 = (b_1 & 0x0FFFF) << left_shift;
157
158 SAT_INPUT(input_1, input_1_mult, input_1_shift);
159
160 input_2 = (b_2 & 0x0FFFF) << left_shift;
161 SAT_INPUT(input_2, input_2_mult, input_2_shift);
162
163 sum = input_1 + input_2;
164 SAT_INPUT(sum, out_mult, out_shift);
165 sum += out_offset;
166 sum = MAX(sum, out_activation_min);
167 sum = MIN(sum, out_activation_max);
168 r1 = (q7_t)sum;
169
170 /* Sum 3 */
171 input_1 = ((b_1 >> 16) & 0x0FFFF) << left_shift;
172 SAT_INPUT(input_1, input_1_mult, input_1_shift);
173
174 input_2 = ((b_2 >> 16) & 0x0FFFF) << left_shift;
175 SAT_INPUT(input_2, input_2_mult, input_2_shift);
176
177 sum = input_1 + input_2;
178 SAT_INPUT(sum, out_mult, out_shift);
179 sum += out_offset;
180 sum = MAX(sum, out_activation_min);
181 sum = MIN(sum, out_activation_max);
182 r3 = (q7_t)sum;
183
184 /* Sum 2 */
185 input_1 = (a_1 & 0x0FFFF) << left_shift;
186 SAT_INPUT(input_1, input_1_mult, input_1_shift);
187
188 input_2 = (a_2 & 0x0FFFF) << left_shift;
189 SAT_INPUT(input_2, input_2_mult, input_2_shift);
190
191 sum = input_1 + input_2;
192 SAT_INPUT(sum, out_mult, out_shift);
193 sum += out_offset;
194 sum = MAX(sum, out_activation_min);
195 sum = MIN(sum, out_activation_max);
196 r2 = (q7_t)sum;
197
198 /* Sum 4 */
199 input_1 = ((a_1 >> 16) & 0x0FFFF) << left_shift;
200 SAT_INPUT(input_1, input_1_mult, input_1_shift);
201
202 input_2 = ((a_2 >> 16) & 0x0FFFF) << left_shift;
203 SAT_INPUT(input_2, input_2_mult, input_2_shift);
204
205 sum = input_1 + input_2;
206 SAT_INPUT(sum, out_mult, out_shift);
207 sum += out_offset;
208 sum = MAX(sum, out_activation_min);
209 sum = MIN(sum, out_activation_max);
210 r4 = (q7_t)sum;
211
212 write_q7x4_ia(&output, __PACKq7(r1, r2, r3, r4));
213
214 loop_count--;
215 }
216
217 loop_count = block_size & 0x3;
218 #else
219 loop_count = block_size;
220 #endif
221
222 while (loop_count > 0U)
223 {
224 /* C = A + B */
225
226 input_1 = (*input_1_vect++ + input_1_offset) << left_shift;
227 input_2 = (*input_2_vect++ + input_2_offset) << left_shift;
228
229 input_1 = arm_nn_doubling_high_mult(input_1, input_1_mult);
230 input_1 = arm_nn_divide_by_power_of_two(input_1, -input_1_shift);
231
232 input_2 = arm_nn_doubling_high_mult(input_2, input_2_mult);
233 input_2 = arm_nn_divide_by_power_of_two(input_2, -input_2_shift);
234
235 sum = input_1 + input_2;
236 SAT_INPUT(sum, out_mult, out_shift);
237 sum += out_offset;
238
239 sum = MAX(sum, out_activation_min);
240 sum = MIN(sum, out_activation_max);
241
242 *output++ = (q7_t)sum;
243
244 /* Decrement loop counter */
245 loop_count--;
246 }
247
248 #endif /* ARM_MATH_MVEI */
249
250 return (ARM_MATH_SUCCESS);
251 }
252
253 /**
254 * @} end of BasicMath group
255 */
256
