1 /*
2 * Copyright (c) 2020 Teslabs Engineering S.L.
3 * Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com>
4 * Copyright (c) 2022 Konstantinos Papadopoulos <kostas.papadopulos@gmail.com>
5 * Copyright (c) 2022 Mohamed ElShahawi <ExtremeGTX@hotmail.com>
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
10 #include "display_ili9342c.h"
11 #include "display_ili9xxx.h"
12
13 #include <zephyr/logging/log.h>
14 LOG_MODULE_REGISTER(display_ili9342c, CONFIG_DISPLAY_LOG_LEVEL);
15
ili9342c_regs_init(const struct device * dev)16 int ili9342c_regs_init(const struct device *dev)
17 {
18 const struct ili9xxx_config *config = dev->config;
19 const struct ili9342c_regs *regs = config->regs;
20 int r;
21
22 /* some commands require that SETEXTC be set first before it becomes enabled. */
23 LOG_HEXDUMP_DBG(regs->setextc, ILI9342C_SETEXTC_LEN, "SETEXTC");
24 r = ili9xxx_transmit(dev, ILI9342C_SETEXTC, regs->setextc,
25 ILI9342C_SETEXTC_LEN);
26 if (r < 0) {
27 return r;
28 }
29
30 LOG_HEXDUMP_DBG(regs->gamset, ILI9342C_GAMSET_LEN, "GAMSET");
31 r = ili9xxx_transmit(dev, ILI9342C_GAMSET, regs->gamset,
32 ILI9342C_GAMSET_LEN);
33 if (r < 0) {
34 return r;
35 }
36
37 LOG_HEXDUMP_DBG(regs->ifmode, ILI9342C_IFMODE_LEN, "IFMODE");
38 r = ili9xxx_transmit(dev, ILI9342C_IFMODE, regs->ifmode,
39 ILI9342C_IFMODE_LEN);
40 if (r < 0) {
41 return r;
42 }
43
44 LOG_HEXDUMP_DBG(regs->frmctr1, ILI9342C_FRMCTR1_LEN, "FRMCTR1");
45 r = ili9xxx_transmit(dev, ILI9342C_FRMCTR1, regs->frmctr1,
46 ILI9342C_FRMCTR1_LEN);
47 if (r < 0) {
48 return r;
49 }
50
51 LOG_HEXDUMP_DBG(regs->invtr, ILI9342C_INVTR_LEN, "INVTR");
52 r = ili9xxx_transmit(dev, ILI9342C_INVTR, regs->invtr,
53 ILI9342C_INVTR_LEN);
54 if (r < 0) {
55 return r;
56 }
57
58 LOG_HEXDUMP_DBG(regs->disctrl, ILI9342C_DISCTRL_LEN, "DISCTRL");
59 r = ili9xxx_transmit(dev, ILI9342C_DISCTRL, regs->disctrl,
60 ILI9342C_DISCTRL_LEN);
61 if (r < 0) {
62 return r;
63 }
64
65 LOG_HEXDUMP_DBG(regs->etmod, ILI9342C_ETMOD_LEN, "ETMOD");
66 r = ili9xxx_transmit(dev, ILI9342C_ETMOD, regs->etmod,
67 ILI9342C_ETMOD_LEN);
68 if (r < 0) {
69 return r;
70 }
71
72 LOG_HEXDUMP_DBG(regs->pwctrl1, ILI9342C_PWCTRL1_LEN, "PWCTRL1");
73 r = ili9xxx_transmit(dev, ILI9342C_PWCTRL1, regs->pwctrl1,
74 ILI9342C_PWCTRL1_LEN);
75 if (r < 0) {
76 return r;
77 }
78
79 LOG_HEXDUMP_DBG(regs->pwctrl2, ILI9342C_PWCTRL2_LEN, "PWCTRL2");
80 r = ili9xxx_transmit(dev, ILI9342C_PWCTRL2, regs->pwctrl2,
81 ILI9342C_PWCTRL2_LEN);
82 if (r < 0) {
83 return r;
84 }
85
86 LOG_HEXDUMP_DBG(regs->pwctrl3, ILI9342C_PWCTRL3_LEN, "PWCTRL3");
87 r = ili9xxx_transmit(dev, ILI9342C_PWCTRL3, regs->pwctrl3,
88 ILI9342C_PWCTRL3_LEN);
89 if (r < 0) {
90 return r;
91 }
92
93 LOG_HEXDUMP_DBG(regs->vmctrl1, ILI9342C_VMCTRL1_LEN, "VMCTRL1");
94 r = ili9xxx_transmit(dev, ILI9342C_VMCTRL1, regs->vmctrl1,
95 ILI9342C_VMCTRL1_LEN);
96 if (r < 0) {
97 return r;
98 }
99
100 LOG_HEXDUMP_DBG(regs->pgamctrl, ILI9342C_PGAMCTRL_LEN, "PGAMCTRL");
101 r = ili9xxx_transmit(dev, ILI9342C_PGAMCTRL, regs->pgamctrl,
102 ILI9342C_PGAMCTRL_LEN);
103 if (r < 0) {
104 return r;
105 }
106
107 LOG_HEXDUMP_DBG(regs->ngamctrl, ILI9342C_NGAMCTRL_LEN, "NGAMCTRL");
108 r = ili9xxx_transmit(dev, ILI9342C_NGAMCTRL, regs->ngamctrl,
109 ILI9342C_NGAMCTRL_LEN);
110 if (r < 0) {
111 return r;
112 }
113
114 LOG_HEXDUMP_DBG(regs->ifctl, ILI9342C_IFCTL_LEN, "IFCTL");
115 r = ili9xxx_transmit(dev, ILI9342C_IFCTL, regs->ifctl,
116 ILI9342C_IFCTL_LEN);
117 if (r < 0) {
118 return r;
119 }
120
121 return 0;
122 }
123
