1 /* SPDX-License-Identifier: BSD-3-Clause
2 *
3 * Copyright(c) 2020 Intel Corporation. All rights reserved.
4 *
5 * Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
6 */
7
8 #ifdef __PLATFORM_LIB_SHIM_H__
9
10 #ifndef __CAVS_LIB_SHIM_H__
11 #define __CAVS_LIB_SHIM_H__
12
13 #ifndef ASSEMBLY
14
15 #include <sof/lib/memory.h>
16 #include <stdint.h>
17
shim_read16(uint32_t reg)18 static inline uint16_t shim_read16(uint32_t reg)
19 {
20 return *((volatile uint16_t*)(SHIM_BASE + reg));
21 }
22
shim_write16(uint32_t reg,uint16_t val)23 static inline void shim_write16(uint32_t reg, uint16_t val)
24 {
25 *((volatile uint16_t*)(SHIM_BASE + reg)) = val;
26 }
27
shim_read(uint32_t reg)28 static inline uint32_t shim_read(uint32_t reg)
29 {
30 return *((volatile uint32_t*)(SHIM_BASE + reg));
31 }
32
shim_write(uint32_t reg,uint32_t val)33 static inline void shim_write(uint32_t reg, uint32_t val)
34 {
35 *((volatile uint32_t*)(SHIM_BASE + reg)) = val;
36 }
37
shim_read64(uint32_t reg)38 static inline uint64_t shim_read64(uint32_t reg)
39 {
40 return *((volatile uint64_t*)(SHIM_BASE + reg));
41 }
42
shim_write64(uint32_t reg,uint64_t val)43 static inline void shim_write64(uint32_t reg, uint64_t val)
44 {
45 *((volatile uint64_t*)(SHIM_BASE + reg)) = val;
46 }
47
48 #if !CONFIG_SUECREEK
49
sw_reg_read(uint32_t reg)50 static inline uint32_t sw_reg_read(uint32_t reg)
51 {
52 return *((volatile uint32_t*)((SRAM_SW_REG_BASE -
53 SRAM_ALIAS_OFFSET) + reg));
54 }
55
sw_reg_write(uint32_t reg,uint32_t val)56 static inline void sw_reg_write(uint32_t reg, uint32_t val)
57 {
58 *((volatile uint32_t*)((SRAM_SW_REG_BASE -
59 SRAM_ALIAS_OFFSET) + reg)) = val;
60 }
61
62 #endif /* !CONFIG_SUECREEK */
63
mn_reg_read(uint32_t reg,uint32_t id)64 static inline uint32_t mn_reg_read(uint32_t reg, uint32_t id)
65 {
66 return *((volatile uint32_t*)(MN_BASE + reg));
67 }
68
mn_reg_write(uint32_t reg,uint32_t id,uint32_t val)69 static inline void mn_reg_write(uint32_t reg, uint32_t id, uint32_t val)
70 {
71 *((volatile uint32_t*)(MN_BASE + reg)) = val;
72 }
73
irq_read(uint32_t reg)74 static inline uint32_t irq_read(uint32_t reg)
75 {
76 return *((volatile uint32_t*)(IRQ_BASE + reg));
77 }
78
irq_write(uint32_t reg,uint32_t val)79 static inline void irq_write(uint32_t reg, uint32_t val)
80 {
81 *((volatile uint32_t*)(IRQ_BASE + reg)) = val;
82 }
83
ipc_read(uint32_t reg)84 static inline uint32_t ipc_read(uint32_t reg)
85 {
86 return *((volatile uint32_t*)(IPC_HOST_BASE + reg));
87 }
88
ipc_write(uint32_t reg,uint32_t val)89 static inline void ipc_write(uint32_t reg, uint32_t val)
90 {
91 *((volatile uint32_t*)(IPC_HOST_BASE + reg)) = val;
92 }
93
idc_read(uint32_t reg,uint32_t core_id)94 static inline uint32_t idc_read(uint32_t reg, uint32_t core_id)
95 {
96 return *((volatile uint32_t*)(IPC_DSP_BASE(core_id) + reg));
97 }
98
idc_write(uint32_t reg,uint32_t core_id,uint32_t val)99 static inline void idc_write(uint32_t reg, uint32_t core_id, uint32_t val)
100 {
101 *((volatile uint32_t*)(IPC_DSP_BASE(core_id) + reg)) = val;
102 }
103
104 #endif /* !ASSEMBLY */
105
106 #endif /* __CAVS_LIB_SHIM_H__ */
107
108 #else
109
110 #error "This file shouldn't be included from outside of platform/lib/shim.h"
111
112 #endif /* __PLATFORM_LIB_SHIM_H__ */
113
