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/hal_nxp-3.5.0/mcux/mcux-sdk/components/css_pkc/src/comps/mcuxCsslFlowProtection/inc/internal/
DmcuxCsslFlowProtection_SecureCounter_Common.h65 #define MCUX_CSSL_FP_DECL_NAME(type, id) \ argument
77 #define MCUX_CSSL_FP_DECL_IMPL(type, id) \ argument
177 #define MCUX_CSSL_FP_FUNCTION_ID(id) \ argument
195 #define MCUX_CSSL_FP_FUNCTION_ID_ENTRY_PART(id) \ argument
205 #define MCUX_CSSL_FP_FUNCTION_ID_EXIT_PART(id) \ argument
218 #define MCUX_CSSL_FP_FUNCTION_DECL_IMPL(id) \ argument
229 #define MCUX_CSSL_FP_FUNCTION_VALUE(id) \ argument
241 #define MCUX_CSSL_FP_FUNCTION_DEF_IMPL(id) \ argument
345 #define MCUX_CSSL_FP_FUNCTION_CALLED_IMPL(id) \ argument
368 #define MCUX_CSSL_FP_LOOP_ID(id) \ argument
[all …]
DmcuxCsslFlowProtection_SecureCounter_Local.h122 #define MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn(id, result, ...) \ argument
144 #define MCUX_CSSL_FP_FUNCTION_EXIT_IMPL1(id) \ argument
163 #define MCUX_CSSL_FP_FUNCTION_EXIT_IMPL2(id, result) \ argument
216 #define MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn(id, pass, fail, ...) \ argument
248 #define MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL3(id, pass, fail) \ argument
290 #define MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL1(id) \ argument
304 #define MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPLn(id, ...) \ argument
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan.h39 #define FLEXCAN_ID_STD(id) \ argument
41 #define FLEXCAN_ID_EXT(id) \ argument
46 #define FLEXCAN_RX_MB_STD_MASK(id, rtr, ide) \ argument
49 #define FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide) \ argument
54 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) \ argument
57 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide) \ argument
60 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide) \ argument
63 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) \ argument
65 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) \ argument
67 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id) \ argument
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/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Driver/VIO/Source/
Dvio.c163 void vioSetValue (uint32_t id, int32_t value) { in vioSetValue()
183 int32_t vioGetValue (uint32_t id) { in vioGetValue()
207 void vioSetXYZ (uint32_t id, vioValueXYZ_t valueXYZ) { in vioSetXYZ()
227 vioValueXYZ_t vioGetXYZ (uint32_t id) { in vioGetXYZ()
251 void vioSetIPv4 (uint32_t id, vioAddrIPv4_t addrIPv4) { in vioSetIPv4()
271 vioAddrIPv4_t vioGetIPv4 (uint32_t id) { in vioGetIPv4()
295 void vioSetIPv6 (uint32_t id, vioAddrIPv6_t addrIPv6) { in vioSetIPv6()
315 vioAddrIPv6_t vioGetIPv6 (uint32_t id) { in vioGetIPv6()
Dvio_memory.c110 void vioSetValue (uint32_t id, int32_t value) { in vioSetValue()
121 int32_t vioGetValue (uint32_t id) { in vioGetValue()
135 void vioSetXYZ (uint32_t id, vioValueXYZ_t valueXYZ) { in vioSetXYZ()
146 vioValueXYZ_t vioGetXYZ (uint32_t id) { in vioGetXYZ()
160 void vioSetIPv4 (uint32_t id, vioAddrIPv4_t addrIPv4) { in vioSetIPv4()
171 vioAddrIPv4_t vioGetIPv4 (uint32_t id) { in vioGetIPv4()
185 void vioSetIPv6 (uint32_t id, vioAddrIPv6_t addrIPv6) { in vioSetIPv6()
196 vioAddrIPv6_t vioGetIPv6 (uint32_t id) { in vioGetIPv6()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/css_pkc/src/comps/mcuxCsslFlowProtection/inc/
DmcuxCsslFlowProtection.h119 #define MCUX_CSSL_FP_FUNCTION_DECL(id) \ argument
151 #define MCUX_CSSL_FP_FUNCTION_DEF(id) \ argument
660 #define MCUX_CSSL_FP_LOOP_DECL(id) \ argument
723 #define MCUX_CSSL_FP_LOOP_ITERATIONS(id, count) \ argument
769 #define MCUX_CSSL_FP_BRANCH_DECL(id) \ argument
992 #define MCUX_CSSL_FP_SWITCH_DECL(id) \ argument
/hal_nxp-3.5.0/mcux/mcux-sdk/components/css_pkc/doc/html/search/
Dsearch.js239 this.SelectItemCount = function(id) argument
254 this.SelectItemSet = function(id) argument
279 this.OnSelectItem = function(id) argument
435 this.FindChildElement = function(id) argument
471 this.Toggle = function(id) argument
/hal_nxp-3.5.0/mcux/mcux-sdk/components/mem_manager/
Dfsl_component_mem_manager.h110 #define MEM_BLOCK_DATA_BUFFER_NONAME_DEFINE(blockSize, numberOfBlocks, id) … argument
115 #define MEM_BLOCK_BUFFER_NONAME_DEFINE(blockSize, numberOfBlocks, id) \ argument
119 #define MEM_BLOCK_NONAME_BUFFER(blockSize, numberOfBlocks, id) \ argument
142 #define MEM_BLOCK_DATA_BUFFER_DEFINE(name, numberOfBlocks, blockSize, id) \ argument
146 #define MEM_BLOCK_BUFFER_DEFINE(name, numberOfBlocks, blockSize, id) \ argument
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c539 uint32_t CLOCK_GetFRGClock(uint32_t id) in CLOCK_GetFRGClock()
590 uint32_t CLOCK_GetFlexcommClkFreq(uint32_t id) in CLOCK_GetFlexcommClkFreq()
663 uint32_t CLOCK_GetCtimerClkFreq(uint32_t id) in CLOCK_GetCtimerClkFreq()
701 uint32_t CLOCK_GetFlexspiClkFreq(uint32_t id) in CLOCK_GetFlexspiClkFreq()
819 uint32_t CLOCK_GetWdtClkFreq(uint32_t id) in CLOCK_GetWdtClkFreq()
884 uint32_t CLOCK_GetSdioClkFreq(uint32_t id) in CLOCK_GetSdioClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c539 uint32_t CLOCK_GetFRGClock(uint32_t id) in CLOCK_GetFRGClock()
590 uint32_t CLOCK_GetFlexcommClkFreq(uint32_t id) in CLOCK_GetFlexcommClkFreq()
663 uint32_t CLOCK_GetCtimerClkFreq(uint32_t id) in CLOCK_GetCtimerClkFreq()
701 uint32_t CLOCK_GetFlexspiClkFreq(uint32_t id) in CLOCK_GetFlexspiClkFreq()
819 uint32_t CLOCK_GetWdtClkFreq(uint32_t id) in CLOCK_GetWdtClkFreq()
884 uint32_t CLOCK_GetSdioClkFreq(uint32_t id) in CLOCK_GetSdioClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c539 uint32_t CLOCK_GetFRGClock(uint32_t id) in CLOCK_GetFRGClock()
590 uint32_t CLOCK_GetFlexcommClkFreq(uint32_t id) in CLOCK_GetFlexcommClkFreq()
663 uint32_t CLOCK_GetCtimerClkFreq(uint32_t id) in CLOCK_GetCtimerClkFreq()
701 uint32_t CLOCK_GetFlexspiClkFreq(uint32_t id) in CLOCK_GetFlexspiClkFreq()
819 uint32_t CLOCK_GetWdtClkFreq(uint32_t id) in CLOCK_GetWdtClkFreq()
884 uint32_t CLOCK_GetSdioClkFreq(uint32_t id) in CLOCK_GetSdioClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/mailbox/
Dfsl_mailbox.h226 static inline void MAILBOX_SetValue(MAILBOX_Type *base, mailbox_id_t id, uint32_t mboxData) in MAILBOX_SetValue()
240 static inline uint32_t MAILBOX_GetValue(MAILBOX_Type *base, mailbox_id_t id) in MAILBOX_GetValue()
256 static inline void MAILBOX_SetValueBits(MAILBOX_Type *base, mailbox_id_t id, uint32_t mboxSetBits) in MAILBOX_SetValueBits()
272 static inline void MAILBOX_ClearValueBits(MAILBOX_Type *base, mailbox_id_t id, uint32_t mboxClrBits) in MAILBOX_ClearValueBits()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c539 uint32_t CLOCK_GetFRGClock(uint32_t id) in CLOCK_GetFRGClock()
601 uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id) in CLOCK_GetFlexCommClkFreq()
657 uint32_t CLOCK_GetCtimerClkFreq(uint32_t id) in CLOCK_GetCtimerClkFreq()
801 uint32_t CLOCK_GetWdtClkFreq(uint32_t id) in CLOCK_GetWdtClkFreq()
870 uint32_t CLOCK_GetSdioClkFreq(uint32_t id) in CLOCK_GetSdioClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c539 uint32_t CLOCK_GetFRGClock(uint32_t id) in CLOCK_GetFRGClock()
601 uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id) in CLOCK_GetFlexCommClkFreq()
657 uint32_t CLOCK_GetCtimerClkFreq(uint32_t id) in CLOCK_GetCtimerClkFreq()
801 uint32_t CLOCK_GetWdtClkFreq(uint32_t id) in CLOCK_GetWdtClkFreq()
870 uint32_t CLOCK_GetSdioClkFreq(uint32_t id) in CLOCK_GetSdioClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Include/
Drtx_os.h104 uint8_t id; ///< Object Identifier member
151 uint8_t id; ///< Object Identifier member
168 uint8_t id; ///< Object Identifier member
182 uint8_t id; ///< Object Identifier member
200 uint8_t id; ///< Object Identifier member
225 uint8_t id; ///< Object Identifier member
239 uint8_t id; ///< Object Identifier member
249 uint8_t id; ///< Object Identifier member
267 uint8_t id; ///< Object Identifier member
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/mscan/
Dfsl_mscan.h28 #define MSCAN_RX_MB_STD_MASK(id) \ argument
31 #define MSCAN_RX_MB_EXT_MASK(id) \ argument
458 static inline void MSCAN_WriteTIDR0(MSCAN_Type *base, uint8_t id) in MSCAN_WriteTIDR0()
463 static inline void MSCAN_WriteTIDR1(MSCAN_Type *base, uint8_t id) in MSCAN_WriteTIDR1()
468 static inline void MSCAN_WriteTIDR2(MSCAN_Type *base, uint8_t id) in MSCAN_WriteTIDR2()
473 static inline void MSCAN_WriteTIDR3(MSCAN_Type *base, uint8_t id) in MSCAN_WriteTIDR3()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/scfw_api/svc/seco/
Dseco_rpc_clnt.c285 sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr, in sc_seco_gen_key_blob()
310 sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr) in sc_seco_load_key()
600 sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_config()
634 sc_err_t sc_seco_secvio_dgo_config(sc_ipc_t ipc, uint8_t id, uint8_t access, in sc_seco_secvio_dgo_config()

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