1 /*
2  * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #pragma once
8 
9 #ifdef __cplusplus
10 extern "C" {
11 #endif
12 
13 #include <stdint.h>
14 #include <stdbool.h>
15 #include "soc/soc_caps.h"
16 #include "soc/clk_tree_defs.h"
17 
18 /**
19  * @brief I2C port number, can be I2C_NUM_0 ~ (I2C_NUM_MAX-1).
20  */
21 typedef enum {
22     I2C_NUM_0 = 0,              /*!< I2C port 0 */
23 #if SOC_I2C_NUM >= 2
24     I2C_NUM_1,                  /*!< I2C port 1 */
25 #endif /* SOC_I2C_NUM >= 2 */
26 #if SOC_LP_I2C_NUM >= 1
27     LP_I2C_NUM_0,               /*< LP_I2C port 0 */
28 #endif /* SOC_LP_I2C_NUM >= 1 */
29     I2C_NUM_MAX,                /*!< I2C port max */
30 } i2c_port_t;
31 
32 /**
33  * @brief Data structure for calculating I2C bus timing.
34  */
35 typedef struct {
36     uint16_t clkm_div;          /*!< I2C core clock devider */
37     uint16_t scl_low;           /*!< I2C scl low period */
38     uint16_t scl_high;          /*!< I2C scl hight period */
39     uint16_t scl_wait_high;     /*!< I2C scl wait_high period */
40     uint16_t sda_hold;          /*!< I2C scl low period */
41     uint16_t sda_sample;        /*!< I2C sda sample time */
42     uint16_t setup;             /*!< I2C start and stop condition setup period */
43     uint16_t hold;              /*!< I2C start and stop condition hold period  */
44     uint16_t tout;              /*!< I2C bus timeout period */
45 } i2c_hal_clk_config_t;
46 
47 typedef enum{
48 #if SOC_I2C_SUPPORT_SLAVE
49     I2C_MODE_SLAVE = 0,   /*!< I2C slave mode */
50 #endif
51     I2C_MODE_MASTER,      /*!< I2C master mode */
52     I2C_MODE_MAX,
53 } i2c_mode_t;
54 
55 typedef enum {
56     I2C_MASTER_WRITE = 0,   /*!< I2C write data */
57     I2C_MASTER_READ,        /*!< I2C read data */
58 } i2c_rw_t;
59 
60 typedef enum {
61     I2C_DATA_MODE_MSB_FIRST = 0,  /*!< I2C data msb first */
62     I2C_DATA_MODE_LSB_FIRST = 1,  /*!< I2C data lsb first */
63     I2C_DATA_MODE_MAX
64 } i2c_trans_mode_t;
65 
66 typedef enum {
67     I2C_ADDR_BIT_7 = 0,    /*!< I2C 7bit address for slave mode */
68     I2C_ADDR_BIT_10,       /*!< I2C 10bit address for slave mode */
69     I2C_ADDR_BIT_MAX,
70 } i2c_addr_mode_t;
71 
72 typedef enum {
73     I2C_MASTER_ACK = 0x0,        /*!< I2C ack for each byte read */
74     I2C_MASTER_NACK = 0x1,       /*!< I2C nack for each byte read */
75     I2C_MASTER_LAST_NACK = 0x2,   /*!< I2C nack for the last byte*/
76     I2C_MASTER_ACK_MAX,
77 } i2c_ack_type_t;
78 
79 /**
80  * @brief Timing configuration structure. Used for I2C reset internally.
81  */
82 typedef struct {
83     int high_period; /*!< high_period time */
84     int low_period; /*!< low_period time */
85     int wait_high_period; /*!< wait_high_period time */
86     int rstart_setup; /*!< restart setup */
87     int start_hold; /*!< start hold time */
88     int stop_setup; /*!< stop setup */
89     int stop_hold; /*!< stop hold time */
90     int sda_sample; /*!< high_period time */
91     int sda_hold; /*!< sda hold time */
92     int timeout; /*!< timeout value */
93 } i2c_hal_timing_config_t;
94 
95 
96 /**
97  * @brief I2C group clock source
98  */
99 typedef soc_periph_i2c_clk_src_t i2c_clock_source_t;
100 
101 
102 #ifdef __cplusplus
103 }
104 #endif
105