1 /**
2   ******************************************************************************
3   * @file    hts221_reg.c
4   * @author  Sensors Software Solution Team
5   * @brief   HTS221 driver file
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 
20 #include "hts221_reg.h"
21 
22 /**
23   * @defgroup  HTS221
24   * @brief     This file provides a set of functions needed to drive the
25   *            hts221 enhanced inertial module.
26   * @{
27   *
28   */
29 
30 /**
31   * @defgroup  HTS221_interfaces_functions
32   * @brief     This section provide a set of functions used to read and write
33   *            a generic register of the device.
34   * @{
35   *
36   */
37 
38 /**
39   * @brief  Read generic device register
40   *
41   * @param  ctx   read / write interface definitions(ptr)
42   * @param  reg   register to read
43   * @param  data  pointer to buffer that store the data read(ptr)
44   * @param  len   number of consecutive register to read
45   * @retval       interface status (MANDATORY: return 0 -> no Error)
46   *
47   */
hts221_read_reg(stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)48 int32_t hts221_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data,
49                         uint16_t len)
50 {
51   int32_t ret;
52 
53   ret = ctx->read_reg(ctx->handle, reg, data, len);
54 
55   return ret;
56 }
57 
58 /**
59   * @brief  Write generic device register
60   *
61   * @param  ctx   read / write interface definitions(ptr)
62   * @param  reg   register to write
63   * @param  data  pointer to data to write in register reg(ptr)
64   * @param  len   number of consecutive register to write
65   * @retval       interface status (MANDATORY: return 0 -> no Error)
66   *
67   */
hts221_write_reg(stmdev_ctx_t * ctx,uint8_t reg,uint8_t * data,uint16_t len)68 int32_t hts221_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
69                          uint8_t *data,
70                          uint16_t len)
71 {
72   int32_t ret;
73 
74   ret = ctx->write_reg(ctx->handle, reg, data, len);
75 
76   return ret;
77 }
78 
79 /**
80   * @}
81   *
82   */
83 
84 /**
85   * @defgroup  HTS221_Data_Generation
86   * @brief     This section group all the functions concerning data generation
87   * @{
88   *
89   */
90 
91 /**
92   * @brief  The numbers of averaged humidity samples.[set]
93   *
94   * @param  ctx     read / write interface definitions
95   * @param  val     change the values of avgh in reg AV_CONF
96   * @retval         interface status (MANDATORY: return 0 -> no Error)
97   *
98   */
hts221_humidity_avg_set(stmdev_ctx_t * ctx,hts221_avgh_t val)99 int32_t hts221_humidity_avg_set(stmdev_ctx_t *ctx, hts221_avgh_t val)
100 {
101   hts221_av_conf_t reg;
102   int32_t ret;
103 
104   ret = hts221_read_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
105 
106   if (ret == 0)
107   {
108     reg.avgh = (uint8_t)val;
109     ret = hts221_write_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
110   }
111 
112   return ret;
113 }
114 
115 /**
116   * @brief  The numbers of averaged humidity samples.[get]
117   *
118   * @param  ctx     read / write interface definitions
119   * @param  val     Get the values of avgh in reg AV_CONF
120   * @retval         interface status (MANDATORY: return 0 -> no Error)
121   *
122   */
hts221_humidity_avg_get(stmdev_ctx_t * ctx,hts221_avgh_t * val)123 int32_t hts221_humidity_avg_get(stmdev_ctx_t *ctx, hts221_avgh_t *val)
124 {
125   hts221_av_conf_t reg;
126   int32_t ret;
127 
128   ret = hts221_read_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
129 
130   switch (reg.avgh)
131   {
132     case HTS221_H_AVG_4:
133       *val = HTS221_H_AVG_4;
134       break;
135 
136     case HTS221_H_AVG_8:
137       *val = HTS221_H_AVG_8;
138       break;
139 
140     case HTS221_H_AVG_16:
141       *val = HTS221_H_AVG_16;
142       break;
143 
144     case HTS221_H_AVG_32:
145       *val = HTS221_H_AVG_32;
146       break;
147 
148     case HTS221_H_AVG_64:
149       *val = HTS221_H_AVG_64;
150       break;
151 
152     case HTS221_H_AVG_128:
153       *val = HTS221_H_AVG_128;
154       break;
155 
156     case HTS221_H_AVG_256:
157       *val = HTS221_H_AVG_256;
158       break;
159 
160     case HTS221_H_AVG_512:
161       *val = HTS221_H_AVG_512;
162       break;
163 
164     default:
165       *val = HTS221_H_AVG_ND;
166       break;
167   }
168 
169   return ret;
170 }
171 
172 /**
173   * @brief  The numbers of averaged temperature samples.[set]
174   *
175   * @param  ctx     read / write interface definitions
176   * @param  val     change the values of avgt in reg AV_CONF
177   * @retval         interface status (MANDATORY: return 0 -> no Error)
178   *
179   */
hts221_temperature_avg_set(stmdev_ctx_t * ctx,hts221_avgt_t val)180 int32_t hts221_temperature_avg_set(stmdev_ctx_t *ctx,
181                                    hts221_avgt_t val)
182 {
183   hts221_av_conf_t reg;
184   int32_t ret;
185 
186   ret = hts221_read_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
187 
188   if (ret == 0)
189   {
190     reg.avgt = (uint8_t)val;
191     ret = hts221_write_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
192   }
193 
194   return ret;
195 }
196 
197 /**
198   * @brief  The numbers of averaged temperature samples.[get]
199   *
200   * @param  ctx     read / write interface definitions
201   * @param  val     Get the values of avgt in reg AV_CONF
202   * @retval         interface status (MANDATORY: return 0 -> no Error)
203   *
204   */
hts221_temperature_avg_get(stmdev_ctx_t * ctx,hts221_avgt_t * val)205 int32_t hts221_temperature_avg_get(stmdev_ctx_t *ctx,
206                                    hts221_avgt_t *val)
207 {
208   hts221_av_conf_t reg;
209   int32_t ret;
210 
211   ret = hts221_read_reg(ctx, HTS221_AV_CONF, (uint8_t *) &reg, 1);
212 
213   switch (reg.avgh)
214   {
215     case HTS221_T_AVG_2:
216       *val = HTS221_T_AVG_2;
217       break;
218 
219     case HTS221_T_AVG_4:
220       *val = HTS221_T_AVG_4;
221       break;
222 
223     case HTS221_T_AVG_8:
224       *val = HTS221_T_AVG_8;
225       break;
226 
227     case HTS221_T_AVG_16:
228       *val = HTS221_T_AVG_16;
229       break;
230 
231     case HTS221_T_AVG_32:
232       *val = HTS221_T_AVG_32;
233       break;
234 
235     case HTS221_T_AVG_64:
236       *val = HTS221_T_AVG_64;
237       break;
238 
239     case HTS221_T_AVG_128:
240       *val = HTS221_T_AVG_128;
241       break;
242 
243     case HTS221_T_AVG_256:
244       *val = HTS221_T_AVG_256;
245       break;
246 
247     default:
248       *val = HTS221_T_AVG_ND;
249       break;
250   }
251 
252   return ret;
253 }
254 
255 /**
256   * @brief  Output data rate selection.[set]
257   *
258   * @param  ctx     read / write interface definitions
259   * @param  val     change the values of odr in reg CTRL_REG1
260   * @retval         interface status (MANDATORY: return 0 -> no Error)
261   *
262   */
hts221_data_rate_set(stmdev_ctx_t * ctx,hts221_odr_t val)263 int32_t hts221_data_rate_set(stmdev_ctx_t *ctx, hts221_odr_t val)
264 {
265   hts221_ctrl_reg1_t reg;
266   int32_t ret;
267 
268   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
269 
270   if (ret == 0)
271   {
272     reg.odr = (uint8_t)val;
273     ret = hts221_write_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
274   }
275 
276   return ret;
277 }
278 
279 /**
280   * @brief  Output data rate selection.[get]
281   *
282   * @param  ctx     read / write interface definitions
283   * @param  val     Get the values of odr in reg CTRL_REG1
284   * @retval         interface status (MANDATORY: return 0 -> no Error)
285   *
286   */
hts221_data_rate_get(stmdev_ctx_t * ctx,hts221_odr_t * val)287 int32_t hts221_data_rate_get(stmdev_ctx_t *ctx, hts221_odr_t *val)
288 {
289   hts221_ctrl_reg1_t reg;
290   int32_t ret;
291 
292   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
293 
294   switch (reg.odr)
295   {
296     case HTS221_ONE_SHOT:
297       *val = HTS221_ONE_SHOT;
298       break;
299 
300     case HTS221_ODR_1Hz:
301       *val = HTS221_ODR_1Hz;
302       break;
303 
304     case HTS221_ODR_7Hz:
305       *val = HTS221_ODR_7Hz;
306       break;
307 
308     case HTS221_ODR_12Hz5:
309       *val = HTS221_ODR_12Hz5;
310       break;
311 
312     default:
313       *val = HTS221_ODR_ND;
314       break;
315   }
316 
317   return ret;
318 }
319 
320 /**
321   * @brief  Block data update.[set]
322   *
323   * @param  ctx     read / write interface definitions
324   * @param  val     change the values of bdu in reg CTRL_REG1
325   * @retval         interface status (MANDATORY: return 0 -> no Error)
326   *
327   */
hts221_block_data_update_set(stmdev_ctx_t * ctx,uint8_t val)328 int32_t hts221_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val)
329 {
330   hts221_ctrl_reg1_t reg;
331   int32_t ret;
332 
333   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
334 
335   if (ret == 0)
336   {
337     reg.bdu = val;
338     ret = hts221_write_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
339   }
340 
341   return ret;
342 }
343 
344 /**
345   * @brief  Block data update.[get]
346   *
347   * @param  ctx     read / write interface definitions
348   * @param  val     change the values of bdu in reg CTRL_REG1
349   * @retval         interface status (MANDATORY: return 0 -> no Error)
350   *
351   */
hts221_block_data_update_get(stmdev_ctx_t * ctx,uint8_t * val)352 int32_t hts221_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val)
353 {
354   hts221_ctrl_reg1_t reg;
355   int32_t ret;
356 
357   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
358   *val = reg.bdu;
359 
360   return ret;
361 }
362 
363 /**
364   * @brief  One-shot mode. Device perform a single measure.[set]
365   *
366   * @param  ctx     read / write interface definitions
367   * @param  val     change the values of one_shot in reg CTRL_REG2
368   * @retval         interface status (MANDATORY: return 0 -> no Error)
369   *
370   */
hts221_one_shoot_trigger_set(stmdev_ctx_t * ctx,uint8_t val)371 int32_t hts221_one_shoot_trigger_set(stmdev_ctx_t *ctx, uint8_t val)
372 {
373   hts221_ctrl_reg2_t reg;
374   int32_t ret;
375 
376   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
377 
378   if (ret == 0)
379   {
380     reg.one_shot = val;
381     ret = hts221_write_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
382   }
383 
384   return ret;
385 }
386 
387 /**
388   * @brief  One-shot mode. Device perform a single measure.[get]
389   *
390   * @param  ctx     read / write interface definitions
391   * @param  val     change the values of one_shot in reg CTRL_REG2
392   * @retval         interface status (MANDATORY: return 0 -> no Error)
393   *
394   */
hts221_one_shoot_trigger_get(stmdev_ctx_t * ctx,uint8_t * val)395 int32_t hts221_one_shoot_trigger_get(stmdev_ctx_t *ctx, uint8_t *val)
396 {
397   hts221_ctrl_reg2_t reg;
398   int32_t ret;
399 
400   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
401   *val = reg.one_shot;
402 
403   return ret;
404 }
405 
406 /**
407   * @brief  Temperature data available.[get]
408   *
409   * @param  ctx     read / write interface definitions
410   * @param  val     change the values of t_da in reg STATUS_REG
411   * @retval         interface status (MANDATORY: return 0 -> no Error)
412   *
413   */
hts221_temp_data_ready_get(stmdev_ctx_t * ctx,uint8_t * val)414 int32_t hts221_temp_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
415 {
416   hts221_status_reg_t reg;
417   int32_t ret;
418 
419   ret = hts221_read_reg(ctx, HTS221_STATUS_REG, (uint8_t *) &reg, 1);
420   *val = reg.t_da;
421 
422   return ret;
423 }
424 
425 /**
426   * @brief  Humidity data available.[get]
427   *
428   * @param  ctx     read / write interface definitions
429   * @param  val     change the values of h_da in reg STATUS_REG
430   * @retval         interface status (MANDATORY: return 0 -> no Error)
431   *
432   */
hts221_hum_data_ready_get(stmdev_ctx_t * ctx,uint8_t * val)433 int32_t hts221_hum_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
434 {
435   hts221_status_reg_t reg;
436   int32_t ret;
437 
438   ret = hts221_read_reg(ctx, HTS221_STATUS_REG, (uint8_t *) &reg, 1);
439   *val = reg.h_da;
440 
441   return ret;
442 }
443 
444 /**
445   * @brief  Humidity output value[get]
446   *
447   * @param  ctx     read / write interface definitions
448   * @param  buff    buffer that stores data read
449   * @retval         interface status (MANDATORY: return 0 -> no Error)
450   *
451   */
hts221_humidity_raw_get(stmdev_ctx_t * ctx,int16_t * val)452 int32_t hts221_humidity_raw_get(stmdev_ctx_t *ctx, int16_t *val)
453 {
454   uint8_t buff[2];
455   int32_t ret;
456 
457   ret = hts221_read_reg(ctx, HTS221_HUMIDITY_OUT_L, buff, 2);
458   *val = (int16_t)buff[1];
459   *val = (*val * 256) + (int16_t)buff[0];
460 
461   return ret;
462 }
463 
464 /**
465   * @brief  Temperature output value[get]
466   *
467   * @param  ctx     read / write interface definitions
468   * @param  buff    buffer that stores data read
469   * @retval         interface status (MANDATORY: return 0 -> no Error)
470   *
471   */
hts221_temperature_raw_get(stmdev_ctx_t * ctx,int16_t * val)472 int32_t hts221_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val)
473 {
474   uint8_t buff[2];
475   int32_t ret;
476 
477   ret = hts221_read_reg(ctx, HTS221_TEMP_OUT_L, buff, 2);
478   *val = (int16_t)buff[1];
479   *val = (*val * 256) + (int16_t)buff[0];
480 
481   return ret;
482 }
483 
484 /**
485   * @}
486   *
487   */
488 
489 /**
490   * @defgroup  HTS221_common
491   * @brief     This section group common useful functions
492   * @{
493   *
494   */
495 
496 /**
497   * @brief  Device Who amI.[get]
498   *
499   * @param  ctx     read / write interface definitions
500   * @param  buff    buffer that stores data read
501   * @retval         interface status (MANDATORY: return 0 -> no Error)
502   *
503   */
hts221_device_id_get(stmdev_ctx_t * ctx,uint8_t * buff)504 int32_t hts221_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
505 {
506   int32_t ret;
507 
508   ret = hts221_read_reg(ctx, HTS221_WHO_AM_I, buff, 1);
509 
510   return ret;
511 }
512 
513 /**
514   * @brief  Switch device on/off.[set]
515   *
516   * @param  ctx     read / write interface definitions
517   * @param  val     change the values of pd in reg CTRL_REG1
518   * @retval         interface status (MANDATORY: return 0 -> no Error)
519   *
520   */
hts221_power_on_set(stmdev_ctx_t * ctx,uint8_t val)521 int32_t hts221_power_on_set(stmdev_ctx_t *ctx, uint8_t val)
522 {
523   hts221_ctrl_reg1_t reg;
524   int32_t ret;
525 
526   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
527 
528   if (ret == 0)
529   {
530     reg.pd = val;
531     ret = hts221_write_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
532   }
533 
534   return ret;
535 }
536 
537 /**
538   * @brief  Switch device on/off.[get]
539   *
540   * @param  ctx     read / write interface definitions
541   * @param  val     change the values of pd in reg CTRL_REG1
542   * @retval         interface status (MANDATORY: return 0 -> no Error)
543   *
544   */
hts221_power_on_get(stmdev_ctx_t * ctx,uint8_t * val)545 int32_t hts221_power_on_get(stmdev_ctx_t *ctx, uint8_t *val)
546 {
547   hts221_ctrl_reg1_t reg;
548   int32_t ret;
549 
550   ret = hts221_read_reg(ctx, HTS221_CTRL_REG1, (uint8_t *) &reg, 1);
551   *val = reg.pd;
552 
553   return ret;
554 }
555 
556 /**
557   * @brief  Heater enable / disable.[set]
558   *
559   * @param  ctx     read / write interface definitions
560   * @param  val     change the values of heater in reg CTRL_REG2
561   * @retval         interface status (MANDATORY: return 0 -> no Error)
562   *
563   */
hts221_heater_set(stmdev_ctx_t * ctx,uint8_t val)564 int32_t hts221_heater_set(stmdev_ctx_t *ctx, uint8_t val)
565 {
566   hts221_ctrl_reg2_t reg;
567   int32_t ret;
568 
569   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
570 
571   if (ret == 0)
572   {
573     reg.heater = val;
574     ret = hts221_write_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
575   }
576 
577   return ret;
578 }
579 
580 /**
581   * @brief  Heater enable / disable.[get]
582   *
583   * @param  ctx     read / write interface definitions
584   * @param  val     change the values of heater in reg CTRL_REG2
585   * @retval         interface status (MANDATORY: return 0 -> no Error)
586   *
587   */
hts221_heater_get(stmdev_ctx_t * ctx,uint8_t * val)588 int32_t hts221_heater_get(stmdev_ctx_t *ctx, uint8_t *val)
589 {
590   hts221_ctrl_reg2_t reg;
591   int32_t ret;
592 
593   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
594   *val = reg.heater;
595 
596   return ret;
597 }
598 
599 /**
600   * @brief  Reboot memory content. Reload the calibration parameters.[set]
601   *
602   * @param  ctx     read / write interface definitions
603   * @param  val     change the values of boot in reg CTRL_REG2
604   * @retval         interface status (MANDATORY: return 0 -> no Error)
605   *
606   */
hts221_boot_set(stmdev_ctx_t * ctx,uint8_t val)607 int32_t hts221_boot_set(stmdev_ctx_t *ctx, uint8_t val)
608 {
609   hts221_ctrl_reg2_t reg;
610   int32_t ret;
611 
612   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
613 
614   if (ret == 0)
615   {
616     reg.boot = val;
617     ret = hts221_write_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
618   }
619 
620   return ret;
621 }
622 
623 /**
624   * @brief  Reboot memory content. Reload the calibration parameters.[get]
625   *
626   * @param  ctx     read / write interface definitions
627   * @param  val     change the values of boot in reg CTRL_REG2
628   * @retval         interface status (MANDATORY: return 0 -> no Error)
629   *
630   */
hts221_boot_get(stmdev_ctx_t * ctx,uint8_t * val)631 int32_t hts221_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
632 {
633   hts221_ctrl_reg2_t reg;
634   int32_t ret;
635 
636   ret = hts221_read_reg(ctx, HTS221_CTRL_REG2, (uint8_t *) &reg, 1);
637   *val = reg.boot;
638 
639   return ret;
640 }
641 
642 /**
643   * @brief  Info about device status.[get]
644   *
645   * @param  ctx     read / write interface definitions
646   * @param  val     Registers STATUS_REG
647   * @retval         interface status (MANDATORY: return 0 -> no Error)
648   *
649   */
hts221_status_get(stmdev_ctx_t * ctx,hts221_status_reg_t * val)650 int32_t hts221_status_get(stmdev_ctx_t *ctx, hts221_status_reg_t *val)
651 {
652   int32_t ret;
653 
654   ret = hts221_read_reg(ctx, HTS221_STATUS_REG, (uint8_t *) val, 1);
655 
656   return ret;
657 }
658 
659 /**
660   * @}
661   *
662   */
663 
664 /**
665   * @defgroup  HTS221_interrupts
666   * @brief   This section group all the functions that manage interrupts
667   * @{
668   *
669   */
670 
671 /**
672   * @brief  Data-ready signal on INT_DRDY pin.[set]
673   *
674   * @param  ctx     read / write interface definitions
675   * @param  val     change the values of drdy in reg CTRL_REG3
676   * @retval         interface status (MANDATORY: return 0 -> no Error)
677   *
678   */
hts221_drdy_on_int_set(stmdev_ctx_t * ctx,uint8_t val)679 int32_t hts221_drdy_on_int_set(stmdev_ctx_t *ctx, uint8_t val)
680 {
681   hts221_ctrl_reg3_t reg;
682   int32_t ret;
683 
684   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
685 
686   if (ret == 0)
687   {
688     reg.drdy = val;
689     ret = hts221_write_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
690   }
691 
692   return ret;
693 }
694 
695 /**
696   * @brief  Data-ready signal on INT_DRDY pin.[get]
697   *
698   * @param  ctx     read / write interface definitions
699   * @param  val     change the values of drdy in reg CTRL_REG3
700   * @retval         interface status (MANDATORY: return 0 -> no Error)
701   *
702   */
hts221_drdy_on_int_get(stmdev_ctx_t * ctx,uint8_t * val)703 int32_t hts221_drdy_on_int_get(stmdev_ctx_t *ctx, uint8_t *val)
704 {
705   hts221_ctrl_reg3_t reg;
706   int32_t ret;
707 
708   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
709   *val = reg.drdy;
710 
711   return ret;
712 }
713 
714 /**
715   * @brief  Push-pull/open drain selection on interrupt pads.[set]
716   *
717   * @param  ctx     read / write interface definitions
718   * @param  val     change the values of pp_od in reg CTRL_REG3
719   *
720   */
hts221_pin_mode_set(stmdev_ctx_t * ctx,hts221_pp_od_t val)721 int32_t hts221_pin_mode_set(stmdev_ctx_t *ctx, hts221_pp_od_t val)
722 {
723   hts221_ctrl_reg3_t reg;
724   int32_t ret;
725 
726   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
727 
728   if (ret == 0)
729   {
730     reg.pp_od = (uint8_t)val;
731     ret = hts221_write_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
732   }
733 
734   return ret;
735 }
736 
737 /**
738   * @brief  Push-pull/open drain selection on interrupt pads.[get]
739   *
740   * @param  ctx     read / write interface definitions
741   * @param  val     Get the values of pp_od in reg CTRL_REG3
742   * @retval         interface status (MANDATORY: return 0 -> no Error)
743   *
744   */
hts221_pin_mode_get(stmdev_ctx_t * ctx,hts221_pp_od_t * val)745 int32_t hts221_pin_mode_get(stmdev_ctx_t *ctx, hts221_pp_od_t *val)
746 {
747   hts221_ctrl_reg3_t reg;
748   int32_t ret;
749 
750   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
751 
752   switch (reg.pp_od)
753   {
754     case HTS221_PUSH_PULL:
755       *val = HTS221_PUSH_PULL;
756       break;
757 
758     case HTS221_OPEN_DRAIN:
759       *val = HTS221_OPEN_DRAIN;
760       break;
761 
762     default:
763       *val = HTS221_PIN_MODE_ND;
764       break;
765   }
766 
767   return ret;
768 }
769 
770 /**
771   * @brief  Interrupt active-high/low.[set]
772   *
773   * @param  ctx     read / write interface definitions
774   * @param  val     change the values of drdy_h_l in reg CTRL_REG3
775   * @retval         interface status (MANDATORY: return 0 -> no Error)
776   *
777   */
hts221_int_polarity_set(stmdev_ctx_t * ctx,hts221_drdy_h_l_t val)778 int32_t hts221_int_polarity_set(stmdev_ctx_t *ctx,
779                                 hts221_drdy_h_l_t val)
780 {
781   hts221_ctrl_reg3_t reg;
782   int32_t ret;
783 
784   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
785 
786   if (ret == 0)
787   {
788     reg.drdy_h_l = (uint8_t)val;
789     ret = hts221_write_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
790   }
791 
792   return ret;
793 }
794 
795 /**
796   * @brief  Interrupt active-high/low.[get]
797   *
798   * @param  ctx     read / write interface definitions
799   * @param  val     Get the values of drdy_h_l in reg CTRL_REG3
800   * @retval         interface status (MANDATORY: return 0 -> no Error)
801   *
802   */
hts221_int_polarity_get(stmdev_ctx_t * ctx,hts221_drdy_h_l_t * val)803 int32_t hts221_int_polarity_get(stmdev_ctx_t *ctx,
804                                 hts221_drdy_h_l_t *val)
805 {
806   hts221_ctrl_reg3_t reg;
807   int32_t ret;
808 
809   ret = hts221_read_reg(ctx, HTS221_CTRL_REG3, (uint8_t *) &reg, 1);
810 
811   switch (reg.drdy_h_l)
812   {
813     case HTS221_ACTIVE_HIGH:
814       *val = HTS221_ACTIVE_HIGH;
815       break;
816 
817     case HTS221_ACTIVE_LOW:
818       *val = HTS221_ACTIVE_LOW;
819       break;
820 
821     default:
822       *val = HTS221_ACTIVE_ND;
823       break;
824   }
825 
826   return ret;
827 }
828 
829 /**
830   * @}
831   *
832   */
833 
834 /**
835   * @defgroup  HTS221_calibration
836   * @brief     This section group all the calibration coefficients need
837   *            for reading data
838   * @{
839   *
840   */
841 
842 /**
843   * @brief  First calibration point for Rh Humidity.[get]
844   *
845   * @param  ctx     read / write interface definitions
846   * @param  val     buffer that stores data read
847   * @retval         interface status (MANDATORY: return 0 -> no Error)
848   *
849   */
hts221_hum_rh_point_0_get(stmdev_ctx_t * ctx,float_t * val)850 int32_t hts221_hum_rh_point_0_get(stmdev_ctx_t *ctx, float_t *val)
851 {
852   uint8_t coeff;
853   int32_t ret;
854 
855   ret = hts221_read_reg(ctx, HTS221_H0_RH_X2, &coeff, 1);
856   *val = coeff / 2.0f;
857 
858   return ret;
859 }
860 
861 /**
862   * @brief  Second calibration point for Rh Humidity.[get]
863   *
864   * @param  ctx     read / write interface definitions
865   * @param  val     buffer that stores data read
866   * @retval         interface status (MANDATORY: return 0 -> no Error)
867   *
868   */
hts221_hum_rh_point_1_get(stmdev_ctx_t * ctx,float_t * val)869 int32_t hts221_hum_rh_point_1_get(stmdev_ctx_t *ctx, float_t *val)
870 {
871   uint8_t coeff;
872   int32_t ret;
873 
874   ret = hts221_read_reg(ctx, HTS221_H1_RH_X2, &coeff, 1);
875   *val = coeff / 2.0f;
876 
877   return ret;
878 }
879 
880 /**
881   * @brief  First calibration point for degC temperature.[get]
882   *
883   * @param  ctx     read / write interface definitions
884   * @param  buff    buffer that stores data read
885   * @retval         interface status (MANDATORY: return 0 -> no Error)
886   *
887   */
hts221_temp_deg_point_0_get(stmdev_ctx_t * ctx,float_t * val)888 int32_t hts221_temp_deg_point_0_get(stmdev_ctx_t *ctx, float_t *val)
889 {
890   hts221_t1_t0_msb_t reg;
891   uint8_t coeff_h, coeff_l;
892   int32_t ret;
893 
894   ret = hts221_read_reg(ctx, HTS221_T0_DEGC_X8, &coeff_l, 1);
895 
896   if (ret == 0)
897   {
898     ret = hts221_read_reg(ctx, HTS221_T1_T0_MSB, (uint8_t *) &reg, 1);
899     coeff_h = reg.t0_msb;
900     *val = ((coeff_h * 256) + coeff_l) / 8.0f;
901   }
902 
903   return ret;
904 }
905 
906 /**
907   * @brief  Second calibration point for degC temperature.[get]
908   *
909   * @param  ctx     read / write interface definitions
910   * @param  val     buffer that stores data read
911   * @retval         interface status (MANDATORY: return 0 -> no Error)
912   *
913   */
hts221_temp_deg_point_1_get(stmdev_ctx_t * ctx,float_t * val)914 int32_t hts221_temp_deg_point_1_get(stmdev_ctx_t *ctx, float_t *val)
915 {
916   hts221_t1_t0_msb_t reg;
917   uint8_t coeff_h, coeff_l;
918   int32_t ret;
919 
920   ret = hts221_read_reg(ctx, HTS221_T1_DEGC_X8, &coeff_l, 1);
921 
922   if (ret == 0)
923   {
924     ret = hts221_read_reg(ctx, HTS221_T1_T0_MSB, (uint8_t *) &reg, 1);
925     coeff_h = reg.t1_msb;
926     *val = ((coeff_h * 256) + coeff_l) / 8.0f;
927   }
928 
929   return ret;
930 }
931 
932 /**
933   * @brief  First calibration point for humidity in LSB.[get]
934   *
935   * @param  ctx     read / write interface definitions
936   * @param  val     buffer that stores data read
937   * @retval         interface status (MANDATORY: return 0 -> no Error)
938   *
939   */
hts221_hum_adc_point_0_get(stmdev_ctx_t * ctx,float_t * val)940 int32_t hts221_hum_adc_point_0_get(stmdev_ctx_t *ctx, float_t *val)
941 {
942   uint8_t coeff_p[2];
943   int16_t coeff;
944   int32_t ret;
945 
946   ret = hts221_read_reg(ctx, HTS221_H0_T0_OUT_L, coeff_p, 2);
947   coeff = (coeff_p[1] * 256) + coeff_p[0];
948   *val = coeff * 1.0f;
949 
950   return ret;
951 }
952 
953 /**
954   * @brief  Second calibration point for humidity in LSB.[get]
955   *
956   * @param  ctx     read / write interface definitions
957   * @param  val     buffer that stores data read
958   * @retval         interface status (MANDATORY: return 0 -> no Error)
959   *
960   */
hts221_hum_adc_point_1_get(stmdev_ctx_t * ctx,float_t * val)961 int32_t hts221_hum_adc_point_1_get(stmdev_ctx_t *ctx, float_t *val)
962 {
963   uint8_t coeff_p[2];
964   int16_t coeff;
965   int32_t ret;
966 
967   ret = hts221_read_reg(ctx, HTS221_H1_T0_OUT_L, coeff_p, 2);
968   coeff = (coeff_p[1] * 256) + coeff_p[0];
969   *val = coeff * 1.0f;
970 
971   return ret;
972 }
973 
974 /**
975   * @brief  First calibration point for temperature in LSB.[get]
976   *
977   * @param  ctx     read / write interface definitions
978   * @param  val     buffer that stores data read
979   * @retval         interface status (MANDATORY: return 0 -> no Error)
980   *
981   */
hts221_temp_adc_point_0_get(stmdev_ctx_t * ctx,float_t * val)982 int32_t hts221_temp_adc_point_0_get(stmdev_ctx_t *ctx, float_t *val)
983 {
984   uint8_t coeff_p[2];
985   int16_t coeff;
986   int32_t ret;
987 
988   ret = hts221_read_reg(ctx, HTS221_T0_OUT_L, coeff_p, 2);
989   coeff = (coeff_p[1] * 256) + coeff_p[0];
990   *val = coeff * 1.0f;
991 
992   return ret;
993 }
994 
995 /**
996   * @brief  Second calibration point for temperature in LSB.[get]
997   *
998   * @param  ctx     read / write interface definitions
999   * @param  val     buffer that stores data read
1000   * @retval         interface status (MANDATORY: return 0 -> no Error)
1001   *
1002   */
hts221_temp_adc_point_1_get(stmdev_ctx_t * ctx,float_t * val)1003 int32_t hts221_temp_adc_point_1_get(stmdev_ctx_t *ctx, float_t *val)
1004 {
1005   uint8_t coeff_p[2];
1006   int16_t coeff;
1007   int32_t ret;
1008 
1009   ret = hts221_read_reg(ctx, HTS221_T1_OUT_L, coeff_p, 2);
1010   coeff = (coeff_p[1] * 256) + coeff_p[0];
1011   *val = coeff * 1.0f;
1012 
1013   return ret;
1014 }
1015 
1016 /**
1017   * @}
1018   *
1019   */
1020 
1021 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1022