1 /*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /* Use the NRF_RTC instance for coarse radio event scheduling */
8 #if !defined(CONFIG_BT_CTLR_NRF_GRTC)
9 #define NRF_RTC NRF_RTC10
10 #endif /* !CONFIG_BT_CTLR_NRF_GRTC */
11
12 #undef EVENT_TIMER_ID
13 #define EVENT_TIMER_ID 10
14
15 #undef EVENT_TIMER
16 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID)
17
18 #if !defined(CONFIG_BT_CTLR_TIFS_HW)
19 #undef SW_SWITCH_TIMER
20 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
21 #define SW_SWITCH_TIMER EVENT_TIMER
22 #else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
23 /* TODO: Using NRF_TIMER from another domain needs DPPIC and PPIB setup */
24 #error "SW tIFS switching using dedicated second timer not supported yet."
25 #endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
26 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
27
28 /* HAL abstraction of event timer prescaler value */
29 #define HAL_EVENT_TIMER_PRESCALER_VALUE 5U
30
31 /* NRF Radio HW timing constants
32 * - provided in US and NS (for higher granularity)
33 * - based on empirical measurements and sniffer logs
34 */
35
36 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
37 * in microseconds for LE 1M PHY.
38 */
39 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS 40900 /*40.1 + 0.8*/
40 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US \
41 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS)
42
43 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
44 * in microseconds for LE 1M PHY.
45 */
46 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS 140900 /*140.1 + 0.8*/
47 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US \
48 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS)
49
50 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode
51 * and no HW TIFS auto-switch) in microseconds for LE 1M PHY.
52 */
53 /* 129.5 + 0.8 */
54 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS 130300
55 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US \
56 HAL_RADIO_NS2US_ROUND( \
57 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS)
58
59 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
60 * in microseconds for LE 2M PHY.
61 */
62 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS 40000 /* 40.1 - 0.1 */
63 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US \
64 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS)
65
66 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
67 * in microseconds for LE 2M PHY.
68 */
69 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS 144900 /* 145 - 0.1 */
70 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US \
71 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS)
72
73 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
74 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
75 */
76 /* 129.5 - 0.1 */
77 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS 129400
78 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US \
79 HAL_RADIO_NS2US_ROUND( \
80 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS)
81
82 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
83 * in microseconds for LE CODED PHY [S2].
84 */
85 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS 42300 /* 40.1 + 2.2 */
86 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US \
87 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS)
88
89 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
90 * in microseconds for LE 2M PHY [S2].
91 */
92 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS 132200 /* 130 + 2.2 */
93 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US \
94 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS)
95
96 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
97 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S2].
98 */
99 /* 129.5 + 2.2 */
100 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS 131700
101 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US \
102 HAL_RADIO_NS2US_ROUND( \
103 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS)
104
105 /* TXEN->TXIDLE + TXIDLE->TX (with fast Radio ramp-up mode)
106 * in microseconds for LE CODED PHY [S8].
107 */
108 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS 42300 /* 40.1 + 2.2 */
109 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US \
110 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS)
111 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode)
112 * in microseconds for LE 2M PHY [S8].
113 */
114 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS 121800 /*119.6 + 2.2*/
115 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US \
116 HAL_RADIO_NS2US_ROUND(HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS)
117
118 /* TXEN->TXIDLE + TXIDLE->TX (with default Radio ramp-up mode and
119 * no HW TIFS auto-switch) in microseconds for LE 2M PHY [S8].
120 */
121 /* 129.5 + 2.2 */
122 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS 131700
123 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US \
124 HAL_RADIO_NS2US_ROUND( \
125 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS)
126
127 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
128 * in microseconds for LE 1M PHY.
129 */
130 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS 40300 /* 40.1 + 0.2 */
131 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US \
132 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS)
133
134 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
135 * in microseconds for LE 1M PHY.
136 */
137 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS 140300 /*140.1 + 0.2*/
138 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US \
139 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS)
140
141 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
142 * no HW TIFS auto-switch) in microseconds for LE 1M PHY.
143 */
144 /* 129.5 + 0.2 */
145 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS 129700
146 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US \
147 HAL_RADIO_NS2US_CEIL( \
148 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS)
149
150 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
151 * in microseconds for LE 2M PHY.
152 */
153 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS 40300 /* 40.1 + 0.2 */
154 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US \
155 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS)
156
157 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
158 * in microseconds for LE 2M PHY.
159 */
160 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS 144800 /*144.6 + 0.2*/
161 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US \
162 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS)
163
164 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
165 * no HW TIFS auto-switch) in microseconds for LE 2M PHY.
166 */
167 /* 129.5 + 0.2 */
168 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS 129700
169 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US \
170 HAL_RADIO_NS2US_CEIL( \
171 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS)
172
173 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
174 * in microseconds for LE Coded PHY [S2].
175 */
176 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS 40300 /* 40.1 + 0.2 */
177 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US \
178 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS)
179
180 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
181 * in microseconds for LE Coded PHY [S2].
182 */
183 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS 130200 /* 130 + 0.2 */
184 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US \
185 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS)
186
187 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode
188 * and no HW TIFS auto-switch) in microseconds for LE Coded PHY [S2].
189 */
190 /* 129.5 + 0.2 */
191 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS 129700
192 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US \
193 HAL_RADIO_NS2US_CEIL( \
194 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS)
195
196 /* RXEN->RXIDLE + RXIDLE->RX (with fast Radio ramp-up mode)
197 * in microseconds for LE Coded PHY [S8].
198 */
199 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS 40300 /* 40.1 + 0.2 */
200 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US \
201 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS)
202
203 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode)
204 * in microseconds for LE Coded PHY [S8].
205 */
206 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS 120200 /* 120.0 + 0.2 */
207 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US \
208 HAL_RADIO_NS2US_CEIL(HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS)
209
210 /* RXEN->RXIDLE + RXIDLE->RX (with default Radio ramp-up mode and
211 * no HW TIFS auto-switch) in microseconds for LE Coded PHY [S8].
212 */
213 /* 129.5 + 0.2 */
214 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS 129700
215 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US \
216 HAL_RADIO_NS2US_CEIL( \
217 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS)
218
219 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_US 1 /* ceil(0.6) */
220 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_NS 600 /* 0.6 */
221 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_US 1 /* ceil(0.6) */
222 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_NS 600 /* 0.6 */
223 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_US 1 /* ceil(0.6) */
224 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_NS 600 /* 0.6 */
225 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_US 1 /* ceil(0.6) */
226 #define HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_NS 600 /* 0.6 */
227
228 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US 10 /* ceil(9.4) */
229 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS 9400 /* 9.4 */
230 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US 5 /* ceil(5.0) */
231 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS 5000 /* 5.0 */
232 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US 25 /* ceil(19.6) */
233 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS 24600 /* 19.6 */
234 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US 30 /* ceil(29.6) */
235 #define HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS 29600 /* 29.6 */
236
237 #if defined(CONFIG_BT_CTLR_RADIO_ENABLE_FAST)
238 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
239 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_US
240 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
241 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_FAST_NS
242
243 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
244 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_US
245 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
246 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_FAST_NS
247
248 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
249 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_US
250 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
251 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_FAST_NS
252
253 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
254 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_US
255 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
256 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_FAST_NS
257
258 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
259 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_US
260 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
261 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_FAST_NS
262
263 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
264 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_US
265 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
266 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_FAST_NS
267
268 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
269 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_US
270 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
271 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_FAST_NS
272
273 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
274 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_US
275 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
276 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_FAST_NS
277
278 #else /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
279 #if defined(CONFIG_BT_CTLR_TIFS_HW)
280 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
281 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_US
282 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
283 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NS
284
285 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
286 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_US
287 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
288 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NS
289
290 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
291 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_US
292 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
293 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NS
294
295 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
296 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_US
297 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
298 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NS
299
300 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
301 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_US
302 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
303 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NS
304
305 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
306 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_US
307 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
308 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NS
309
310 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
311 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_US
312 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
313 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NS
314
315 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
316 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_US
317 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
318 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NS
319
320 #else /* !CONFIG_BT_CTLR_TIFS_HW */
321 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US \
322 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_US
323 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS \
324 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_DEFAULT_NO_HW_TIFS_NS
325
326 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US \
327 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_US
328 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS \
329 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_DEFAULT_NO_HW_TIFS_NS
330
331 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US \
332 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_US
333 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS \
334 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_DEFAULT_NO_HW_TIFS_NS
335
336 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US \
337 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_US
338 #define HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS \
339 HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_DEFAULT_NO_HW_TIFS_NS
340
341 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US \
342 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_US
343 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS \
344 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_DEFAULT_NO_HW_TIFS_NS
345
346 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US \
347 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_US
348 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS \
349 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_DEFAULT_NO_HW_TIFS_NS
350
351 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US \
352 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_US
353 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS \
354 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_DEFAULT_NO_HW_TIFS_NS
355
356 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US \
357 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_US
358 #define HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS \
359 HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_DEFAULT_NO_HW_TIFS_NS
360 #endif /* !CONFIG_BT_CTLR_TIFS_HW */
361 #endif /* !CONFIG_BT_CTLR_RADIO_ENABLE_FAST */
362
363 /* HAL abstraction of Radio bitfields */
364 #define HAL_RADIO_INTENSET_DISABLED_Msk RADIO_INTENSET00_DISABLED_Msk
365 #define HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
366 #define HAL_RADIO_SHORTS_TRX_PHYEND_DISABLE_Msk RADIO_SHORTS_PHYEND_DISABLE_Msk
367 #define HAL_RADIO_CLEARPATTERN_CLEARPATTERN_Clear (1UL)
368
369 /* HAL abstraction of Radio IRQ number */
370 #define HAL_RADIO_IRQn RADIO_0_IRQn
371
372 /* SoC specific NRF_RADIO power-on reset value. Refer to Product Specification,
373 * RADIO Registers section for the documented reset values.
374 *
375 * NOTE: Only implementation used values defined here.
376 * In the future if MDK or nRFx header include these, use them instead.
377 */
378 #define HAL_RADIO_RESET_VALUE_DFEMODE 0x00000000UL
379 #define HAL_RADIO_RESET_VALUE_CTEINLINECONF 0x00002800UL
380 #define HAL_RADIO_RESET_VALUE_DATAWHITE 0x00890040UL
381
hal_radio_reset(void)382 static inline void hal_radio_reset(void)
383 {
384 /* TODO: Add any required setup for each radio event
385 */
386 }
387
hal_radio_stop(void)388 static inline void hal_radio_stop(void)
389 {
390 /* TODO: Add any required cleanup of actions taken in hal_radio_reset()
391 */
392 }
393
hal_radio_ram_prio_setup(void)394 static inline void hal_radio_ram_prio_setup(void)
395 {
396 /* TODO */
397 }
398
hal_radio_phy_mode_get(uint8_t phy,uint8_t flags)399 static inline uint32_t hal_radio_phy_mode_get(uint8_t phy, uint8_t flags)
400 {
401 uint32_t mode;
402
403 switch (phy) {
404 case BIT(0):
405 default:
406 mode = RADIO_MODE_MODE_Ble_1Mbit;
407 break;
408
409 case BIT(1):
410 mode = RADIO_MODE_MODE_Ble_2Mbit;
411 break;
412
413 #if defined(CONFIG_BT_CTLR_PHY_CODED)
414 case BIT(2):
415 if (flags & 0x01) {
416 mode = RADIO_MODE_MODE_Ble_LR125Kbit;
417 } else {
418 mode = RADIO_MODE_MODE_Ble_LR500Kbit;
419 }
420 break;
421 #endif /* CONFIG_BT_CTLR_PHY_CODED */
422 }
423
424 return mode;
425 }
426
hal_radio_tx_power_max_get(void)427 static inline int8_t hal_radio_tx_power_max_get(void)
428 {
429 return 8; /* +8 dBm */
430 }
431
hal_radio_tx_power_min_get(void)432 static inline int8_t hal_radio_tx_power_min_get(void)
433 {
434 return -46; /* -46 dBm */
435 }
436
hal_radio_tx_power_floor(int8_t tx_power_lvl)437 static inline int8_t hal_radio_tx_power_floor(int8_t tx_power_lvl)
438 {
439 if (tx_power_lvl >= 8) {
440 return 8;
441 }
442
443 if (tx_power_lvl >= 7) {
444 return 7;
445 }
446
447 if (tx_power_lvl >= 6) {
448 return 6;
449 }
450
451 if (tx_power_lvl >= 5) {
452 return 5;
453 }
454
455 if (tx_power_lvl >= 4) {
456 return 4;
457 }
458
459 if (tx_power_lvl >= 3) {
460 return 3;
461 }
462
463 if (tx_power_lvl >= 2) {
464 return 2;
465 }
466
467 if (tx_power_lvl >= 1) {
468 return 1;
469 }
470
471 if (tx_power_lvl >= 0) {
472 return 0;
473 }
474
475 if (tx_power_lvl >= -1) {
476 return -1;
477 }
478
479 if (tx_power_lvl >= -2) {
480 return -2;
481 }
482
483 if (tx_power_lvl >= -3) {
484 return -3;
485 }
486
487 if (tx_power_lvl >= -4) {
488 return -4;
489 }
490
491 if (tx_power_lvl >= -5) {
492 return -5;
493 }
494
495 if (tx_power_lvl >= -6) {
496 return -6;
497 }
498
499 if (tx_power_lvl >= -7) {
500 return -7;
501 }
502
503 if (tx_power_lvl >= -8) {
504 return -8;
505 }
506
507 if (tx_power_lvl >= -9) {
508 return -9;
509 }
510
511 if (tx_power_lvl >= -10) {
512 return -10;
513 }
514
515 if (tx_power_lvl >= -12) {
516 return -12;
517 }
518
519 if (tx_power_lvl >= -14) {
520 return -14;
521 }
522
523 if (tx_power_lvl >= -16) {
524 return -16;
525 }
526
527 if (tx_power_lvl >= -20) {
528 return -20;
529 }
530
531 if (tx_power_lvl >= -26) {
532 return -26;
533 }
534
535 if (tx_power_lvl >= -40) {
536 return -40;
537 }
538
539 return -46;
540 }
541
hal_radio_tx_power_value(int8_t tx_power_lvl)542 static inline uint32_t hal_radio_tx_power_value(int8_t tx_power_lvl)
543 {
544 if (tx_power_lvl >= 8) {
545 return RADIO_TXPOWER_TXPOWER_Pos8dBm;
546 }
547
548 if (tx_power_lvl >= 7) {
549 return RADIO_TXPOWER_TXPOWER_Pos7dBm;
550 }
551
552 if (tx_power_lvl >= 6) {
553 return RADIO_TXPOWER_TXPOWER_Pos6dBm;
554 }
555
556 if (tx_power_lvl >= 5) {
557 return RADIO_TXPOWER_TXPOWER_Pos5dBm;
558 }
559
560 if (tx_power_lvl >= 4) {
561 return RADIO_TXPOWER_TXPOWER_Pos4dBm;
562 }
563
564 if (tx_power_lvl >= 3) {
565 return RADIO_TXPOWER_TXPOWER_Pos3dBm;
566 }
567
568 if (tx_power_lvl >= 2) {
569 return RADIO_TXPOWER_TXPOWER_Pos2dBm;
570 }
571
572 if (tx_power_lvl >= 1) {
573 return RADIO_TXPOWER_TXPOWER_Pos1dBm;
574 }
575
576 if (tx_power_lvl >= 0) {
577 return RADIO_TXPOWER_TXPOWER_0dBm;
578 }
579
580 if (tx_power_lvl >= -1) {
581 return RADIO_TXPOWER_TXPOWER_Neg1dBm;
582 }
583
584 if (tx_power_lvl >= -2) {
585 return RADIO_TXPOWER_TXPOWER_Neg2dBm;
586 }
587
588 if (tx_power_lvl >= -3) {
589 return RADIO_TXPOWER_TXPOWER_Neg3dBm;
590 }
591
592 if (tx_power_lvl >= -4) {
593 return RADIO_TXPOWER_TXPOWER_Neg4dBm;
594 }
595
596 if (tx_power_lvl >= -5) {
597 return RADIO_TXPOWER_TXPOWER_Neg5dBm;
598 }
599
600 if (tx_power_lvl >= -6) {
601 return RADIO_TXPOWER_TXPOWER_Neg6dBm;
602 }
603
604 if (tx_power_lvl >= -7) {
605 return RADIO_TXPOWER_TXPOWER_Neg7dBm;
606 }
607
608 if (tx_power_lvl >= -8) {
609 return RADIO_TXPOWER_TXPOWER_Neg8dBm;
610 }
611
612 if (tx_power_lvl >= -9) {
613 return RADIO_TXPOWER_TXPOWER_Neg9dBm;
614 }
615
616 if (tx_power_lvl >= -10) {
617 return RADIO_TXPOWER_TXPOWER_Neg10dBm;
618 }
619
620 if (tx_power_lvl >= -12) {
621 return RADIO_TXPOWER_TXPOWER_Neg12dBm;
622 }
623
624 if (tx_power_lvl >= -14) {
625 return RADIO_TXPOWER_TXPOWER_Neg14dBm;
626 }
627
628 if (tx_power_lvl >= -16) {
629 return RADIO_TXPOWER_TXPOWER_Neg16dBm;
630 }
631
632 if (tx_power_lvl >= -20) {
633 return RADIO_TXPOWER_TXPOWER_Neg20dBm;
634 }
635
636 #if defined(RADIO_TXPOWER_TXPOWER_Neg26dBm)
637 if (tx_power_lvl >= -26) {
638 return RADIO_TXPOWER_TXPOWER_Neg26dBm;
639 }
640 #endif
641
642 #if defined(RADIO_TXPOWER_TXPOWER_Neg28dBm)
643 if (tx_power_lvl >= -28) {
644 return RADIO_TXPOWER_TXPOWER_Neg28dBm;
645 }
646 #endif
647
648 if (tx_power_lvl >= -40) {
649 return RADIO_TXPOWER_TXPOWER_Neg40dBm;
650 }
651
652 return RADIO_TXPOWER_TXPOWER_Neg46dBm;
653 }
654
hal_radio_tx_ready_delay_us_get(uint8_t phy,uint8_t flags)655 static inline uint32_t hal_radio_tx_ready_delay_us_get(uint8_t phy, uint8_t flags)
656 {
657 switch (phy) {
658 default:
659 case BIT(0):
660 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_US;
661 case BIT(1):
662 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_US;
663
664 #if defined(CONFIG_BT_CTLR_PHY_CODED)
665 case BIT(2):
666 if (flags & 0x01) {
667 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_US;
668 } else {
669 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_US;
670 }
671 #endif /* CONFIG_BT_CTLR_PHY_CODED */
672 }
673 }
674
hal_radio_rx_ready_delay_us_get(uint8_t phy,uint8_t flags)675 static inline uint32_t hal_radio_rx_ready_delay_us_get(uint8_t phy, uint8_t flags)
676 {
677 switch (phy) {
678 default:
679 case BIT(0):
680 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_US;
681 case BIT(1):
682 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_US;
683
684 #if defined(CONFIG_BT_CTLR_PHY_CODED)
685 case BIT(2):
686 if (flags & 0x01) {
687 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_US;
688 } else {
689 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_US;
690 }
691 #endif /* CONFIG_BT_CTLR_PHY_CODED */
692 }
693 }
694
hal_radio_tx_chain_delay_us_get(uint8_t phy,uint8_t flags)695 static inline uint32_t hal_radio_tx_chain_delay_us_get(uint8_t phy, uint8_t flags)
696 {
697 switch (phy) {
698 default:
699 case BIT(0):
700 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_US;
701 case BIT(1):
702 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_US;
703
704 #if defined(CONFIG_BT_CTLR_PHY_CODED)
705 case BIT(2):
706 if (flags & 0x01) {
707 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_US;
708 } else {
709 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_US;
710 }
711 #endif /* CONFIG_BT_CTLR_PHY_CODED */
712 }
713 }
714
hal_radio_rx_chain_delay_us_get(uint8_t phy,uint8_t flags)715 static inline uint32_t hal_radio_rx_chain_delay_us_get(uint8_t phy, uint8_t flags)
716 {
717 switch (phy) {
718 default:
719 case BIT(0):
720 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_US;
721 case BIT(1):
722 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_US;
723
724 #if defined(CONFIG_BT_CTLR_PHY_CODED)
725 case BIT(2):
726 if (flags & 0x01) {
727 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_US;
728 } else {
729 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_US;
730 }
731 #endif /* CONFIG_BT_CTLR_PHY_CODED */
732 }
733 }
734
hal_radio_tx_ready_delay_ns_get(uint8_t phy,uint8_t flags)735 static inline uint32_t hal_radio_tx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
736 {
737 switch (phy) {
738 default:
739 case BIT(0):
740 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_1M_NS;
741 case BIT(1):
742 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_2M_NS;
743
744 #if defined(CONFIG_BT_CTLR_PHY_CODED)
745 case BIT(2):
746 if (flags & 0x01) {
747 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S8_NS;
748 } else {
749 return HAL_RADIO_NRF54LX_TXEN_TXIDLE_TX_S2_NS;
750 }
751 #endif /* CONFIG_BT_CTLR_PHY_CODED */
752 }
753 }
754
hal_radio_rx_ready_delay_ns_get(uint8_t phy,uint8_t flags)755 static inline uint32_t hal_radio_rx_ready_delay_ns_get(uint8_t phy, uint8_t flags)
756 {
757 switch (phy) {
758 default:
759 case BIT(0):
760 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_1M_NS;
761 case BIT(1):
762 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_2M_NS;
763
764 #if defined(CONFIG_BT_CTLR_PHY_CODED)
765 case BIT(2):
766 if (flags & 0x01) {
767 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S8_NS;
768 } else {
769 return HAL_RADIO_NRF54LX_RXEN_RXIDLE_RX_S2_NS;
770 }
771 #endif /* CONFIG_BT_CTLR_PHY_CODED */
772 }
773 }
774
hal_radio_tx_chain_delay_ns_get(uint8_t phy,uint8_t flags)775 static inline uint32_t hal_radio_tx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
776 {
777 switch (phy) {
778 default:
779 case BIT(0):
780 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_1M_NS;
781 case BIT(1):
782 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_2M_NS;
783
784 #if defined(CONFIG_BT_CTLR_PHY_CODED)
785 case BIT(2):
786 if (flags & 0x01) {
787 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S8_NS;
788 } else {
789 return HAL_RADIO_NRF54LX_TX_CHAIN_DELAY_S2_NS;
790 }
791 #endif /* CONFIG_BT_CTLR_PHY_CODED */
792 }
793 }
794
hal_radio_rx_chain_delay_ns_get(uint8_t phy,uint8_t flags)795 static inline uint32_t hal_radio_rx_chain_delay_ns_get(uint8_t phy, uint8_t flags)
796 {
797 switch (phy) {
798 default:
799 case BIT(0):
800 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_1M_NS;
801 case BIT(1):
802 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_2M_NS;
803
804 #if defined(CONFIG_BT_CTLR_PHY_CODED)
805 case BIT(2):
806 if (flags & 0x01) {
807 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S8_NS;
808 } else {
809 return HAL_RADIO_NRF54LX_RX_CHAIN_DELAY_S2_NS;
810 }
811 #endif /* CONFIG_BT_CTLR_PHY_CODED */
812 }
813 }
814
