1 // Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #ifndef _SOC_CPU_H 16 #define _SOC_CPU_H 17 18 #include <stdint.h> 19 #include <stdbool.h> 20 #include <stddef.h> 21 22 #if __XTENSA__ 23 #include "xt_instr_macros.h" 24 // [refactor-todo] not actually needed in this header now, 25 // but kept for compatibility 26 #include "xtensa/corebits.h" 27 #include "xtensa/config/core.h" 28 29 #include "xtensa/config/specreg.h" 30 #endif 31 32 #include "hal/cpu_hal.h" 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /** @brief Read current stack pointer address 39 * 40 */ get_sp(void)41static inline void *get_sp(void) 42 { 43 return cpu_hal_get_sp(); 44 } 45 46 /** 47 * @brief Stall CPU using RTC controller 48 * @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP) 49 */ 50 void esp_cpu_stall(int cpu_id); 51 52 /** 53 * @brief Un-stall CPU using RTC controller 54 * @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP) 55 */ 56 void esp_cpu_unstall(int cpu_id); 57 58 /** 59 * @brief Reset CPU using RTC controller 60 * @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP) 61 */ 62 void esp_cpu_reset(int cpu_id); 63 64 65 /** 66 * @brief Returns true if a JTAG debugger is attached to CPU 67 * OCD (on chip debug) port. 68 * 69 * @note If "Make exception and panic handlers JTAG/OCD aware" 70 * is disabled, this function always returns false. 71 */ 72 bool esp_cpu_in_ocd_debug_mode(void); 73 74 /** 75 * @brief Convert the PC register value to its true address 76 * 77 * The address of the current instruction is not stored as an exact uint32_t 78 * representation in PC register. This function will convert the value stored in 79 * the PC register to a uint32_t address. 80 * 81 * @param pc_raw The PC as stored in register format. 82 * 83 * @return Address in uint32_t format 84 */ esp_cpu_process_stack_pc(uint32_t pc)85static inline uint32_t esp_cpu_process_stack_pc(uint32_t pc) 86 { 87 if (pc & 0x80000000) { 88 //Top two bits of a0 (return address) specify window increment. Overwrite to map to address space. 89 pc = (pc & 0x3fffffff) | 0x40000000; 90 } 91 //Minus 3 to get PC of previous instruction (i.e. instruction executed before return address) 92 return pc - 3; 93 } 94 95 typedef uint32_t esp_cpu_ccount_t; 96 esp_cpu_get_ccount(void)97static inline esp_cpu_ccount_t esp_cpu_get_ccount(void) 98 { 99 return cpu_hal_get_cycle_count(); 100 } 101 esp_cpu_set_ccount(esp_cpu_ccount_t val)102static inline void esp_cpu_set_ccount(esp_cpu_ccount_t val) 103 { 104 cpu_hal_set_cycle_count(val); 105 } 106 107 /** 108 * @brief Configure CPU to disable access to invalid memory regions 109 * 110 */ 111 void esp_cpu_configure_region_protection(void); 112 113 #ifdef __cplusplus 114 } 115 #endif 116 117 #endif 118