1 /*
2 * Copyright (c) 2021, Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nordic_nrf_gpio
8
9 #include <nrfx_gpiote.h>
10 #include <string.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
13 #include <zephyr/irq.h>
14
15 #include <zephyr/drivers/gpio/gpio_utils.h>
16
17 struct gpio_nrfx_data {
18 /* gpio_driver_data needs to be first */
19 struct gpio_driver_data common;
20 sys_slist_t callbacks;
21 };
22
23 struct gpio_nrfx_cfg {
24 /* gpio_driver_config needs to be first */
25 struct gpio_driver_config common;
26 NRF_GPIO_Type *port;
27 uint32_t edge_sense;
28 uint8_t port_num;
29 nrfx_gpiote_t gpiote;
30 };
31
get_port_data(const struct device * port)32 static inline struct gpio_nrfx_data *get_port_data(const struct device *port)
33 {
34 return port->data;
35 }
36
get_port_cfg(const struct device * port)37 static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port)
38 {
39 return port->config;
40 }
41
has_gpiote(const struct gpio_nrfx_cfg * cfg)42 static bool has_gpiote(const struct gpio_nrfx_cfg *cfg)
43 {
44 return cfg->gpiote.p_reg != NULL;
45 }
46
get_pull(gpio_flags_t flags)47 static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags)
48 {
49 if (flags & GPIO_PULL_UP) {
50 return NRF_GPIO_PIN_PULLUP;
51 } else if (flags & GPIO_PULL_DOWN) {
52 return NRF_GPIO_PIN_PULLDOWN;
53 }
54
55 return NRF_GPIO_PIN_NOPULL;
56 }
57
gpio_nrfx_pin_configure(const struct device * port,gpio_pin_t pin,gpio_flags_t flags)58 static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
59 gpio_flags_t flags)
60 {
61 nrfx_err_t err = NRFX_SUCCESS;
62 uint8_t ch;
63 bool free_ch = false;
64 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
65 nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
66 nrf_gpio_pin_pull_t pull = get_pull(flags);
67 nrf_gpio_pin_drive_t drive;
68
69 switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
70 case NRF_GPIO_DRIVE_S0S1:
71 drive = NRF_GPIO_PIN_S0S1;
72 break;
73 case NRF_GPIO_DRIVE_S0H1:
74 drive = NRF_GPIO_PIN_S0H1;
75 break;
76 case NRF_GPIO_DRIVE_H0S1:
77 drive = NRF_GPIO_PIN_H0S1;
78 break;
79 case NRF_GPIO_DRIVE_H0H1:
80 drive = NRF_GPIO_PIN_H0H1;
81 break;
82 case NRF_GPIO_DRIVE_S0 | GPIO_OPEN_DRAIN:
83 drive = NRF_GPIO_PIN_S0D1;
84 break;
85 case NRF_GPIO_DRIVE_H0 | GPIO_OPEN_DRAIN:
86 drive = NRF_GPIO_PIN_H0D1;
87 break;
88 case NRF_GPIO_DRIVE_S1 | GPIO_OPEN_SOURCE:
89 drive = NRF_GPIO_PIN_D0S1;
90 break;
91 case NRF_GPIO_DRIVE_H1 | GPIO_OPEN_SOURCE:
92 drive = NRF_GPIO_PIN_D0H1;
93 break;
94 default:
95 return -EINVAL;
96 }
97
98 if (flags & GPIO_OUTPUT_INIT_HIGH) {
99 nrf_gpio_port_out_set(cfg->port, BIT(pin));
100 } else if (flags & GPIO_OUTPUT_INIT_LOW) {
101 nrf_gpio_port_out_clear(cfg->port, BIT(pin));
102 }
103
104 if (!has_gpiote(cfg)) {
105 nrf_gpio_pin_dir_t dir = (flags & GPIO_OUTPUT)
106 ? NRF_GPIO_PIN_DIR_OUTPUT
107 : NRF_GPIO_PIN_DIR_INPUT;
108 nrf_gpio_pin_input_t input = (flags & GPIO_INPUT)
109 ? NRF_GPIO_PIN_INPUT_CONNECT
110 : NRF_GPIO_PIN_INPUT_DISCONNECT;
111
112 nrf_gpio_reconfigure(abs_pin, &dir, &input, &pull, &drive, NULL);
113 return 0;
114 }
115
116 /* Get the GPIOTE channel associated with this pin, if any. It needs
117 * to be freed when the pin is reconfigured or disconnected.
118 */
119 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
120 err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
121 free_ch = (err == NRFX_SUCCESS);
122 }
123
124 if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
125 /* Ignore the error code. The pin may not have been used. */
126 (void)nrfx_gpiote_pin_uninit(&cfg->gpiote, abs_pin);
127 } else {
128 /* Remove previously configured trigger when pin is reconfigured. */
129 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) {
130 nrfx_gpiote_trigger_config_t trigger_config = {
131 .trigger = NRFX_GPIOTE_TRIGGER_NONE,
132 };
133 nrfx_gpiote_input_pin_config_t input_pin_config = {
134 .p_trigger_config = &trigger_config,
135 };
136
137 err = nrfx_gpiote_input_configure(&cfg->gpiote,
138 abs_pin, &input_pin_config);
139 if (err != NRFX_SUCCESS) {
140 return -EINVAL;
141 }
142 }
143
144 if (flags & GPIO_OUTPUT) {
145 nrfx_gpiote_output_config_t output_config = {
146 .drive = drive,
147 .input_connect = (flags & GPIO_INPUT)
148 ? NRF_GPIO_PIN_INPUT_CONNECT
149 : NRF_GPIO_PIN_INPUT_DISCONNECT,
150 .pull = pull,
151 };
152
153 err = nrfx_gpiote_output_configure(&cfg->gpiote,
154 abs_pin, &output_config, NULL);
155 } else {
156 nrfx_gpiote_input_pin_config_t input_pin_config = {
157 .p_pull_config = &pull,
158 };
159
160 err = nrfx_gpiote_input_configure(&cfg->gpiote,
161 abs_pin, &input_pin_config);
162 }
163
164 if (err != NRFX_SUCCESS) {
165 return -EINVAL;
166 }
167 }
168
169 if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT) && free_ch) {
170 err = nrfx_gpiote_channel_free(&cfg->gpiote, ch);
171 __ASSERT_NO_MSG(err == NRFX_SUCCESS);
172 }
173
174 return 0;
175 }
176
gpio_nrfx_port_get_raw(const struct device * port,gpio_port_value_t * value)177 static int gpio_nrfx_port_get_raw(const struct device *port,
178 gpio_port_value_t *value)
179 {
180 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
181
182 *value = nrf_gpio_port_in_read(reg);
183
184 return 0;
185 }
186
gpio_nrfx_port_set_masked_raw(const struct device * port,gpio_port_pins_t mask,gpio_port_value_t value)187 static int gpio_nrfx_port_set_masked_raw(const struct device *port,
188 gpio_port_pins_t mask,
189 gpio_port_value_t value)
190 {
191 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
192
193 const uint32_t set_mask = value & mask;
194 const uint32_t clear_mask = (~set_mask) & mask;
195
196 nrf_gpio_port_out_set(reg, set_mask);
197 nrf_gpio_port_out_clear(reg, clear_mask);
198
199 return 0;
200 }
201
gpio_nrfx_port_set_bits_raw(const struct device * port,gpio_port_pins_t mask)202 static int gpio_nrfx_port_set_bits_raw(const struct device *port,
203 gpio_port_pins_t mask)
204 {
205 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
206
207 nrf_gpio_port_out_set(reg, mask);
208
209 return 0;
210 }
211
gpio_nrfx_port_clear_bits_raw(const struct device * port,gpio_port_pins_t mask)212 static int gpio_nrfx_port_clear_bits_raw(const struct device *port,
213 gpio_port_pins_t mask)
214 {
215 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
216
217 nrf_gpio_port_out_clear(reg, mask);
218
219 return 0;
220 }
221
gpio_nrfx_port_toggle_bits(const struct device * port,gpio_port_pins_t mask)222 static int gpio_nrfx_port_toggle_bits(const struct device *port,
223 gpio_port_pins_t mask)
224 {
225 NRF_GPIO_Type *reg = get_port_cfg(port)->port;
226 const uint32_t value = nrf_gpio_port_out_read(reg) ^ mask;
227 const uint32_t set_mask = value & mask;
228 const uint32_t clear_mask = (~value) & mask;
229
230 nrf_gpio_port_out_set(reg, set_mask);
231 nrf_gpio_port_out_clear(reg, clear_mask);
232
233 return 0;
234 }
235
236 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
get_trigger(enum gpio_int_mode mode,enum gpio_int_trig trig)237 static nrfx_gpiote_trigger_t get_trigger(enum gpio_int_mode mode,
238 enum gpio_int_trig trig)
239 {
240 if (mode == GPIO_INT_MODE_LEVEL) {
241 return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
242 NRFX_GPIOTE_TRIGGER_HIGH;
243 }
244
245 return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
246 trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_HITOLO :
247 NRFX_GPIOTE_TRIGGER_LOTOHI;
248 }
249
gpio_nrfx_pin_interrupt_configure(const struct device * port,gpio_pin_t pin,enum gpio_int_mode mode,enum gpio_int_trig trig)250 static int gpio_nrfx_pin_interrupt_configure(const struct device *port,
251 gpio_pin_t pin,
252 enum gpio_int_mode mode,
253 enum gpio_int_trig trig)
254 {
255 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
256 uint32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
257 nrfx_err_t err;
258 uint8_t ch;
259
260 if (!has_gpiote(cfg)) {
261 return -ENOTSUP;
262 }
263
264 if (mode == GPIO_INT_MODE_DISABLED) {
265 nrfx_gpiote_trigger_disable(&cfg->gpiote, abs_pin);
266
267 return 0;
268 }
269
270 nrfx_gpiote_trigger_config_t trigger_config = {
271 .trigger = get_trigger(mode, trig),
272 };
273 nrfx_gpiote_input_pin_config_t input_pin_config = {
274 .p_trigger_config = &trigger_config,
275 };
276
277 /* If edge mode is to be used and pin is not configured to use sense for
278 * edge use IN event.
279 */
280 if (!(BIT(pin) & cfg->edge_sense) &&
281 (mode == GPIO_INT_MODE_EDGE) &&
282 (nrf_gpio_pin_dir_get(abs_pin) == NRF_GPIO_PIN_DIR_INPUT)) {
283 err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch);
284 if (err == NRFX_ERROR_INVALID_PARAM) {
285 err = nrfx_gpiote_channel_alloc(&cfg->gpiote, &ch);
286 if (err != NRFX_SUCCESS) {
287 return -ENOMEM;
288 }
289 }
290
291 trigger_config.p_in_channel = &ch;
292 }
293
294 err = nrfx_gpiote_input_configure(&cfg->gpiote, abs_pin, &input_pin_config);
295 if (err != NRFX_SUCCESS) {
296 return -EINVAL;
297 }
298
299 nrfx_gpiote_trigger_enable(&cfg->gpiote, abs_pin, true);
300
301 return 0;
302 }
303
gpio_nrfx_manage_callback(const struct device * port,struct gpio_callback * callback,bool set)304 static int gpio_nrfx_manage_callback(const struct device *port,
305 struct gpio_callback *callback,
306 bool set)
307 {
308 return gpio_manage_callback(&get_port_data(port)->callbacks,
309 callback, set);
310 }
311 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
312
313 #ifdef CONFIG_GPIO_GET_DIRECTION
gpio_nrfx_port_get_direction(const struct device * port,gpio_port_pins_t map,gpio_port_pins_t * inputs,gpio_port_pins_t * outputs)314 static int gpio_nrfx_port_get_direction(const struct device *port,
315 gpio_port_pins_t map,
316 gpio_port_pins_t *inputs,
317 gpio_port_pins_t *outputs)
318 {
319 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
320 NRF_GPIO_Type *reg = cfg->port;
321
322 map &= cfg->common.port_pin_mask;
323
324 if (outputs != NULL) {
325 *outputs = map & nrf_gpio_port_dir_read(cfg->port);
326 }
327
328 if (inputs != NULL) {
329 *inputs = 0;
330 while (map) {
331 uint32_t pin = NRF_CTZ(map);
332 uint32_t pin_cnf = reg->PIN_CNF[pin];
333
334 /* Check if the pin has its input buffer connected. */
335 if (((pin_cnf & GPIO_PIN_CNF_INPUT_Msk) >>
336 GPIO_PIN_CNF_INPUT_Pos) ==
337 GPIO_PIN_CNF_INPUT_Connect) {
338 *inputs |= BIT(pin);
339 }
340
341 map &= ~BIT(pin);
342 }
343 }
344
345 return 0;
346 }
347 #endif /* CONFIG_GPIO_GET_DIRECTION */
348
349 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
350 /* Get port device from port id. */
get_dev(uint32_t port_id)351 static const struct device *get_dev(uint32_t port_id)
352 {
353 const struct device *dev = NULL;
354
355 #define GPIO_NRF_GET_DEV(i) \
356 else if (DT_INST_PROP(i, port) == port_id) { \
357 dev = DEVICE_DT_INST_GET(i); \
358 }
359
360 if (0) {
361 } /* Followed by else if from FOREACH macro. Done to avoid return statement in macro. */
362 DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
363 #undef GPIO_NRF_GET_DEV
364
365 return dev;
366 }
367
nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,nrfx_gpiote_trigger_t trigger,void * context)368 static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
369 nrfx_gpiote_trigger_t trigger,
370 void *context)
371 {
372 uint32_t pin = abs_pin;
373 uint32_t port_id = nrf_gpio_pin_port_number_extract(&pin);
374 const struct device *port = get_dev(port_id);
375
376 /* If given port is handled directly by nrfx driver it might not be enabled in DT. */
377 if (port == NULL) {
378 return;
379 }
380
381 struct gpio_nrfx_data *data = get_port_data(port);
382 sys_slist_t *list = &data->callbacks;
383
384 gpio_fire_callbacks(list, port, BIT(pin));
385 }
386 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
387
388 #define GPIOTE_IRQ_HANDLER_CONNECT(node_id) \
389 IRQ_CONNECT(DT_IRQN(node_id), DT_IRQ(node_id, priority), nrfx_isr, \
390 NRFX_CONCAT(nrfx_gpiote_, DT_PROP(node_id, instance), _irq_handler), 0);
391
gpio_nrfx_init(const struct device * port)392 static int gpio_nrfx_init(const struct device *port)
393 {
394 const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
395 nrfx_err_t err;
396
397 if (!has_gpiote(cfg)) {
398 return 0;
399 }
400
401 if (nrfx_gpiote_init_check(&cfg->gpiote)) {
402 return 0;
403 }
404
405 err = nrfx_gpiote_init(&cfg->gpiote, 0 /*not used*/);
406 if (err != NRFX_SUCCESS) {
407 return -EIO;
408 }
409
410 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
411 nrfx_gpiote_global_callback_set(&cfg->gpiote, nrfx_gpio_handler, NULL);
412 DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_IRQ_HANDLER_CONNECT);
413 #endif /* CONFIG_GPIO_NRFX_INTERRUPT */
414
415 return 0;
416 }
417
418 static const struct gpio_driver_api gpio_nrfx_drv_api_funcs = {
419 .pin_configure = gpio_nrfx_pin_configure,
420 .port_get_raw = gpio_nrfx_port_get_raw,
421 .port_set_masked_raw = gpio_nrfx_port_set_masked_raw,
422 .port_set_bits_raw = gpio_nrfx_port_set_bits_raw,
423 .port_clear_bits_raw = gpio_nrfx_port_clear_bits_raw,
424 .port_toggle_bits = gpio_nrfx_port_toggle_bits,
425 #ifdef CONFIG_GPIO_NRFX_INTERRUPT
426 .pin_interrupt_configure = gpio_nrfx_pin_interrupt_configure,
427 .manage_callback = gpio_nrfx_manage_callback,
428 #endif
429 #ifdef CONFIG_GPIO_GET_DIRECTION
430 .port_get_direction = gpio_nrfx_port_get_direction,
431 #endif
432 };
433
434 #define GPIOTE_PHANDLE(id) DT_INST_PHANDLE(id, gpiote_instance)
435 #define GPIOTE_INST(id) DT_PROP(GPIOTE_PHANDLE(id), instance)
436
437 #define GPIOTE_INSTANCE(id) \
438 COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
439 (NRFX_GPIOTE_INSTANCE(GPIOTE_INST(id))), \
440 ({ .p_reg = NULL }))
441
442 /* Device instantiation is done with node labels because 'port_num' is
443 * the peripheral number by SoC numbering. We therefore cannot use
444 * DT_INST APIs here without wider changes.
445 */
446
447 #define GPIOTE_CHECK(id) \
448 COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \
449 (BUILD_ASSERT(DT_NODE_HAS_STATUS(GPIOTE_PHANDLE(id), okay), \
450 "Please enable GPIOTE instance for used GPIO port!")), \
451 ())
452
453 #define GPIO_NRF_DEVICE(id) \
454 GPIOTE_CHECK(id); \
455 static const struct gpio_nrfx_cfg gpio_nrfx_p##id##_cfg = { \
456 .common = { \
457 .port_pin_mask = \
458 GPIO_PORT_PIN_MASK_FROM_DT_INST(id), \
459 }, \
460 .port = _CONCAT(NRF_P, DT_INST_PROP(id, port)), \
461 .port_num = DT_INST_PROP(id, port), \
462 .edge_sense = DT_INST_PROP_OR(id, sense_edge_mask, 0), \
463 .gpiote = GPIOTE_INSTANCE(id), \
464 }; \
465 \
466 static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \
467 \
468 DEVICE_DT_INST_DEFINE(id, gpio_nrfx_init, \
469 NULL, \
470 &gpio_nrfx_p##id##_data, \
471 &gpio_nrfx_p##id##_cfg, \
472 PRE_KERNEL_1, \
473 CONFIG_GPIO_INIT_PRIORITY, \
474 &gpio_nrfx_drv_api_funcs);
475
476 DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_DEVICE)
477
