1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_TPM_H_
9 #define _FSL_TPM_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup tpm
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*@{*/
24 #define FSL_TPM_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2 */
25 /*@}*/
26
27 /*!
28 * @brief List of TPM channels.
29 * @note Actual number of available channels is SoC dependent
30 */
31 typedef enum _tpm_chnl
32 {
33 kTPM_Chnl_0 = 0U, /*!< TPM channel number 0*/
34 kTPM_Chnl_1, /*!< TPM channel number 1 */
35 kTPM_Chnl_2, /*!< TPM channel number 2 */
36 kTPM_Chnl_3, /*!< TPM channel number 3 */
37 kTPM_Chnl_4, /*!< TPM channel number 4 */
38 kTPM_Chnl_5, /*!< TPM channel number 5 */
39 kTPM_Chnl_6, /*!< TPM channel number 6 */
40 kTPM_Chnl_7 /*!< TPM channel number 7 */
41 } tpm_chnl_t;
42
43 /*! @brief TPM PWM operation modes */
44 typedef enum _tpm_pwm_mode
45 {
46 kTPM_EdgeAlignedPwm = 0U, /*!< Edge aligned PWM */
47 kTPM_CenterAlignedPwm, /*!< Center aligned PWM */
48 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
49 kTPM_CombinedPwm /*!< Combined PWM */
50 #endif
51 } tpm_pwm_mode_t;
52
53 /*! @brief TPM PWM output pulse mode: high-true, low-true or no output */
54 typedef enum _tpm_pwm_level_select
55 {
56 kTPM_NoPwmSignal = 0U, /*!< No PWM output on pin */
57 kTPM_LowTrue, /*!< Low true pulses */
58 kTPM_HighTrue /*!< High true pulses */
59 } tpm_pwm_level_select_t;
60
61 /*! @brief Options to configure a TPM channel's PWM signal */
62 typedef struct _tpm_chnl_pwm_signal_param
63 {
64 tpm_chnl_t chnlNumber; /*!< TPM channel to configure.
65 In combined mode (available in some SoC's, this represents the
66 channel pair number */
67 tpm_pwm_level_select_t level; /*!< PWM output active level select */
68 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
69 0=inactive signal(0% duty cycle)...
70 100=always active signal (100% duty cycle)*/
71 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
72 uint8_t firstEdgeDelayPercent; /*!< Used only in combined PWM mode to generate asymmetrical PWM.
73 Specifies the delay to the first edge in a PWM period.
74 If unsure, leave as 0; Should be specified as
75 percentage of the PWM period */
76 #endif
77 } tpm_chnl_pwm_signal_param_t;
78
79 /*!
80 * @brief Trigger options available.
81 *
82 * This is used for both internal & external trigger sources (external option available in certain SoC's)
83 *
84 * @note The actual trigger options available is SoC-specific.
85 */
86 typedef enum _tpm_trigger_select
87 {
88 kTPM_Trigger_Select_0 = 0U,
89 kTPM_Trigger_Select_1,
90 kTPM_Trigger_Select_2,
91 kTPM_Trigger_Select_3,
92 kTPM_Trigger_Select_4,
93 kTPM_Trigger_Select_5,
94 kTPM_Trigger_Select_6,
95 kTPM_Trigger_Select_7,
96 kTPM_Trigger_Select_8,
97 kTPM_Trigger_Select_9,
98 kTPM_Trigger_Select_10,
99 kTPM_Trigger_Select_11,
100 kTPM_Trigger_Select_12,
101 kTPM_Trigger_Select_13,
102 kTPM_Trigger_Select_14,
103 kTPM_Trigger_Select_15
104 } tpm_trigger_select_t;
105
106 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
107 /*!
108 * @brief Trigger source options available
109 *
110 * @note This selection is available only on some SoC's. For SoC's without this selection, the only
111 * trigger source available is internal triger.
112 */
113 typedef enum _tpm_trigger_source
114 {
115 kTPM_TriggerSource_External = 0U, /*!< Use external trigger input */
116 kTPM_TriggerSource_Internal /*!< Use internal trigger */
117 } tpm_trigger_source_t;
118 #endif
119
120 /*! @brief TPM output compare modes */
121 typedef enum _tpm_output_compare_mode
122 {
123 kTPM_NoOutputSignal = (1U << TPM_CnSC_MSA_SHIFT), /*!< No channel output when counter reaches CnV */
124 kTPM_ToggleOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Toggle output */
125 kTPM_ClearOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)), /*!< Clear output */
126 kTPM_SetOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (3U << TPM_CnSC_ELSA_SHIFT)), /*!< Set output */
127 kTPM_HighPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Pulse output high */
128 kTPM_LowPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)) /*!< Pulse output low */
129 } tpm_output_compare_mode_t;
130
131 /*! @brief TPM input capture edge */
132 typedef enum _tpm_input_capture_edge
133 {
134 kTPM_RisingEdge = (1U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on rising edge only */
135 kTPM_FallingEdge = (2U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on falling edge only */
136 kTPM_RiseAndFallEdge = (3U << TPM_CnSC_ELSA_SHIFT) /*!< Capture on rising or falling edge */
137 } tpm_input_capture_edge_t;
138
139 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
140 /*!
141 * @brief TPM dual edge capture parameters
142 *
143 * @note This mode is available only on some SoC's.
144 */
145 typedef struct _tpm_dual_edge_capture_param
146 {
147 bool enableSwap; /*!< true: Use channel n+1 input, channel n input is ignored;
148 false: Use channel n input, channel n+1 input is ignored */
149 tpm_input_capture_edge_t currChanEdgeMode; /*!< Input capture edge select for channel n */
150 tpm_input_capture_edge_t nextChanEdgeMode; /*!< Input capture edge select for channel n+1 */
151 } tpm_dual_edge_capture_param_t;
152 #endif
153
154 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
155 /*!
156 * @brief TPM quadrature decode modes
157 *
158 * @note This mode is available only on some SoC's.
159 */
160 typedef enum _tpm_quad_decode_mode
161 {
162 kTPM_QuadPhaseEncode = 0U, /*!< Phase A and Phase B encoding mode */
163 kTPM_QuadCountAndDir /*!< Count and direction encoding mode */
164 } tpm_quad_decode_mode_t;
165
166 /*! @brief TPM quadrature phase polarities */
167 typedef enum _tpm_phase_polarity
168 {
169 kTPM_QuadPhaseNormal = 0U, /*!< Phase input signal is not inverted */
170 kTPM_QuadPhaseInvert /*!< Phase input signal is inverted */
171 } tpm_phase_polarity_t;
172
173 /*! @brief TPM quadrature decode phase parameters */
174 typedef struct _tpm_phase_param
175 {
176 uint32_t phaseFilterVal; /*!< Filter value, filter is disabled when the value is zero */
177 tpm_phase_polarity_t phasePolarity; /*!< Phase polarity */
178 } tpm_phase_params_t;
179 #endif
180
181 /*! @brief TPM clock source selection*/
182 typedef enum _tpm_clock_source
183 {
184 kTPM_SystemClock = 1U, /*!< System clock */
185 kTPM_ExternalClock /*!< External clock */
186 } tpm_clock_source_t;
187
188 /*! @brief TPM prescale value selection for the clock source*/
189 typedef enum _tpm_clock_prescale
190 {
191 kTPM_Prescale_Divide_1 = 0U, /*!< Divide by 1 */
192 kTPM_Prescale_Divide_2, /*!< Divide by 2 */
193 kTPM_Prescale_Divide_4, /*!< Divide by 4 */
194 kTPM_Prescale_Divide_8, /*!< Divide by 8 */
195 kTPM_Prescale_Divide_16, /*!< Divide by 16 */
196 kTPM_Prescale_Divide_32, /*!< Divide by 32 */
197 kTPM_Prescale_Divide_64, /*!< Divide by 64 */
198 kTPM_Prescale_Divide_128 /*!< Divide by 128 */
199 } tpm_clock_prescale_t;
200
201 /*!
202 * @brief TPM config structure
203 *
204 * This structure holds the configuration settings for the TPM peripheral. To initialize this
205 * structure to reasonable defaults, call the TPM_GetDefaultConfig() function and pass a
206 * pointer to your config structure instance.
207 *
208 * The config struct can be made const so it resides in flash
209 */
210 typedef struct _tpm_config
211 {
212 tpm_clock_prescale_t prescale; /*!< Select TPM clock prescale value */
213 bool useGlobalTimeBase; /*!< true: Use of an external global time base is enabled;
214 false: disabled */
215 tpm_trigger_select_t triggerSelect; /*!< Input trigger to use for controlling the counter operation */
216 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
217 tpm_trigger_source_t triggerSource; /*!< Decides if we use external or internal trigger. */
218 #endif
219 bool enableDoze; /*!< true: TPM counter is paused in doze mode;
220 false: TPM counter continues in doze mode */
221 bool enableDebugMode; /*!< true: TPM counter continues in debug mode;
222 false: TPM counter is paused in debug mode */
223 bool enableReloadOnTrigger; /*!< true: TPM counter is reloaded on trigger;
224 false: TPM counter not reloaded */
225 bool enableStopOnOverflow; /*!< true: TPM counter stops after overflow;
226 false: TPM counter continues running after overflow */
227 bool enableStartOnTrigger; /*!< true: TPM counter only starts when a trigger is detected;
228 false: TPM counter starts immediately */
229 #if defined(FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER) && FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
230 bool enablePauseOnTrigger; /*!< true: TPM counter will pause while trigger remains asserted;
231 false: TPM counter continues running */
232 #endif
233 } tpm_config_t;
234
235 /*! @brief List of TPM interrupts */
236 typedef enum _tpm_interrupt_enable
237 {
238 kTPM_Chnl0InterruptEnable = (1U << 0), /*!< Channel 0 interrupt.*/
239 kTPM_Chnl1InterruptEnable = (1U << 1), /*!< Channel 1 interrupt.*/
240 kTPM_Chnl2InterruptEnable = (1U << 2), /*!< Channel 2 interrupt.*/
241 kTPM_Chnl3InterruptEnable = (1U << 3), /*!< Channel 3 interrupt.*/
242 kTPM_Chnl4InterruptEnable = (1U << 4), /*!< Channel 4 interrupt.*/
243 kTPM_Chnl5InterruptEnable = (1U << 5), /*!< Channel 5 interrupt.*/
244 kTPM_Chnl6InterruptEnable = (1U << 6), /*!< Channel 6 interrupt.*/
245 kTPM_Chnl7InterruptEnable = (1U << 7), /*!< Channel 7 interrupt.*/
246 kTPM_TimeOverflowInterruptEnable = (1U << 8) /*!< Time overflow interrupt.*/
247 } tpm_interrupt_enable_t;
248
249 /*! @brief List of TPM flags */
250 typedef enum _tpm_status_flags
251 {
252 kTPM_Chnl0Flag = (1U << 0), /*!< Channel 0 flag */
253 kTPM_Chnl1Flag = (1U << 1), /*!< Channel 1 flag */
254 kTPM_Chnl2Flag = (1U << 2), /*!< Channel 2 flag */
255 kTPM_Chnl3Flag = (1U << 3), /*!< Channel 3 flag */
256 kTPM_Chnl4Flag = (1U << 4), /*!< Channel 4 flag */
257 kTPM_Chnl5Flag = (1U << 5), /*!< Channel 5 flag */
258 kTPM_Chnl6Flag = (1U << 6), /*!< Channel 6 flag */
259 kTPM_Chnl7Flag = (1U << 7), /*!< Channel 7 flag */
260 kTPM_TimeOverflowFlag = (1U << 8) /*!< Time overflow flag */
261 } tpm_status_flags_t;
262
263 /*******************************************************************************
264 * API
265 ******************************************************************************/
266
267 #if defined(__cplusplus)
268 extern "C" {
269 #endif
270
271 /*!
272 * @name Initialization and deinitialization
273 * @{
274 */
275
276 /*!
277 * @brief Ungates the TPM clock and configures the peripheral for basic operation.
278 *
279 * @note This API should be called at the beginning of the application using the TPM driver.
280 *
281 * @param base TPM peripheral base address
282 * @param config Pointer to user's TPM config structure.
283 */
284 void TPM_Init(TPM_Type *base, const tpm_config_t *config);
285
286 /*!
287 * @brief Stops the counter and gates the TPM clock
288 *
289 * @param base TPM peripheral base address
290 */
291 void TPM_Deinit(TPM_Type *base);
292
293 /*!
294 * @brief Fill in the TPM config struct with the default settings
295 *
296 * The default values are:
297 * @code
298 * config->prescale = kTPM_Prescale_Divide_1;
299 * config->useGlobalTimeBase = false;
300 * config->dozeEnable = false;
301 * config->dbgMode = false;
302 * config->enableReloadOnTrigger = false;
303 * config->enableStopOnOverflow = false;
304 * config->enableStartOnTrigger = false;
305 *#if FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
306 * config->enablePauseOnTrigger = false;
307 *#endif
308 * config->triggerSelect = kTPM_Trigger_Select_0;
309 *#if FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
310 * config->triggerSource = kTPM_TriggerSource_External;
311 *#endif
312 * @endcode
313 * @param config Pointer to user's TPM config structure.
314 */
315 void TPM_GetDefaultConfig(tpm_config_t *config);
316
317 /*! @}*/
318
319 /*!
320 * @name Channel mode operations
321 * @{
322 */
323
324 /*!
325 * @brief Configures the PWM signal parameters
326 *
327 * User calls this function to configure the PWM signals period, mode, dutycycle and edge. Use this
328 * function to configure all the TPM channels that will be used to output a PWM signal
329 *
330 * @param base TPM peripheral base address
331 * @param chnlParams Array of PWM channel parameters to configure the channel(s)
332 * @param numOfChnls Number of channels to configure, this should be the size of the array passed in
333 * @param mode PWM operation mode, options available in enumeration ::tpm_pwm_mode_t
334 * @param pwmFreq_Hz PWM signal frequency in Hz
335 * @param srcClock_Hz TPM counter clock in Hz
336 *
337 * @return kStatus_Success if the PWM setup was successful,
338 * kStatus_Error on failure
339 */
340 status_t TPM_SetupPwm(TPM_Type *base,
341 const tpm_chnl_pwm_signal_param_t *chnlParams,
342 uint8_t numOfChnls,
343 tpm_pwm_mode_t mode,
344 uint32_t pwmFreq_Hz,
345 uint32_t srcClock_Hz);
346
347 /*!
348 * @brief Update the duty cycle of an active PWM signal
349 *
350 * @param base TPM peripheral base address
351 * @param chnlNumber The channel number. In combined mode, this represents
352 * the channel pair number
353 * @param currentPwmMode The current PWM mode set during PWM setup
354 * @param dutyCyclePercent New PWM pulse width, value should be between 0 to 100
355 * 0=inactive signal(0% duty cycle)...
356 * 100=active signal (100% duty cycle)
357 */
358 void TPM_UpdatePwmDutycycle(TPM_Type *base,
359 tpm_chnl_t chnlNumber,
360 tpm_pwm_mode_t currentPwmMode,
361 uint8_t dutyCyclePercent);
362
363 /*!
364 * @brief Update the edge level selection for a channel
365 *
366 * @param base TPM peripheral base address
367 * @param chnlNumber The channel number
368 * @param level The level to be set to the ELSnB:ELSnA field; valid values are 00, 01, 10, 11.
369 * See the appropriate SoC reference manual for details about this field.
370 */
371 void TPM_UpdateChnlEdgeLevelSelect(TPM_Type *base, tpm_chnl_t chnlNumber, uint8_t level);
372
373 /*!
374 * @brief Enables capturing an input signal on the channel using the function parameters.
375 *
376 * When the edge specified in the captureMode argument occurs on the channel, the TPM counter is captured into
377 * the CnV register. The user has to read the CnV register separately to get this value.
378 *
379 * @param base TPM peripheral base address
380 * @param chnlNumber The channel number
381 * @param captureMode Specifies which edge to capture
382 */
383 void TPM_SetupInputCapture(TPM_Type *base, tpm_chnl_t chnlNumber, tpm_input_capture_edge_t captureMode);
384
385 /*!
386 * @brief Configures the TPM to generate timed pulses.
387 *
388 * When the TPM counter matches the value of compareVal argument (this is written into CnV reg), the channel
389 * output is changed based on what is specified in the compareMode argument.
390 *
391 * @param base TPM peripheral base address
392 * @param chnlNumber The channel number
393 * @param compareMode Action to take on the channel output when the compare condition is met
394 * @param compareValue Value to be programmed in the CnV register.
395 */
396 void TPM_SetupOutputCompare(TPM_Type *base,
397 tpm_chnl_t chnlNumber,
398 tpm_output_compare_mode_t compareMode,
399 uint32_t compareValue);
400
401 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
402 /*!
403 * @brief Configures the dual edge capture mode of the TPM.
404 *
405 * This function allows to measure a pulse width of the signal on the input of channel of a
406 * channel pair. The filter function is disabled if the filterVal argument passed is zero.
407 *
408 * @param base TPM peripheral base address
409 * @param chnlPairNumber The TPM channel pair number; options are 0, 1, 2, 3
410 * @param edgeParam Sets up the dual edge capture function
411 * @param filterValue Filter value, specify 0 to disable filter.
412 */
413 void TPM_SetupDualEdgeCapture(TPM_Type *base,
414 tpm_chnl_t chnlPairNumber,
415 const tpm_dual_edge_capture_param_t *edgeParam,
416 uint32_t filterValue);
417 #endif
418
419 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
420 /*!
421 * @brief Configures the parameters and activates the quadrature decode mode.
422 *
423 * @param base TPM peripheral base address
424 * @param phaseAParams Phase A configuration parameters
425 * @param phaseBParams Phase B configuration parameters
426 * @param quadMode Selects encoding mode used in quadrature decoder mode
427 */
428 void TPM_SetupQuadDecode(TPM_Type *base,
429 const tpm_phase_params_t *phaseAParams,
430 const tpm_phase_params_t *phaseBParams,
431 tpm_quad_decode_mode_t quadMode);
432 #endif
433
434 /*! @}*/
435
436 /*!
437 * @name Interrupt Interface
438 * @{
439 */
440
441 /*!
442 * @brief Enables the selected TPM interrupts.
443 *
444 * @param base TPM peripheral base address
445 * @param mask The interrupts to enable. This is a logical OR of members of the
446 * enumeration ::tpm_interrupt_enable_t
447 */
448 void TPM_EnableInterrupts(TPM_Type *base, uint32_t mask);
449
450 /*!
451 * @brief Disables the selected TPM interrupts.
452 *
453 * @param base TPM peripheral base address
454 * @param mask The interrupts to disable. This is a logical OR of members of the
455 * enumeration ::tpm_interrupt_enable_t
456 */
457 void TPM_DisableInterrupts(TPM_Type *base, uint32_t mask);
458
459 /*!
460 * @brief Gets the enabled TPM interrupts.
461 *
462 * @param base TPM peripheral base address
463 *
464 * @return The enabled interrupts. This is the logical OR of members of the
465 * enumeration ::tpm_interrupt_enable_t
466 */
467 uint32_t TPM_GetEnabledInterrupts(TPM_Type *base);
468
469 /*! @}*/
470
471 /*!
472 * @name Status Interface
473 * @{
474 */
475
476 /*!
477 * @brief Gets the TPM status flags
478 *
479 * @param base TPM peripheral base address
480 *
481 * @return The status flags. This is the logical OR of members of the
482 * enumeration ::tpm_status_flags_t
483 */
TPM_GetStatusFlags(TPM_Type * base)484 static inline uint32_t TPM_GetStatusFlags(TPM_Type *base)
485 {
486 return base->STATUS;
487 }
488
489 /*!
490 * @brief Clears the TPM status flags
491 *
492 * @param base TPM peripheral base address
493 * @param mask The status flags to clear. This is a logical OR of members of the
494 * enumeration ::tpm_status_flags_t
495 */
TPM_ClearStatusFlags(TPM_Type * base,uint32_t mask)496 static inline void TPM_ClearStatusFlags(TPM_Type *base, uint32_t mask)
497 {
498 /* Clear the status flags */
499 base->STATUS = mask;
500 }
501
502 /*! @}*/
503
504 /*!
505 * @name Read and write the timer period
506 * @{
507 */
508
509 /*!
510 * @brief Sets the timer period in units of ticks.
511 *
512 * Timers counts from 0 until it equals the count value set here. The count value is written to
513 * the MOD register.
514 *
515 * @note
516 * 1. This API allows the user to use the TPM module as a timer. Do not mix usage
517 * of this API with TPM's PWM setup API's.
518 * 2. Call the utility macros provided in the fsl_common.h to convert usec or msec to ticks.
519 *
520 * @param base TPM peripheral base address
521 * @param ticks A timer period in units of ticks, which should be equal or greater than 1.
522 */
TPM_SetTimerPeriod(TPM_Type * base,uint32_t ticks)523 static inline void TPM_SetTimerPeriod(TPM_Type *base, uint32_t ticks)
524 {
525 base->MOD = ticks;
526 }
527
528 /*!
529 * @brief Reads the current timer counting value.
530 *
531 * This function returns the real-time timer counting value in a range from 0 to a
532 * timer period.
533 *
534 * @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.
535 *
536 * @param base TPM peripheral base address
537 *
538 * @return The current counter value in ticks
539 */
TPM_GetCurrentTimerCount(TPM_Type * base)540 static inline uint32_t TPM_GetCurrentTimerCount(TPM_Type *base)
541 {
542 return (uint32_t)((base->CNT & TPM_CNT_COUNT_MASK) >> TPM_CNT_COUNT_SHIFT);
543 }
544
545 /*!
546 * @name Timer Start and Stop
547 * @{
548 */
549
550 /*!
551 * @brief Starts the TPM counter.
552 *
553 *
554 * @param base TPM peripheral base address
555 * @param clockSource TPM clock source; once clock source is set the counter will start running
556 */
TPM_StartTimer(TPM_Type * base,tpm_clock_source_t clockSource)557 static inline void TPM_StartTimer(TPM_Type *base, tpm_clock_source_t clockSource)
558 {
559 uint32_t reg = base->SC;
560
561 reg &= ~(TPM_SC_CMOD_MASK);
562 reg |= TPM_SC_CMOD(clockSource);
563 base->SC = reg;
564 }
565
566 /*!
567 * @brief Stops the TPM counter.
568 *
569 * @param base TPM peripheral base address
570 */
TPM_StopTimer(TPM_Type * base)571 static inline void TPM_StopTimer(TPM_Type *base)
572 {
573 /* Set clock source to none to disable counter */
574 base->SC &= ~(TPM_SC_CMOD_MASK);
575
576 /* Wait till this reads as zero acknowledging the counter is disabled */
577 while (base->SC & TPM_SC_CMOD_MASK)
578 {
579 }
580 }
581
582 /*! @}*/
583
584 #if defined(FSL_FEATURE_TPM_HAS_GLOBAL) && FSL_FEATURE_TPM_HAS_GLOBAL
585 /*!
586 * @brief Performs a software reset on the TPM module.
587 *
588 * Reset all internal logic and registers, except the Global Register. Remains set until cleared by software..
589 *
590 * @note TPM software reset is available on certain SoC's only
591 *
592 * @param base TPM peripheral base address
593 */
TPM_Reset(TPM_Type * base)594 static inline void TPM_Reset(TPM_Type *base)
595 {
596 base->GLOBAL |= TPM_GLOBAL_RST_MASK;
597 base->GLOBAL &= ~TPM_GLOBAL_RST_MASK;
598 }
599 #endif
600
601 #if defined(__cplusplus)
602 }
603 #endif
604
605 /*! @}*/
606
607 #endif /* _FSL_TPM_H_ */
608
