1 /*
2  * Copyright 2021-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /**
8 *   @file CanEXCEL_Ip_HwAccess.c
9 *
10 *   @addtogroup CanEXCEL
11 *   @{
12 */
13 
14 #include "CanEXCEL_Ip_HwAccess.h"
15 #include "SchM_Can_43_CANEXCEL.h"
16 
17 /*==================================================================================================
18 *                              SOURCE FILE VERSION INFORMATION
19 ==================================================================================================*/
20 #define CANEXCEL_IP_HWACCESS_VENDOR_ID_C                      43
21 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C       4
22 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C       7
23 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_C    0
24 #define CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_C               1
25 #define CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_C               0
26 #define CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_C               0
27 /*==================================================================================================
28 *                                     FILE VERSION CHECKS
29 ==================================================================================================*/
30 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same vendor */
31 #if (CANEXCEL_IP_HWACCESS_VENDOR_ID_C != CANEXCEL_IP_HWACCESS_VENDOR_ID_H)
32     #error "CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h have different vendor ids"
33 #endif
34 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same Autosar version */
35 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C    != CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H) || \
36      (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C    != CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H) || \
37      (CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_C != CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H) \
38     )
39     #error "AutoSar Version Numbers of CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h are different"
40 #endif
41 /* Check if current file and CanEXCEL_Ip_HwAccess.h are of the same Software version */
42 #if ((CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_C != CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_H) || \
43      (CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_C != CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_H) || \
44      (CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_C != CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_H) \
45     )
46     #error "Software Version Numbers of CanEXCEL_Ip_HwAccess.c and CanEXCEL_Ip_HwAccess.h are different"
47 #endif
48 
49 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
50     /* Check if current file and SchM_Can_43_CANEXCEL.h header file are of the same version */
51     #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_C    !=  SCHM_CAN_43_CANEXCEL_AR_RELEASE_MAJOR_VERSION) || \
52         (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_C     !=  SCHM_CAN_43_CANEXCEL_AR_RELEASE_MINOR_VERSION) \
53         )
54         #error "AUTOSAR Version Numbers of CanEXCEL_Ip_HwAccess.c and SchM_Can_43_CANEXCEL.h are different"
55     #endif
56 #endif
57 
58 /*==================================================================================================
59 *                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
60 ==================================================================================================*/
61 
62 /*==================================================================================================
63 *                                       LOCAL MACROS
64 ==================================================================================================*/
65 /* CAN FD extended data length DLC encoding */
66 #define CANXL_IP_DLC_VALUE_12_BYTES              9U
67 #define CANXL_IP_DLC_VALUE_16_BYTES              10U
68 #define CANXL_IP_DLC_VALUE_20_BYTES              11U
69 #define CANXL_IP_DLC_VALUE_24_BYTES              12U
70 #define CANXL_IP_DLC_VALUE_32_BYTES              13U
71 #define CANXL_IP_DLC_VALUE_48_BYTES              14U
72 #define CANXL_IP_DLC_VALUE_64_BYTES              15U
73 
74 /*==================================================================================================
75 *                                      GLOBAL VARIABLES
76 ==================================================================================================*/
77 
78 /*FUNCTION**********************************************************************
79  *
80  * Function Name : CanXL_SetMDQueueConfigs
81  * Description   : Sets the Message Descriptors Queue Depth and Watermark Level
82  *
83  *END**************************************************************************/
CanXL_SetMDQueueConfigs(CANXL_GRP_CONTROL_Type * base,const Canexcel_Ip_QueueConf * pConfigs)84 void CanXL_SetMDQueueConfigs(CANXL_GRP_CONTROL_Type * base, const Canexcel_Ip_QueueConf * pConfigs)
85 {
86     uint8 i,j=0U;
87     for(i=0U;i < CANXL_GRP_CONTROL_FIFOCTRLREQ_COUNT; i++)
88     {
89         base->FIFOCTRL[i] = CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1(pConfigs[j].mdQueueDepth) | CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2(pConfigs[j+1u].mdQueueDepth) |
90                             CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1(pConfigs[j].mdQueueWatermark) | CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2(pConfigs[j+1u].mdQueueWatermark);
91         j=j+2u;
92     }
93 }
94 /*FUNCTION**********************************************************************
95  *
96  * Function Name : CanXL_GetMDQueueDepth
97  * Description   : Get the Message Descriptor Queue Depth
98  *
99  *END**************************************************************************/
CanXL_GetMDQueueDepth(const CANXL_GRP_CONTROL_Type * base,const uint8 MDindex)100 uint8 CanXL_GetMDQueueDepth(const CANXL_GRP_CONTROL_Type * base,const uint8 MDindex)
101 {
102     uint8 retValue = 0;
103     /* Devide MDIndex to 32U in order to determine the group of the register */
104     if(((MDindex>>4U)%2U) == 0U)
105     {
106         retValue = (uint8)(base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_MASK);
107     }
108     else
109     {
110         retValue = (uint8)((base->FIFOCTRL[MDindex>>5U]&CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_MASK)>>CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_SHIFT);
111     }
112     return retValue;
113 }
114 /*FUNCTION**********************************************************************
115  *
116  * Function Name : CanXL_SetErrIntCmd
117  * Description   : Enable the error interrupts.
118  * This function will enable Error interrupt.
119  *
120  *END**************************************************************************/
CanXL_SetErrIntCmd(CANXL_SIC_Type * base,canxl_int_type_t errType,boolean enable)121 void CanXL_SetErrIntCmd(CANXL_SIC_Type * base, canxl_int_type_t errType, boolean enable)
122 {
123     uint32 temp = (uint32)errType;
124     SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_06();
125     if (enable)
126     {
127         base->SYSIE |= temp;
128     }
129     else
130     {
131         base->SYSIE &= (~temp);
132     }
133     SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_06();
134 }
135 /*FUNCTION**********************************************************************
136  *
137  * Function Name: CAN_ComputeDLCValue
138  * Description  : Computes the DLC field value, given a payload size (in bytes).
139  * This is compatible only for Classical CAN Format (FDF=0) and CAN FD Format (FDF=1
140  * and XLF=0), for CAN XL Format (FDF=1 and XLF=1) is size is DLC+1 value
141  *END**************************************************************************/
CAN_ComputeDLCValue(uint8 payloadSize)142 uint8 CAN_ComputeDLCValue(uint8 payloadSize)
143 {
144     uint32 ret = 0xFFU;                   /* 0,  1,  2,  3,  4,  5,  6,  7,  8, */
145     static const uint8 payload_code[65] = {0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
146                                            /* 9 to 12 payload have DLC Code 12 Bytes */
147                                            CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES, CANXL_IP_DLC_VALUE_12_BYTES,
148                                            /* 13 to 16 payload have DLC Code 16 Bytes */
149                                            CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES, CANXL_IP_DLC_VALUE_16_BYTES,
150                                            /* 17 to 20 payload have DLC Code 20 Bytes */
151                                            CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES, CANXL_IP_DLC_VALUE_20_BYTES,
152                                            /* 21 to 24 payload have DLC Code 24 Bytes */
153                                            CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES, CANXL_IP_DLC_VALUE_24_BYTES,
154                                            /* 25 to 32 payload have DLC Code 32 Bytes */
155                                            CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES,
156                                            CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES, CANXL_IP_DLC_VALUE_32_BYTES,
157                                            /* 33 to 48 payload have DLC Code 48 Bytes */
158                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
159                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
160                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
161                                            CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES, CANXL_IP_DLC_VALUE_48_BYTES,
162                                            /* 49 to 64 payload have DLC Code 64 Bytes */
163                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
164                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
165                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES,
166                                            CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES, CANXL_IP_DLC_VALUE_64_BYTES
167                                           };
168 
169     if (payloadSize <= 64U)
170     {
171         ret = payload_code[payloadSize];
172     }
173     else
174     {
175         /* The argument is not a valid payload size will return 0xFF*/
176     }
177     return (uint8)ret;
178 }
179 /*FUNCTION**********************************************************************
180  *
181  * Function Name: CAN_ComputePayloadSizeHw
182  * Description  : Computes the a payload size (in bytes), given a DLC field value.
183  * This is used for Classical and FD Frame types.
184  *END**************************************************************************/
CAN_ComputePayloadSizeHw(uint8 dlcValue)185 static uint8 CAN_ComputePayloadSizeHw(uint8 dlcValue)
186 {
187     uint8 ret = 8U;
188 
189     if (dlcValue <= 8U)
190     {
191         ret = dlcValue;
192     }
193     else
194     {
195         switch (dlcValue)
196         {
197             case CANXL_IP_DLC_VALUE_12_BYTES:
198                 ret = 12U;
199                 break;
200             case CANXL_IP_DLC_VALUE_16_BYTES:
201                 ret = 16U;
202                 break;
203             case CANXL_IP_DLC_VALUE_20_BYTES:
204                 ret = 20U;
205                 break;
206             case CANXL_IP_DLC_VALUE_24_BYTES:
207                 ret = 24U;
208                 break;
209             case CANXL_IP_DLC_VALUE_32_BYTES:
210                 ret = 32U;
211                 break;
212             case CANXL_IP_DLC_VALUE_48_BYTES:
213                 ret = 48U;
214                 break;
215             case CANXL_IP_DLC_VALUE_64_BYTES:
216                 ret = 64U;
217                 break;
218             default:
219                 /* The argument is not a valid DLC size */
220                 break;
221         }
222     }
223     return ret;
224 }
225 /*FUNCTION**********************************************************************
226  *
227  * Function Name : CanXL_SoftReset
228  * Description   : Execute a SoftReset of the CANEXCEL Hw
229  *
230  *END**************************************************************************/
CanXL_SoftReset(CANXL_SIC_Type * base)231 Canexcel_Ip_StatusType CanXL_SoftReset(CANXL_SIC_Type * base)
232 {
233     uint32 timeStart = 0U;
234     uint32 timeElapsed = 0U;
235     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
236     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
237     base->SYSMC = CANXL_SIC_SYSMC_SOFRST_MASK;
238     while ((base->SYSMC & CANXL_SIC_SYSMC_SOFRST_MASK) == CANXL_SIC_SYSMC_SOFRST_MASK)
239     {
240         timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
241         if (timeElapsed >= uS2Ticks)
242         {
243             returnResult = CANEXCEL_STATUS_TIMEOUT;
244             break;
245         }
246     }
247     return returnResult;
248 }
249 
250 /*FUNCTION**********************************************************************
251  *
252  * Function Name : CanXL_ClearRAM
253  * Description   : Clears CANEXCEL memory positions that require initialization.
254  *
255  *END**************************************************************************/
CanXL_ClearRAM(const CANEXCEL_StructType * CANXL,uint8 instance)256 void CanXL_ClearRAM(const CANEXCEL_StructType * CANXL, uint8 instance)
257 {
258    uint16 idx;
259    CANXL_MSG_DESCRIPTORS_Type * base_Msg_Desc = CANXL->EXL_MSGD[instance];
260    for(idx=0u; idx < CANXL_MSG_DESCRIPTORS_MSGDSC_COUNT; idx++)
261    {
262        base_Msg_Desc->MSGDSC[idx].CTRL.RXCTRL = 0U;
263        base_Msg_Desc->MSGDSC[idx].CFG1.MDFLT1FD = 0U;
264        base_Msg_Desc->MSGDSC[idx].CFG2.MDFLT2FD = 0U;
265        base_Msg_Desc->MSGDSC[idx].LSTPNT.RXLSTPTR = 0U;
266        for(uint8 i=0;i<16u;i++)
267        {
268            /* Initialize the msg descriptor reserved space */
269            base_Msg_Desc->MSGDSC[idx].RESERVED_0[i] = 0U;
270        }
271    }
272    /* Clear the filter bank check the size in device reg as CANXL_IP_FILTER_BANK_SIZE */
273    volatile uint32 * ptr = &CANXL->EXL_FILTER[instance]->AFCFG0;
274    for(idx = 0u; idx <= (uint16)(CANXL_IP_FILTER_BANK_SIZE/4U); idx++ )
275    {
276        ptr[idx] = 0U;
277    }
278    /* Clear and initilize RXFIFO memory */
279    CANXL_RXFIFO_Type * base_RxFifo = CANXL->EXL_RXFIFO[instance];
280    base_RxFifo->RXFFCTR = 0U;
281    for(idx = 0u; idx < CANXL_RXFIFO_RXFFPOINTERAR_COUNT; idx++)
282    {
283        base_RxFifo->RXFMBP[idx] = 0U;
284    }
285    base_RxFifo->SECAM = 0U;
286    base_RxFifo->SECAV = 0U;
287    base_RxFifo->AFCFG = 0U;
288    base_RxFifo->VAMRCFG = 0U;
289    base_RxFifo->SAMRCFG = 0U;
290    base_RxFifo->AAMRCFG = 0U;
291    base_RxFifo->ACPTIDMR = 0U;
292    for(idx = 0u; idx < CANXL_RXFIFO_VCANACPTFLTAR_COUNT; idx++)
293    {
294        base_RxFifo->VAFLT[idx] = 0U;
295    }
296    for(idx = 0u; idx < CANXL_RXFIFO_SDUACPTFLTAR_COUNT; idx++)
297    {
298        base_RxFifo->SAFLT[idx] = 0U;
299    }
300    for(idx = 0u; idx < CANXL_RXFIFO_ADDRACPTFLTAR_COUNT; idx++)
301    {
302        base_RxFifo->ADDRACPTFLTAR[idx].AAFLTL = 0U;
303        base_RxFifo->ADDRACPTFLTAR[idx].AAFLTH = 0U;
304    }
305    for(idx = 0u; idx < CANXL_RXFIFO_IDACPTFLTAR_COUNT; idx++)
306    {
307        base_RxFifo->IDACPTFLTAR[idx].IDAFLTL = 0U;
308        base_RxFifo->IDACPTFLTAR[idx].IDAFLTH = 0U;
309    }
310 }
311 
312 /*FUNCTION**********************************************************************
313  *
314  * Function Name : CANXL_EnterFreezeMode
315  * Description   : Enter the freeze mode.
316  *
317  *END**************************************************************************/
CanXL_EnterFreezeMode(CANXL_SIC_Type * base)318 Canexcel_Ip_StatusType CanXL_EnterFreezeMode(CANXL_SIC_Type * base)
319 {
320     uint32 timeStart = 0U;
321     uint32 timeElapsed = 0U;
322     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
323     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
324     boolean lowPower =  FALSE;
325 
326     /* Start critical section: implementation depends on integrator */
327     if(((base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK) == CANXL_SIC_SYSS_FRZACKF_MASK) && ((base->SYSMC & CANXL_SIC_SYSMC_FRZREQ_MASK) == 0U))
328     {
329         if(((base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK) != 0U) && ((base->SYSMC & CANXL_SIC_SYSMC_LPMREQ_MASK) == CANXL_SIC_SYSMC_LPMREQ_MASK))
330         {
331             lowPower = TRUE;
332             /* Exit low Power Mode to allow Freeze Enter Mode */
333             base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
334             SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
335             base->SYSMC &= ~CANXL_SIC_SYSMC_LPMREQ_MASK;
336             SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
337             timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
338             while(0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
339             {
340                 timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
341                 if (timeElapsed >= uS2Ticks)
342                 {
343                     returnResult = CANEXCEL_STATUS_TIMEOUT;
344                     break;
345                 }
346             }
347         }
348         /* Request Freeze Enter Mode */
349         base->SYSS = CANXL_SIC_SYSS_FRZACKF_MASK;
350         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
351         base->SYSMC |= CANXL_SIC_SYSMC_FRZREQ_MASK;
352         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
353     }
354     if(CANEXCEL_STATUS_SUCCESS == returnResult)
355     {
356         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
357         while (0U == (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK))
358         {
359             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
360             if (timeElapsed >= uS2Ticks)
361             {
362                 returnResult = CANEXCEL_STATUS_TIMEOUT;
363                 break;
364             }
365         }
366     }
367 
368     if((CANEXCEL_STATUS_SUCCESS == returnResult) && (TRUE == lowPower))
369     {
370         base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
371         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
372         base->SYSMC |= CANXL_SIC_SYSMC_LPMREQ_MASK;
373         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_01();
374         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
375         while(0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
376         {
377             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
378             if (timeElapsed >= uS2Ticks)
379             {
380                 returnResult = CANEXCEL_STATUS_TIMEOUT;
381                 break;
382             }
383         }
384     }
385     return returnResult;
386 }
387 
388 /*FUNCTION**********************************************************************
389  *
390  * Function Name : CANXL_ExitFreezeMode
391  * Description   : Exit the freeze mode.
392  *
393  *END**************************************************************************/
CanXL_ExitFreezeMode(CANXL_SIC_Type * base)394 Canexcel_Ip_StatusType CanXL_ExitFreezeMode(CANXL_SIC_Type * base)
395 {
396     uint32 timeStart = 0U;
397     uint32 timeElapsed = 0U;
398     uint32 uS2Ticks = OsIf_MicrosToTicks(CANEXCEL_IP_TIMEOUT_DURATION, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
399     Canexcel_Ip_StatusType returnResult = CANEXCEL_STATUS_SUCCESS;
400     boolean lowPower =  FALSE;
401     if((base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK) != 0U)
402     {
403         if ((base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK) == CANXL_SIC_SYSS_LPMACKF_MASK)
404         {
405             lowPower = TRUE;
406             base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
407             /* Exit low Power Mode to allow Freeze Exit Mode */
408             SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
409             base->SYSMC &= ~CANXL_SIC_SYSMC_LPMREQ_MASK;
410             SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
411             timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
412             while(0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
413             {
414                 timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
415                 if (timeElapsed >= uS2Ticks)
416                 {
417                     returnResult = CANEXCEL_STATUS_TIMEOUT;
418                     break;
419                 }
420             }
421         }
422     }
423     if(CANEXCEL_STATUS_SUCCESS == returnResult)
424     {
425         base->SYSS = CANXL_SIC_SYSS_FRZACKF_MASK;
426         /* Request exit Freeze Mode */
427         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
428         base->SYSMC &= ~CANXL_SIC_SYSMC_FRZREQ_MASK;
429         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
430         timeStart = OsIf_GetCounter(CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
431         while (0U == (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK))
432         {
433             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
434             if (timeElapsed >= uS2Ticks)
435             {
436                 returnResult = CANEXCEL_STATUS_TIMEOUT;
437                 break;
438             }
439         }
440     }
441     if((CANEXCEL_STATUS_SUCCESS == returnResult) && (TRUE == lowPower))
442     {
443         base->SYSS = CANXL_SIC_SYSS_LPMACKF_MASK;
444         SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
445         base->SYSMC |= CANXL_SIC_SYSMC_LPMREQ_MASK;
446         SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_02();
447         while(0U == (base->SYSS & CANXL_SIC_SYSS_LPMACKF_MASK))
448         {
449             timeElapsed += OsIf_GetElapsed(&timeStart, CANEXCEL_IP_SERVICE_TIMEOUT_TYPE);
450             if (timeElapsed >= uS2Ticks)
451             {
452                 returnResult = CANEXCEL_STATUS_TIMEOUT;
453                 break;
454             }
455         }
456     }
457     return returnResult;
458 }
459 /*FUNCTION**********************************************************************
460  *
461  * Function Name : CanXL_GetDescControlStatus
462  * Description   : Returns the Contol Lock status for Message Descriptor
463  *END**************************************************************************/
CanXL_GetDescControlStatus(const CANXL_DSC_CONTROL_Type * base,uint8 descNo)464 Canexcel_Ip_DesCntStatus CanXL_GetDescControlStatus(const CANXL_DSC_CONTROL_Type * base, uint8 descNo)
465 {
466     Canexcel_Ip_DesCntStatus status = CANEXCEL_DESCNTSTATUS_INVALID;
467     switch((base->DSCMBCTRLAR[descNo].STA.DCSTA & (CANXL_DSC_CONTROL_DCSTA_HWLOCK_MASK | CANXL_DSC_CONTROL_DCSTA_SYSLOCK_MASK))>>CANXL_DSC_CONTROL_DCSTA_HWLOCK_SHIFT)
468     {
469         case 0U:
470             status = CANEXCEL_DESCNTSTATUS_UNLOCKED;
471             break;
472         case 1U:
473             status = CANEXCEL_DESCNTSTATUS_LOCKED_HW;
474             break;
475         case 2U:
476             status = CANEXCEL_DESCNTSTATUS_LOCKED_SYS;
477             break;
478         default:
479             status = CANEXCEL_DESCNTSTATUS_INVALID;
480             break;
481     }
482     return status;
483 }
484 
485 /*FUNCTION**********************************************************************
486  *
487  * Function Name : CanXL_SetOperationMode
488  * Description   : Enable a CanEXCEL operation mode.
489  * This function will enable one of the modes listed in Canexcel_Ip_ModesType.
490  *
491  *END**************************************************************************/
CanXL_SetOperationMode(CANXL_SIC_Type * base,Canexcel_Ip_ModesType mode)492 void CanXL_SetOperationMode(CANXL_SIC_Type * base, Canexcel_Ip_ModesType mode)
493 {
494     switch (mode)
495     {
496         case CANEXCEL_NORMAL_MODE:
497             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(0U);
498             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LPB_MASK) | CANXL_SIC_BCFG2_LPB(0U);
499             break;
500         case CANEXCEL_LISTEN_ONLY_MODE:
501             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(1U);;
502             break;
503         case CANEXCEL_LOOPBACK_MODE:
504             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LPB_MASK) | CANXL_SIC_BCFG2_LPB(1U);
505             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(0U);
506             base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_TMSE_MASK);
507             /* Enable Self Reception */
508             CanXL_SetSelfReception(base, TRUE);
509             break;
510         default:
511             /* Should not get here */
512             break;
513     }
514 }
515 /*FUNCTION**********************************************************************
516  *
517  * Function Name : CanXL_SetTxMsgBuffData
518  * Description   : Copy the data in the Tx Message Buffer location, based on the frame length
519  *END**************************************************************************/
CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info,const uint8 * data,uint8 * MB)520 void CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info, const uint8 * data, uint8 * MB)
521 {
522     volatile uint32 * Mb_Data_32 = (volatile uint32 *)MB;
523     const uint32 * MsgData_32 = (const uint32*)data;
524     uint16 idx;
525     for(idx = 0u; idx< (info->dataLength & ~3U); idx +=4u )
526     {
527         * Mb_Data_32 = * MsgData_32;
528        Mb_Data_32++;
529        MsgData_32++;
530     }
531     for ( ; idx < info->dataLength; idx++)
532     {
533         MB[idx] =  data[idx];
534     }
535 
536     if(info->frame == CANEXCEL_FD_FRAME)
537     {
538         uint8 dlcValue = CAN_ComputeDLCValue((uint8)(info->dataLength));
539         uint8 calcValue = CAN_ComputePayloadSizeHw(dlcValue);
540         for(idx = info->dataLength; idx<calcValue; idx++)
541         {
542             MB[idx] = info->fd_padding;
543         }
544     }
545 }
546 /*FUNCTION**********************************************************************
547  *
548  * Function Name : CanXL_EnableInterrupts
549  * Description   : Enable configured Interrupts for CanExcel controller
550  *END**************************************************************************/
CanXL_EnableInterrupts(CANXL_SIC_Type * base)551 void CanXL_EnableInterrupts(CANXL_SIC_Type * base)
552 {
553     base->SYSMDHICFG = CANXL_SIC_SYSMDHICFG_TXDCFGHI0_0_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_1_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_2_MASK | CANXL_SIC_SYSMDHICFG_TXDCFGHI0_3_MASK |
554                        CANXL_SIC_SYSMDHICFG_RXDCFGHI0_0_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_1_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_2_MASK | CANXL_SIC_SYSMDHICFG_RXDCFGHI0_3_MASK;
555 }
556 /*FUNCTION**********************************************************************
557  *
558  * Function Name : CanXL_DisableInterrupts
559  * Description   : Disable configured Interrupts for CanExcel controller
560  *END**************************************************************************/
CanXL_DisableInterrupts(CANXL_SIC_Type * base)561 void CanXL_DisableInterrupts(CANXL_SIC_Type * base)
562 {
563     base->SYSMDHICFG = 0U;
564 }
565 /*FUNCTION**********************************************************************
566  *
567  * Function Name : CanXL_ResetImaskBuff (uses in Canexcel_Ip_Init function only)
568  * Description   : Reset Imask Buffers.
569  *
570  *END**************************************************************************/
CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base)571 void CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base)
572 {
573     uint8 ImaskCnt = 0U;
574     for (ImaskCnt = 0U; ImaskCnt < CANXL_GRP_CONTROL_MSGIMASKARRAY_COUNT; ImaskCnt++)
575     {
576         base->MSGIMASK[ImaskCnt] = 0U;
577     }
578 }
579 
580 /*FUNCTION**********************************************************************
581  *
582  * Function Name : CanXL_ConfigCtrlOptions
583  * Description   : configure controller depending on options
584  * note: Protocol exception should not be enabled with XL frame support.
585  *
586  *END**************************************************************************/
CanXL_ConfigCtrlOptions(CANXL_SIC_Type * base,uint32 u32Options)587 Canexcel_Ip_StatusType CanXL_ConfigCtrlOptions(CANXL_SIC_Type * base, uint32 u32Options)
588 {
589     Canexcel_Ip_StatusType status = CANEXCEL_STATUS_SUCCESS;
590     if (((base->BCFG2 & CANXL_SIC_BCFG2_XLEN_MASK) != 0U) && ((u32Options & CANXL_IP_PROTOCOL_EXCEPTION_U32) != 0U))
591     {
592         status = CANEXCEL_STATUS_ERROR;
593     }
594     else
595     {
596         /* Set protocol Exception, PEXCE must be cleared when BCFG2[XLEN] is set. */
597         if ((u32Options & CANXL_IP_PROTOCOL_EXCEPTION_U32) != 0U)
598         {
599             /* 1b - Protocol exception feature enabled */
600             base->BCFG2 |=  CANXL_SIC_BCFG2_PEXCE_MASK;
601         }
602         else
603         {
604             /* 0b - Protocol exception feature disabled */
605             base->BCFG2 &=  (~CANXL_SIC_BCFG2_PEXCE_MASK);
606         }
607     }
608     if ((u32Options & CANXL_IP_ROM_U32) != 0U)
609     {
610         base->BCFG2 |= CANXL_SIC_BCFG2_ROM_MASK;
611     }
612     else
613     {
614         base->BCFG2 &= (~CANXL_SIC_BCFG2_ROM_MASK);
615     }
616     if ((u32Options & CANXL_IP_TX_ERROR_RESPONSE_U32) != 0U)
617     {
618         base->BCFG2 |= CANXL_SIC_BCFG2_TFER_MASK;
619     }
620     else
621     {
622         base->BCFG2 &= (~CANXL_SIC_BCFG2_TFER_MASK);
623     }
624 
625     if ((u32Options & CANXL_IP_BUSOFF_RECOVERY_U32) != 0U)
626     {
627         /* 0b - Automatic bus-off recovery is enabled */
628         base->BCFG1 &= (~CANXL_SIC_BCFG1_ABRDIS_MASK);
629     }
630     else
631     {
632         /* 1b - Automatic bus-off recovery is disabled */
633         base->BCFG1 |= CANXL_SIC_BCFG1_ABRDIS_MASK;
634     }
635 
636     if ((u32Options & CANXL_IP_EDGE_FILTER_U32) != 0U)
637     {
638         /* 0b - Edge Filter is enabled */
639         base->BCFG2 &= (~CANXL_SIC_BCFG2_EDFLTDIS_MASK);
640     }
641     else
642     {
643         /* 1b - Edge Filter is disabled */
644         base->BCFG2 |= CANXL_SIC_BCFG2_EDFLTDIS_MASK;
645     }
646 
647     if ((u32Options & CANXL_IP_XLER_U32) != 0U)
648     {
649         base->BCFG2 |= CANXL_SIC_BCFG2_XLER_MASK;
650     }
651     else
652     {
653         base->BCFG2 &= (~CANXL_SIC_BCFG2_XLER_MASK);
654     }
655     return status;
656 }
657 /*FUNCTION**********************************************************************
658  *
659  * Function Name : CanXL_ConfigAccAddr
660  * Description   : Config the Acceptance Address Filter for RxFIFO
661  *END**************************************************************************/
CanXL_ConfigAccAddr(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)662 void CanXL_ConfigAccAddr(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
663 {
664     uint32 mask = 1UL << (filtIdx%32U);
665     if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
666     {
667         /* Enable Range Filter operation */
668         base->AAMRCFG |= mask;
669     }
670     else
671     {    /* Enable Mask Filter operation */
672         base->AAMRCFG &= (~mask);
673     }
674     base->ADDRACPTFLTAR[filtIdx].AAFLTH = filter->idAddrFilterH;
675     base->ADDRACPTFLTAR[filtIdx].AAFLTL = filter->idAddrFilterL;
676 }
677 /*FUNCTION**********************************************************************
678  *
679  * Function Name : CanXL_ConfigIDFilter
680  * Description   : Config the ID Filter for RxFIFO
681  *END**************************************************************************/
CanXL_ConfigIDFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)682 void CanXL_ConfigIDFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
683 {
684     uint32 mask = 1UL << (filtIdx%32U);
685     if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
686     {
687         /* Enable Range Filter operation */
688         base->ACPTIDMR |= mask;
689     }
690     else
691     {    /* Enable Mask Filter operation */
692         base->ACPTIDMR &= (~mask);
693     }
694     base->IDACPTFLTAR[filtIdx].IDAFLTH = filter->idAddrFilterH;
695     base->IDACPTFLTAR[filtIdx].IDAFLTL = filter->idAddrFilterL;
696 }
697 /*FUNCTION**********************************************************************
698  *
699  * Function Name : CanXL_ConfigSDUFilter
700  * Description   : Config the SDU Filter for RxFIFO
701  *END**************************************************************************/
CanXL_ConfigSDUFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)702 void CanXL_ConfigSDUFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
703 {
704     uint32 mask = 1UL << (filtIdx%32U);
705     if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
706     {
707         /* Enable Range Filter operation */
708         base->SAMRCFG |= mask;
709     }
710     else
711     {    /* Enable Mask Filter operation */
712         base->SAMRCFG &= (~mask);
713     }
714     /* Div the register selection to 2, this register is composed form a pair of SDU filter */
715     base->SAFLT[filtIdx>>2U] = 0U;
716     if((filtIdx % 2U)  == 0U)
717     {
718         base->SAFLT[filtIdx>>2U] |= CANXL_RXFIFO_SAFLT_SDUa_H(filter->sduVcanFilterH) | CANXL_RXFIFO_SAFLT_SDUa_L(filter->sduVcanFilterL);
719     }
720     else
721     {
722         base->SAFLT[filtIdx>>2U] |= CANXL_RXFIFO_SAFLT_SDUb_H(filter->sduVcanFilterH) | CANXL_RXFIFO_SAFLT_SDUb_L(filter->sduVcanFilterL);
723     }
724 }
725 /*FUNCTION**********************************************************************
726  *
727  * Function Name : CanXL_ConfigVCANFilter
728  * Description   : Config the VCAN Filter for RxFIFO
729  *END**************************************************************************/
CanXL_ConfigVCANFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)730 void CanXL_ConfigVCANFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
731 {
732     uint32 mask = 1UL << (filtIdx%32U);
733     if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
734     {
735         /* Enable Range Filter operation */
736         base->VAMRCFG |= mask;
737     }
738     else
739     {    /* Enable Mask Filter operation */
740         base->VAMRCFG &= (~mask);
741     }
742     /* Div the register selection to 2, this register is composed form a pair of SDU filter */
743     base->VAFLT[filtIdx>>2U] = 0U;
744     if((filtIdx % 2U)  == 0U)
745     {
746         base->VAFLT[filtIdx>>2U] |= CANXL_RXFIFO_VAFLT_VCANa_H(filter->sduVcanFilterH) | CANXL_RXFIFO_VAFLT_VCANa_L(filter->sduVcanFilterL);
747     }
748     else
749     {
750         base->VAFLT[filtIdx>>2U] |= CANXL_RXFIFO_VAFLT_VCANb_H(filter->sduVcanFilterH) | CANXL_RXFIFO_VAFLT_VCANb_L(filter->sduVcanFilterL);
751     }
752 }
753 /*FUNCTION**********************************************************************
754  *
755  * Function Name : CanXL_ConfigAccAddrFilterBank
756  * Description   : Config the Acceptance Address Filter as Accept for MessageDescriptor in FilterBanks
757  *END**************************************************************************/
CanXL_ConfigAccAddrFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)758 void CanXL_ConfigAccAddrFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
759 {
760     uint32 mask = 1UL << (filtIdx%32U);
761     typedef struct {
762         uint32 AAFLTx_L;
763         uint32 AAFLTx_H;
764     } AddrFilterAAType;
765     if(bank == 0U)
766     {
767         /* MISRA Rule 11.3: When detected for casting integer pointers to integer pointers of different size: This operation is allowed, as it does not lead to incompatible alignment. */
768         volatile AddrFilterAAType * FilterStr = (volatile AddrFilterAAType *)&base->AAFLT0_0L;
769         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
770         {
771             /* Enable Range Filter operation */
772             base->AAMRCFG0 |= mask;
773         }
774         else
775         {    /* Enable Mask Filter operation */
776             base->AAMRCFG0 &= (~mask);
777         }
778         FilterStr[filtIdx].AAFLTx_L = filter->idAddrFilterL;
779         FilterStr[filtIdx].AAFLTx_H = filter->idAddrFilterH;
780     }
781     else
782     {
783         volatile AddrFilterAAType * FilterStr = (volatile AddrFilterAAType *)&base->AAFLT1_0L;
784         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
785         {
786             /* Enable Range Filter operation */
787             base->AAMRCFG1 |= mask;
788         }
789         else
790         {    /* Enable Mask Filter operation */
791             base->AAMRCFG1 &= (~mask);
792         }
793         FilterStr[filtIdx].AAFLTx_L = filter->idAddrFilterL;
794         FilterStr[filtIdx].AAFLTx_H = filter->idAddrFilterH;
795     }
796 }
797 /*FUNCTION**********************************************************************
798  *
799  * Function Name : CanXL_ConfigAccAddrRejectBank
800  * Description   : Config the Acceptance Address Filter as Reject for MessageDescriptor in FilterBanks
801  *END**************************************************************************/
CanXL_ConfigAccAddrRejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter,uint8 filtIdx)802 void CanXL_ConfigAccAddrRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx)
803 {
804     uint32 mask = 1UL << (filtIdx%32U);
805     typedef struct {
806         uint32 ARFLTx_L;
807         uint32 ARFLTx_H;
808     } AddrFilterType;
809     if(bank == 0U)
810     {
811         volatile AddrFilterType * FilterStr = (volatile AddrFilterType *)&base->ARFLT0_0L;
812         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
813         {
814             /* Enable Range Filter operation */
815             base->ARMRCFG0 |= mask;
816         }
817         else
818         {    /* Enable Mask Filter operation */
819             base->ARMRCFG0 &= (~mask);
820         }
821         FilterStr[filtIdx].ARFLTx_L = filter->idAddrFilterL;
822         FilterStr[filtIdx].ARFLTx_H = filter->idAddrFilterH;
823     }
824     else
825     {
826         volatile AddrFilterType * FilterStr = (volatile AddrFilterType *)&base->ARFLT1_0L;
827         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
828         {
829             /* Enable Range Filter operation */
830             base->ARMRCFG1 |= mask;
831         }
832         else
833         {    /* Enable Mask Filter operation */
834             base->ARMRCFG1 &= (~mask);
835         }
836         FilterStr[filtIdx].ARFLTx_L = filter->idAddrFilterL;
837         FilterStr[filtIdx].ARFLTx_H = filter->idAddrFilterH;
838     }
839 }
840 /*FUNCTION**********************************************************************
841  *
842  * Function Name : CanXL_ConfigSDUFilterBank
843  * Description   : Config the SDU Filter as Accept for MessageDescriptor in FilterBanks
844  *END**************************************************************************/
CanXL_ConfigSDUFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)845 void CanXL_ConfigSDUFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
846 {
847     uint32 mask = 1UL << (filtIdx%32U);
848     if(bank == 0U)
849     {
850         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
851         {
852             /* Enable Range Filter operation */
853             base->SAMRCFG0 |= mask;
854         }
855         else
856         {    /* Enable Mask Filter operation */
857             base->SAMRCFG0 &= (~mask);
858         }
859         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
860         volatile uint32 * SAFLT = (volatile uint32 *)&base->SAFLT0_0;
861         if((filtIdx % 2U)  == 0U)
862         {
863             SAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SAFLT0_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT0_0_SDUa_L(filter->sduVcanFilterL);
864         }
865         else
866         {
867             SAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SAFLT0_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT0_0_SDUb_L(filter->sduVcanFilterL);
868         }
869     }
870     else
871     {
872         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
873         {
874             /* Enable Range Filter operation */
875             base->SAMRCFG1 |= mask;
876         }
877         else
878         {    /* Enable Mask Filter operation */
879             base->SAMRCFG1 &= (~mask);
880         }
881         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
882         volatile uint32 * SAFLT = (volatile uint32 *)&base->SAFLT1_0;
883         if((filtIdx % 2U)  == 0U)
884         {
885             SAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SAFLT1_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT1_0_SDUa_L(filter->sduVcanFilterL);
886         }
887         else
888         {
889             SAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SAFLT1_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SAFLT1_0_SDUb_L(filter->sduVcanFilterL);
890         }
891     }
892 }
893 /*FUNCTION**********************************************************************
894  *
895  * Function Name : CanXL_ConfigSDURejectBank
896  * Description   : Config the SDU Filter as Reject for MessageDescriptor in FilterBanks
897  *END**************************************************************************/
CanXL_ConfigSDURejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)898 void CanXL_ConfigSDURejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
899 {
900     uint32 mask = 1UL << (filtIdx%32U);
901     if(bank == 0U)
902     {
903         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
904         {
905             /* Enable Range Filter operation */
906             base->SRMRCFG0 |= mask;
907         }
908         else
909         {    /* Enable Mask Filter operation */
910             base->SRMRCFG0 &= (~mask);
911         }
912         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
913         volatile uint32 * SRFLT = (volatile uint32 *)&base->SRFLT0_0;
914         if((filtIdx % 2U)  == 0U)
915         {
916             SRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SRFLT0_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT0_0_SDUa_L(filter->sduVcanFilterL);
917         }
918         else
919         {
920             SRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SRFLT0_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT0_0_SDUb_L(filter->sduVcanFilterL);
921         }
922     }
923     else
924     {
925         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
926         {
927             /* Enable Range Filter operation */
928             base->SRMRCFG1 |= mask;
929         }
930         else
931         {    /* Enable Mask Filter operation */
932             base->SRMRCFG1 &= (~mask);
933         }
934         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
935         volatile uint32 * SRFLT = (volatile uint32 *)&base->SRFLT1_0;
936         if((filtIdx % 2U)  == 0U)
937         {
938             SRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SRFLT1_0_SDUa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT1_0_SDUa_L(filter->sduVcanFilterL);
939         }
940         else
941         {
942             SRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_SRFLT1_0_SDUb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_SRFLT1_0_SDUb_L(filter->sduVcanFilterL);
943         }
944     }
945 }
946 /*FUNCTION**********************************************************************
947  *
948  * Function Name : CanXL_ConfigVCANFilterBank
949  * Description   : Config the VCAN Filter as Accept for MessageDescriptor in FilterBanks
950  *END**************************************************************************/
CanXL_ConfigVCANFilterBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)951 void CanXL_ConfigVCANFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
952 {
953     uint32 mask = 1UL << (filtIdx%32U);
954     if(bank == 0U)
955     {
956         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
957         {
958             /* Enable Range Filter operation */
959             base->VAMRCFG0 |= mask;
960         }
961         else
962         {    /* Enable Mask Filter operation */
963             base->VAMRCFG0 &= (~mask);
964         }
965         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
966         volatile uint32 * VAFLT = (volatile uint32 *)&base->VAFLT0_0;
967         if((filtIdx % 2U)  == 0U)
968         {
969             VAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VAFLT0_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT0_0_VCANa_L(filter->sduVcanFilterL);
970         }
971         else
972         {
973             VAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VAFLT0_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT0_0_VCANb_L(filter->sduVcanFilterL);
974         }
975     }
976     else
977     {
978         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
979         {
980             /* Enable Range Filter operation */
981             base->VAMRCFG1 |= mask;
982         }
983         else
984         {    /* Enable Mask Filter operation */
985             base->VAMRCFG1 &= (~mask);
986         }
987         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
988         volatile uint32 * VAFLT = (volatile uint32 *)&base->VAFLT1_0;
989         if((filtIdx % 2U)  == 0U)
990         {
991             VAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VAFLT1_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT1_0_VCANa_L(filter->sduVcanFilterL);
992         }
993         else
994         {
995             VAFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VAFLT1_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VAFLT1_0_VCANb_L(filter->sduVcanFilterL);
996         }
997     }
998 }
999 /*FUNCTION**********************************************************************
1000  *
1001  * Function Name : CanXL_ConfigVCANRejectBank
1002  * Description   : Config the VCAN Filter as Reject for MessageDescriptor in FilterBanks
1003  *END**************************************************************************/
CanXL_ConfigVCANRejectBank(CANXL_FILTER_BANK_Type * base,uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter,uint8 filtIdx)1004 void CanXL_ConfigVCANRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx)
1005 {
1006     uint32 mask = 1UL << (filtIdx%32U);
1007     if(bank == 0U)
1008     {
1009         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
1010         {
1011             /* Enable Range Filter operation */
1012             base->VRMRCFG0 |= mask;
1013         }
1014         else
1015         {    /* Enable Mask Filter operation */
1016             base->VRMRCFG0 &= (~mask);
1017         }
1018         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1019         volatile uint32 * VRFLT = (volatile uint32 *)&base->VRFLT0_0;
1020         if((filtIdx % 2U)  == 0U)
1021         {
1022             VRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VRFLT0_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT0_0_VCANa_L(filter->sduVcanFilterL);
1023         }
1024         else
1025         {
1026             VRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VRFLT0_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT0_0_VCANb_L(filter->sduVcanFilterL);
1027         }
1028     }
1029     else
1030     {
1031         if(filter->filterType == CANEXCEL_IP_RX_FIFO_RANGE_FILTER)
1032         {
1033             /* Enable Range Filter operation */
1034             base->VRMRCFG1 |= mask;
1035         }
1036         else
1037         {    /* Enable Mask Filter operation */
1038             base->VRMRCFG1 &= (~mask);
1039         }
1040         /* Div the register selection to 2, this register is composed form a pair of SDU filter */
1041         volatile uint32 * VRFLT = (volatile uint32 *)&base->VRFLT1_0;
1042         if((filtIdx % 2U)  == 0U)
1043         {
1044             VRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VRFLT1_0_VCANa_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT1_0_VCANa_L(filter->sduVcanFilterL);
1045         }
1046         else
1047         {
1048             VRFLT[filtIdx>>2U] |= CANXL_FILTER_BANK_VRFLT1_0_VCANb_H(filter->sduVcanFilterH) | CANXL_FILTER_BANK_VRFLT1_0_VCANb_L(filter->sduVcanFilterL);
1049         }
1050     }
1051 }
1052 /** @} */
1053 
1054