1 /*
2 * Copyright (c) 2021, Pete Johanson
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <soc.h>
8 #include <string.h>
9 #include <hardware/regs/usb.h>
10 #include <hardware/structs/usb.h>
11 #include <hardware/resets.h>
12 #include <pico/platform.h>
13
14 #include <zephyr/init.h>
15 #include <zephyr/kernel.h>
16 #include <zephyr/usb/usb_device.h>
17 #include <zephyr/sys/util.h>
18 #include <zephyr/logging/log.h>
19 #include <zephyr/irq.h>
20 #include <zephyr/drivers/clock_control.h>
21 #include <zephyr/drivers/pinctrl.h>
22
23 LOG_MODULE_REGISTER(udc_rpi, CONFIG_USB_DRIVER_LOG_LEVEL);
24
25 #define DT_DRV_COMPAT raspberrypi_pico_usbd
26
27 #define USB_BASE_ADDRESS DT_INST_REG_ADDR(0)
28 #define USB_IRQ DT_INST_IRQ_BY_NAME(0, usbctrl, irq)
29 #define USB_IRQ_PRI DT_INST_IRQ_BY_NAME(0, usbctrl, priority)
30 #define USB_NUM_BIDIR_ENDPOINTS DT_INST_PROP(0, num_bidir_endpoints)
31 #define CLK_DRV DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(0))
32 #define CLK_ID (clock_control_subsys_t)DT_INST_PHA_BY_IDX(0, clocks, 0, clk_id)
33
34 #define DATA_BUFFER_SIZE 64U
35
36 /* Needed for pico-sdk */
37 #ifndef typeof
38 #define typeof __typeof__
39 #endif
40
41 struct udc_rpi_ep_state {
42 uint16_t mps;
43 enum usb_dc_ep_transfer_type type;
44 uint8_t halted;
45 usb_dc_ep_callback cb;
46 uint32_t read_offset;
47 struct k_sem write_sem;
48 io_rw_32 *ep_ctl;
49 io_rw_32 *buf_ctl;
50 uint8_t *buf;
51 uint8_t next_pid;
52 };
53
54 #define USB_RPI_PICO_PINCTRL_DT_INST_DEFINE(n) \
55 COND_CODE_1(DT_INST_PINCTRL_HAS_NAME(n, default), (PINCTRL_DT_INST_DEFINE(n)), ())
56
57 #define USB_RPI_PICO_PINCTRL_DT_INST_DEV_CONFIG_GET(n) \
58 COND_CODE_1(DT_INST_PINCTRL_HAS_NAME(n, default), \
59 ((void *)PINCTRL_DT_INST_DEV_CONFIG_GET(n)), (NULL))
60
61 USB_RPI_PICO_PINCTRL_DT_INST_DEFINE(0);
62 const struct pinctrl_dev_config *pcfg = USB_RPI_PICO_PINCTRL_DT_INST_DEV_CONFIG_GET(0);
63
64 #define USBD_THREAD_STACK_SIZE 1024
65
66 K_THREAD_STACK_DEFINE(thread_stack, USBD_THREAD_STACK_SIZE);
67 static struct k_thread thread;
68
69 struct udc_rpi_state {
70 usb_dc_status_callback status_cb;
71 struct udc_rpi_ep_state out_ep_state[USB_NUM_BIDIR_ENDPOINTS];
72 struct udc_rpi_ep_state in_ep_state[USB_NUM_BIDIR_ENDPOINTS];
73 bool abort_control_writes;
74 bool setup_available;
75 bool should_set_address;
76 uint16_t control_out_ep_rcvd;
77 uint8_t addr;
78 bool rwu_pending;
79 };
80
81 static struct udc_rpi_state state;
82
83 struct cb_msg {
84 bool ep_event;
85 uint32_t type;
86 uint8_t ep;
87 };
88
89 K_MSGQ_DEFINE(usb_dc_msgq, sizeof(struct cb_msg), 10, 4);
90
udc_rpi_get_ep_state(uint8_t ep)91 static struct udc_rpi_ep_state *udc_rpi_get_ep_state(uint8_t ep)
92 {
93 struct udc_rpi_ep_state *ep_state_base;
94
95 if (USB_EP_GET_IDX(ep) >= USB_NUM_BIDIR_ENDPOINTS) {
96 return NULL;
97 }
98
99 if (USB_EP_DIR_IS_OUT(ep)) {
100 ep_state_base = state.out_ep_state;
101 } else {
102 ep_state_base = state.in_ep_state;
103 }
104
105 return ep_state_base + USB_EP_GET_IDX(ep);
106 }
107
udc_rpi_start_xfer(uint8_t ep,const void * data,const size_t len)108 static int udc_rpi_start_xfer(uint8_t ep, const void *data, const size_t len)
109 {
110 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
111 uint32_t val = len;
112
113 if (*ep_state->buf_ctl & USB_BUF_CTRL_AVAIL) {
114 LOG_WRN("ep 0x%02x was already armed", ep);
115 }
116
117 if (USB_EP_DIR_IS_IN(ep)) {
118 if (len > DATA_BUFFER_SIZE) {
119 return -ENOMEM;
120 }
121
122 val |= USB_BUF_CTRL_FULL;
123 if (data) {
124 memcpy(ep_state->buf, data, len);
125 }
126 } else {
127 ep_state->read_offset = 0;
128 }
129
130 LOG_DBG("xfer ep %d len %d pid: %d", ep, len, ep_state->next_pid);
131 val |= ep_state->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
132
133 ep_state->next_pid ^= 1u;
134 *ep_state->buf_ctl = val;
135 /*
136 * By default, clk_sys runs at 125MHz, wait 3 nop instructions before
137 * setting the AVAILABLE bit. See 4.1.2.5.1. Concurrent access.
138 */
139 arch_nop();
140 arch_nop();
141 arch_nop();
142 *ep_state->buf_ctl = val | USB_BUF_CTRL_AVAIL;
143
144 return 0;
145 }
146
147 /*
148 * This function converts a zephyr endpoint address into a
149 * bit mask that can be used with registers:
150 * - BUFF_STATUS
151 * - BUFF_CPU_SHOULD_HANDLE
152 * - EP_ABOR
153 * - EP_ABORT_DONE
154 * - EP_STATUS_STALL_NAK
155 */
udc_rpi_endpoint_mask(const uint8_t ep)156 static inline uint32_t udc_rpi_endpoint_mask(const uint8_t ep)
157 {
158 const int bit_index = (USB_EP_GET_IDX(ep) << 1) | !!USB_EP_DIR_IS_OUT(ep);
159
160 return BIT(bit_index);
161 }
162
udc_rpi_cancel_endpoint(const uint8_t ep)163 static void udc_rpi_cancel_endpoint(const uint8_t ep)
164 {
165 struct udc_rpi_ep_state *const ep_state = udc_rpi_get_ep_state(ep);
166
167 if (*ep_state->buf_ctl & USB_BUF_CTRL_AVAIL) {
168 const uint32_t mask = udc_rpi_endpoint_mask(ep);
169 bool abort_handshake_supported = rp2040_chip_version() >= 2;
170
171 if (abort_handshake_supported) {
172 hw_set_alias(usb_hw)->abort = mask;
173 while ((usb_hw->abort_done & mask) != mask) {
174 }
175 }
176
177 *ep_state->buf_ctl &= ~USB_BUF_CTRL_AVAIL;
178
179 if (abort_handshake_supported) {
180 hw_clear_alias(usb_hw)->abort = mask;
181 }
182
183 if (USB_EP_DIR_IS_IN(ep)) {
184 k_sem_give(&ep_state->write_sem);
185 }
186 }
187 }
188
udc_rpi_handle_setup(void)189 static void udc_rpi_handle_setup(void)
190 {
191 const struct udc_rpi_ep_state *const ep_state = udc_rpi_get_ep_state(USB_CONTROL_EP_OUT);
192 struct cb_msg msg;
193
194 /* Normally all control transfers should complete before a new setup
195 * transaction is sent, however in some rare cases from the perspective
196 * of the device, a new setup transaction could arrive prematurely, in
197 * which case the previous control transfer should be aborted, and for
198 * this reason we're canceling both control IN and control OUT
199 * endpoints. See section 5.5.5 of the Universal Serial Bus
200 * Specification, version 2.0.
201 */
202
203 udc_rpi_cancel_endpoint(USB_CONTROL_EP_IN);
204
205 if (*ep_state->buf_ctl & USB_BUF_CTRL_AVAIL) {
206 udc_rpi_cancel_endpoint(USB_CONTROL_EP_OUT);
207
208 /* This warning could be triggered by the rare event described
209 * above, but it could also be a sign of a software bug, that
210 * can expose us to race conditions when the system is slowed
211 * down, because it becomes impossible to determine in what
212 * order did setup/data transactions arrive.
213 */
214
215 LOG_WRN("EP0_OUT was armed while setup stage arrived.");
216 }
217
218 state.abort_control_writes = true;
219
220 /* Set DATA1 PID for the next (data or status) stage */
221 udc_rpi_get_ep_state(USB_CONTROL_EP_IN)->next_pid = 1;
222 udc_rpi_get_ep_state(USB_CONTROL_EP_OUT)->next_pid = 1;
223
224 msg.ep = USB_CONTROL_EP_OUT;
225 msg.type = USB_DC_EP_SETUP;
226 msg.ep_event = true;
227
228 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
229 }
230
udc_rpi_handle_buff_status(void)231 static void udc_rpi_handle_buff_status(void)
232 {
233 struct udc_rpi_ep_state *ep_state;
234 enum usb_dc_ep_cb_status_code status_code;
235 uint32_t status = usb_hw->buf_status;
236 unsigned int bit = 1U;
237 struct cb_msg msg;
238
239 LOG_DBG("status: %d", status);
240
241 for (int i = 0; status && i < USB_NUM_BIDIR_ENDPOINTS * 2; i++) {
242 if (status & bit) {
243 hw_clear_alias(usb_hw)->buf_status = bit;
244 bool in = !(i & 1U);
245 uint8_t ep = (i >> 1U) | (in ? USB_EP_DIR_IN : USB_EP_DIR_OUT);
246
247 ep_state = udc_rpi_get_ep_state(ep);
248 status_code = in ? USB_DC_EP_DATA_IN : USB_DC_EP_DATA_OUT;
249
250 LOG_DBG("buff ep %i in? %i", (i >> 1), in);
251
252 if (i == 0 && in && state.should_set_address) {
253 state.should_set_address = false;
254 usb_hw->dev_addr_ctrl = state.addr;
255 }
256
257 if (in) {
258 k_sem_give(&ep_state->write_sem);
259 }
260
261 msg.ep = ep;
262 msg.ep_event = true;
263 msg.type = status_code;
264
265 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
266
267 status &= ~bit;
268 }
269
270 bit <<= 1U;
271 }
272 }
273
udc_rpi_handle_resume(void)274 static void udc_rpi_handle_resume(void)
275 {
276 struct cb_msg msg = {
277 .ep = 0U,
278 .type = USB_DC_RESUME,
279 .ep_event = false,
280 };
281
282 LOG_DBG("Resume");
283 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
284 state.rwu_pending = false;
285 }
286
udc_rpi_handle_suspended(void)287 static void udc_rpi_handle_suspended(void)
288 {
289 struct cb_msg msg = {
290 .ep = 0U,
291 .type = USB_DC_SUSPEND,
292 .ep_event = false,
293 };
294
295 LOG_DBG("Suspended");
296 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
297 }
298
udc_rpi_isr(const void * arg)299 static void udc_rpi_isr(const void *arg)
300 {
301 uint32_t status = usb_hw->ints;
302 uint32_t handled = 0;
303 struct cb_msg msg;
304
305 if ((status & (USB_INTS_BUFF_STATUS_BITS | USB_INTS_SETUP_REQ_BITS)) &&
306 state.rwu_pending) {
307 /* The rpi pico USB device does not appear to be sending
308 * USB_INTR_DEV_RESUME_FROM_HOST interrupts when the resume is
309 * a result of a remote wakeup request sent by us.
310 * This will simulate a resume event if bus activity is observed
311 */
312
313 udc_rpi_handle_resume();
314 }
315
316 if (status & USB_INTS_BUFF_STATUS_BITS) {
317 /* Note: we should check buffer interrupts before setup interrupts.
318 * this may seem a little counter-intuitive, because setup irqs
319 * sound more urgent, however in case we see an EP0_OUT buffer irq
320 * at the same time as a setup irq, then we know the buffer irq
321 * belongs to the previous control transfer, so we want to handle
322 * that first.
323 */
324
325 handled |= USB_INTS_BUFF_STATUS_BITS;
326 udc_rpi_handle_buff_status();
327 }
328
329 if (status & USB_INTS_SETUP_REQ_BITS) {
330 handled |= USB_INTS_SETUP_REQ_BITS;
331 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_SETUP_REC_BITS;
332 udc_rpi_handle_setup();
333 }
334
335 if (status & USB_INTS_DEV_CONN_DIS_BITS) {
336 LOG_DBG("buf %u ep %u", *udc_rpi_get_ep_state(0x81)->buf_ctl,
337 *udc_rpi_get_ep_state(0x81)->ep_ctl);
338 handled |= USB_INTS_DEV_CONN_DIS_BITS;
339 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_CONNECTED_BITS;
340
341 msg.ep = 0U;
342 msg.ep_event = false;
343 msg.type = usb_hw->sie_status & USB_SIE_STATUS_CONNECTED_BITS ?
344 USB_DC_CONNECTED :
345 USB_DC_DISCONNECTED;
346
347 /* VBUS detection does not always detect the detach.
348 * Check on disconnect if VBUS is still attached
349 */
350 if (pcfg != NULL && msg.type == USB_DC_DISCONNECTED &&
351 (usb_hw->sie_status & USB_SIE_STATUS_VBUS_DETECTED_BITS) == 0) {
352 LOG_DBG("Disconnected. Disabling pull-up");
353 hw_clear_alias(usb_hw)->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
354 }
355
356 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
357 }
358
359 if (status & USB_INTS_VBUS_DETECT_BITS) {
360 handled |= USB_INTS_VBUS_DETECT_BITS;
361 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_VBUS_DETECTED_BITS;
362
363 if (pcfg != NULL) {
364 if (usb_hw->sie_status & USB_SIE_STATUS_VBUS_DETECTED_BITS) {
365 LOG_DBG("VBUS attached. Enabling pull-up");
366 hw_set_alias(usb_hw)->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
367 } else {
368 LOG_DBG("VBUS detached. Disabling pull-up");
369 hw_clear_alias(usb_hw)->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
370 }
371 }
372 }
373
374 if (status & USB_INTS_BUS_RESET_BITS) {
375 LOG_WRN("BUS RESET");
376 handled |= USB_INTS_BUS_RESET_BITS;
377 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_BUS_RESET_BITS;
378 usb_hw->dev_addr_ctrl = 0;
379
380 /* The DataInCallback will never be called at this point for any pending
381 * transactions. Reset the IN semaphores to prevent perpetual locked state.
382 */
383
384 for (int i = 0; i < USB_NUM_BIDIR_ENDPOINTS; i++) {
385 k_sem_give(&state.in_ep_state[i].write_sem);
386 }
387
388 msg.ep = 0U;
389 msg.type = USB_DC_RESET;
390 msg.ep_event = false;
391
392 k_msgq_put(&usb_dc_msgq, &msg, K_NO_WAIT);
393 }
394
395 if (status & USB_INTS_DEV_SUSPEND_BITS) {
396 handled |= USB_INTS_DEV_SUSPEND_BITS;
397 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_SUSPENDED_BITS;
398 udc_rpi_handle_suspended();
399 }
400
401 if (status & USB_INTR_DEV_RESUME_FROM_HOST_BITS) {
402 handled |= USB_INTR_DEV_RESUME_FROM_HOST_BITS;
403 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_RESUME_BITS;
404 udc_rpi_handle_resume();
405 }
406
407 if (status & USB_INTS_ERROR_DATA_SEQ_BITS) {
408 LOG_WRN("data seq");
409 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS;
410 handled |= USB_INTS_ERROR_DATA_SEQ_BITS;
411 }
412
413 if (status & USB_INTS_ERROR_RX_TIMEOUT_BITS) {
414 LOG_WRN("rx timeout");
415 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_RX_TIMEOUT_BITS;
416 handled |= USB_INTS_ERROR_RX_TIMEOUT_BITS;
417 }
418
419 if (status & USB_INTS_ERROR_RX_OVERFLOW_BITS) {
420 LOG_WRN("rx overflow");
421 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_RX_OVERFLOW_BITS;
422 handled |= USB_INTS_ERROR_RX_OVERFLOW_BITS;
423 }
424
425 if (status & USB_INTS_ERROR_BIT_STUFF_BITS) {
426 LOG_WRN("bit stuff error");
427 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_BIT_STUFF_ERROR_BITS;
428 handled |= USB_INTS_ERROR_BIT_STUFF_BITS;
429 }
430
431 if (status & USB_INTS_ERROR_CRC_BITS) {
432 LOG_ERR("crc error");
433 hw_clear_alias(usb_hw)->sie_status = USB_SIE_STATUS_CRC_ERROR_BITS;
434 handled |= USB_INTS_ERROR_CRC_BITS;
435 }
436
437 if (status ^ handled) {
438 LOG_ERR("unhandled IRQ: 0x%x", (uint)(status ^ handled));
439 }
440 }
441
udc_rpi_init_endpoint(const uint8_t i)442 static void udc_rpi_init_endpoint(const uint8_t i)
443 {
444 state.out_ep_state[i].buf_ctl = &usb_dpram->ep_buf_ctrl[i].out;
445 state.in_ep_state[i].buf_ctl = &usb_dpram->ep_buf_ctrl[i].in;
446
447 if (i != 0) {
448 state.out_ep_state[i].ep_ctl = &usb_dpram->ep_ctrl[i - 1].out;
449 state.in_ep_state[i].ep_ctl = &usb_dpram->ep_ctrl[i - 1].in;
450
451 state.out_ep_state[i].buf =
452 &usb_dpram->epx_data[((i - 1) * 2 + 1) * DATA_BUFFER_SIZE];
453 state.in_ep_state[i].buf = &usb_dpram->epx_data[((i - 1) * 2) * DATA_BUFFER_SIZE];
454 } else {
455 state.out_ep_state[i].buf = &usb_dpram->ep0_buf_a[0];
456 state.in_ep_state[i].buf = &usb_dpram->ep0_buf_a[0];
457 }
458
459 k_sem_init(&state.in_ep_state[i].write_sem, 1, 1);
460 }
461
udc_rpi_init(void)462 static int udc_rpi_init(void)
463 {
464 int ret;
465
466 /* Apply the pinctrl */
467 if (pcfg != NULL) {
468 ret = pinctrl_apply_state(pcfg, PINCTRL_STATE_DEFAULT);
469 if (ret != 0) {
470 LOG_ERR("Failed to apply pincfg: %d", ret);
471 return ret;
472 }
473 }
474
475 /* Reset usb controller */
476 reset_block(RESETS_RESET_USBCTRL_BITS);
477 unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
478
479 /* Clear any previous state in dpram/hw just in case */
480 memset(usb_hw, 0, sizeof(*usb_hw));
481 memset(usb_dpram, 0, sizeof(*usb_dpram));
482
483 /* Mux the controller to the onboard usb phy */
484 usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
485
486 if (pcfg == NULL) {
487 /* Force VBUS detect so the device thinks it is plugged into a host */
488 usb_hw->pwr =
489 USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
490 }
491
492 /* Enable the USB controller in device mode. */
493 usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS;
494
495 /* Enable an interrupt per EP0 transaction */
496 usb_hw->sie_ctrl = USB_SIE_CTRL_EP0_INT_1BUF_BITS;
497
498 /* Enable interrupts for when a buffer is done, when the bus is reset,
499 * and when a setup packet is received, and device connection status
500 */
501 usb_hw->inte = USB_INTS_BUFF_STATUS_BITS | USB_INTS_BUS_RESET_BITS |
502 USB_INTS_DEV_CONN_DIS_BITS |
503 USB_INTS_SETUP_REQ_BITS | /*USB_INTS_EP_STALL_NAK_BITS |*/
504 USB_INTS_ERROR_BIT_STUFF_BITS | USB_INTS_ERROR_CRC_BITS |
505 USB_INTS_ERROR_DATA_SEQ_BITS | USB_INTS_ERROR_RX_OVERFLOW_BITS |
506 USB_INTS_ERROR_RX_TIMEOUT_BITS | USB_INTS_DEV_SUSPEND_BITS |
507 USB_INTR_DEV_RESUME_FROM_HOST_BITS | USB_INTE_VBUS_DETECT_BITS;
508
509 /* Set up endpoints (endpoint control registers)
510 * described by device configuration
511 * usb_setup_endpoints();
512 */
513 for (int i = 0; i < USB_NUM_BIDIR_ENDPOINTS; i++) {
514 udc_rpi_init_endpoint(i);
515 }
516
517 /* Self powered devices must enable the pull up only if vbus is detected.
518 * If the pull-up is not enabled here, this will be handled by the USB_INTS_VBUS_DETECT
519 * interrupt.
520 */
521 if (usb_hw->sie_status & USB_SIE_STATUS_VBUS_DETECTED_BITS) {
522 LOG_DBG("Enabling pull-up");
523 /* Present full speed device by enabling pull up on DP */
524 hw_set_alias(usb_hw)->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
525 }
526
527 IRQ_CONNECT(USB_IRQ, USB_IRQ_PRI, udc_rpi_isr, 0, 0);
528 irq_enable(USB_IRQ);
529
530 return 0;
531 }
532
533 /* Zephyr USB device controller API implementation */
534
usb_dc_attach(void)535 int usb_dc_attach(void)
536 {
537 return udc_rpi_init();
538 }
539
usb_dc_ep_set_callback(const uint8_t ep,const usb_dc_ep_callback cb)540 int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb)
541 {
542 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
543
544 LOG_DBG("ep 0x%02x", ep);
545
546 if (!ep_state) {
547 return -EINVAL;
548 }
549
550 ep_state->cb = cb;
551
552 return 0;
553 }
554
usb_dc_set_status_callback(const usb_dc_status_callback cb)555 void usb_dc_set_status_callback(const usb_dc_status_callback cb)
556 {
557 state.status_cb = cb;
558 }
559
usb_dc_set_address(const uint8_t addr)560 int usb_dc_set_address(const uint8_t addr)
561 {
562 LOG_DBG("addr %u (0x%02x)", addr, addr);
563
564 state.should_set_address = true;
565 state.addr = addr;
566
567 return 0;
568 }
569
usb_dc_ep_start_read(uint8_t ep,size_t len)570 int usb_dc_ep_start_read(uint8_t ep, size_t len)
571 {
572 int ret;
573
574 LOG_DBG("ep 0x%02x len %d", ep, len);
575
576 if (!USB_EP_DIR_IS_OUT(ep)) {
577 LOG_ERR("invalid ep 0x%02x", ep);
578 return -EINVAL;
579 }
580
581 if (len > DATA_BUFFER_SIZE) {
582 len = DATA_BUFFER_SIZE;
583 }
584
585 ret = udc_rpi_start_xfer(ep, NULL, len);
586
587 return ret;
588 }
589
usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data * const cfg)590 int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data *const cfg)
591 {
592 uint8_t ep_idx = USB_EP_GET_IDX(cfg->ep_addr);
593
594 LOG_DBG("ep %x, mps %d, type %d",
595 cfg->ep_addr, cfg->ep_mps, cfg->ep_type);
596
597 if ((cfg->ep_type == USB_DC_EP_CONTROL) && ep_idx) {
598 LOG_ERR("invalid endpoint configuration");
599 return -1;
600 }
601
602 if (ep_idx > (USB_NUM_BIDIR_ENDPOINTS - 1)) {
603 LOG_ERR("endpoint index/address out of range");
604 return -1;
605 }
606
607 return 0;
608 }
609
usb_dc_ep_configure(const struct usb_dc_ep_cfg_data * const ep_cfg)610 int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const ep_cfg)
611 {
612 uint8_t ep = ep_cfg->ep_addr;
613 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
614
615 if (!ep_state) {
616 return -EINVAL;
617 }
618
619 LOG_DBG("ep 0x%02x, previous mps %u, mps %u, type %u",
620 ep_cfg->ep_addr, ep_state->mps,
621 ep_cfg->ep_mps, ep_cfg->ep_type);
622
623 ep_state->mps = ep_cfg->ep_mps;
624 ep_state->type = ep_cfg->ep_type;
625
626 return 0;
627 }
628
usb_dc_ep_set_stall(const uint8_t ep)629 int usb_dc_ep_set_stall(const uint8_t ep)
630 {
631 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
632
633 LOG_DBG("ep 0x%02x", ep);
634
635 if (!ep_state) {
636 return -EINVAL;
637 }
638 if (USB_EP_GET_IDX(ep) == 0) {
639 hw_set_alias(usb_hw)->ep_stall_arm = USB_EP_DIR_IS_OUT(ep) ?
640 USB_EP_STALL_ARM_EP0_OUT_BITS :
641 USB_EP_STALL_ARM_EP0_IN_BITS;
642 }
643
644 *ep_state->buf_ctl = USB_BUF_CTRL_STALL;
645 if (ep == USB_CONTROL_EP_IN) {
646 /* Un-arm EP0_OUT endpoint, to make sure next setup packet starts clean */
647 udc_rpi_cancel_endpoint(USB_CONTROL_EP_OUT);
648 }
649
650 ep_state->halted = 1U;
651
652 return 0;
653 }
654
usb_dc_ep_clear_stall(const uint8_t ep)655 int usb_dc_ep_clear_stall(const uint8_t ep)
656 {
657 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
658 uint8_t val;
659
660 LOG_DBG("ep 0x%02x", ep);
661
662 if (!ep_state) {
663 return -EINVAL;
664 }
665
666 if (USB_EP_GET_IDX(ep) > 0) {
667 val = *ep_state->buf_ctl;
668 val &= ~USB_BUF_CTRL_STALL;
669
670 *ep_state->buf_ctl = val;
671
672 ep_state->halted = 0U;
673 ep_state->read_offset = 0U;
674 }
675
676 return 0;
677 }
678
usb_dc_ep_is_stalled(const uint8_t ep,uint8_t * const stalled)679 int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled)
680 {
681 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
682
683 LOG_DBG("ep 0x%02x", ep);
684
685 if (!ep_state || !stalled) {
686 return -EINVAL;
687 }
688
689 *stalled = ep_state->halted;
690
691 return 0;
692 }
693
usb_dc_ep_rpi_pico_buffer_offset(volatile uint8_t * buf)694 static inline uint32_t usb_dc_ep_rpi_pico_buffer_offset(volatile uint8_t *buf)
695 {
696 /* TODO: Bits 0-5 are ignored by the controller so make sure these are 0 */
697 return (uint32_t)buf ^ (uint32_t)usb_dpram;
698 }
699
usb_dc_ep_enable(const uint8_t ep)700 int usb_dc_ep_enable(const uint8_t ep)
701 {
702 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
703
704 if (!ep_state) {
705 return -EINVAL;
706 }
707
708 LOG_DBG("ep 0x%02x (id: %d) -> type %d", ep, USB_EP_GET_IDX(ep), ep_state->type);
709
710 /* clear buffer state */
711 *ep_state->buf_ctl = USB_BUF_CTRL_DATA0_PID;
712 ep_state->next_pid = 0;
713
714 /* EP0 doesn't have an ep_ctl */
715 if (ep_state->ep_ctl) {
716 uint32_t val =
717 EP_CTRL_ENABLE_BITS |
718 EP_CTRL_INTERRUPT_PER_BUFFER |
719 (ep_state->type << EP_CTRL_BUFFER_TYPE_LSB) |
720 usb_dc_ep_rpi_pico_buffer_offset(ep_state->buf);
721
722 *ep_state->ep_ctl = val;
723 }
724
725 if (USB_EP_DIR_IS_OUT(ep) && ep != USB_CONTROL_EP_OUT) {
726 return usb_dc_ep_start_read(ep, DATA_BUFFER_SIZE);
727 }
728
729 return 0;
730 }
731
usb_dc_ep_disable(const uint8_t ep)732 int usb_dc_ep_disable(const uint8_t ep)
733 {
734 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
735
736 LOG_DBG("ep 0x%02x", ep);
737
738 if (!ep_state) {
739 return -EINVAL;
740 }
741
742 /* EP0 doesn't have an ep_ctl */
743 if (!ep_state->ep_ctl) {
744 return 0;
745 }
746
747 /* If this endpoint has previously been used and e.g. the host application
748 * crashed, the endpoint may remain locked even after reconfiguration
749 * because the write semaphore is never given back.
750 * udc_rpi_cancel_endpoint() handles this so the endpoint can be written again.
751 */
752 udc_rpi_cancel_endpoint(ep);
753
754 uint8_t val = *ep_state->ep_ctl & ~EP_CTRL_ENABLE_BITS;
755
756 *ep_state->ep_ctl = val;
757
758 return 0;
759 }
760
usb_dc_ep_write(const uint8_t ep,const uint8_t * const data,const uint32_t data_len,uint32_t * const ret_bytes)761 int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
762 const uint32_t data_len, uint32_t *const ret_bytes)
763 {
764 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
765 uint32_t len = data_len;
766 int ret = 0;
767
768 LOG_DBG("ep 0x%02x, len %u", ep, data_len);
769
770 if (!ep_state || !USB_EP_DIR_IS_IN(ep)) {
771 LOG_ERR("invalid ep 0x%02x", ep);
772 return -EINVAL;
773 }
774
775 if (ep == USB_CONTROL_EP_IN && state.abort_control_writes) {
776 /* If abort_control_writes is high, it means the setup packet has not
777 * yet been consumed by the thread, which means that this write
778 * is part of a previous control transfer, which now must be
779 * aborted.
780 */
781
782 if (ret_bytes != NULL) {
783 *ret_bytes = len;
784 }
785
786 return 0;
787 }
788
789 if (ep == USB_CONTROL_EP_IN && len > USB_MAX_CTRL_MPS) {
790 len = USB_MAX_CTRL_MPS;
791 } else if (len > ep_state->mps) {
792 len = ep_state->mps;
793 }
794
795 ret = k_sem_take(&ep_state->write_sem, K_NO_WAIT);
796 if (ret) {
797 return -EAGAIN;
798 }
799
800 if (!k_is_in_isr()) {
801 irq_disable(USB_IRQ);
802 }
803
804 ret = udc_rpi_start_xfer(ep, data, len);
805
806 if (ret < 0) {
807 k_sem_give(&ep_state->write_sem);
808 ret = -EIO;
809 }
810
811 if (!k_is_in_isr()) {
812 irq_enable(USB_IRQ);
813 }
814
815 if (ret >= 0 && ret_bytes != NULL) {
816 *ret_bytes = len;
817 }
818
819 return ret;
820 }
821
udc_rpi_get_ep_buffer_len(const uint8_t ep)822 uint32_t udc_rpi_get_ep_buffer_len(const uint8_t ep)
823 {
824 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
825 uint32_t buf_ctl = *ep_state->buf_ctl;
826
827 return buf_ctl & USB_BUF_CTRL_LEN_MASK;
828 }
829
usb_dc_ep_read_wait(uint8_t ep,uint8_t * data,uint32_t max_data_len,uint32_t * read_bytes)830 int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data,
831 uint32_t max_data_len, uint32_t *read_bytes)
832 {
833 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
834 uint32_t read_count;
835
836 if (!ep_state) {
837 LOG_ERR("Invalid Endpoint %x", ep);
838 return -EINVAL;
839 }
840
841 if (!USB_EP_DIR_IS_OUT(ep)) {
842 LOG_ERR("Wrong endpoint direction: 0x%02x", ep);
843 return -EINVAL;
844 }
845
846 if (ep == USB_CONTROL_EP_OUT && state.setup_available) {
847 read_count = sizeof(struct usb_setup_packet);
848 if (read_count != max_data_len) {
849 LOG_WRN("Attempting to read setup packet with the wrong length"
850 " (expected: %d, read: %d)", read_count, max_data_len);
851 }
852 } else {
853 read_count = udc_rpi_get_ep_buffer_len(ep) - ep_state->read_offset;
854 }
855
856 LOG_DBG("ep 0x%02x, %u bytes, %u+%u, %p", ep, max_data_len, ep_state->read_offset,
857 read_count, (void *)data);
858
859 if (data) {
860 read_count = MIN(read_count, max_data_len);
861
862 if (ep == USB_CONTROL_EP_OUT && state.setup_available) {
863 memcpy(data, (const void *)&usb_dpram->setup_packet, read_count);
864 } else {
865 memcpy(data, ep_state->buf + ep_state->read_offset, read_count);
866 }
867
868 ep_state->read_offset += read_count;
869 } else if (max_data_len) {
870 LOG_ERR("Wrong arguments");
871 }
872
873 if (read_bytes) {
874 *read_bytes = read_count;
875 }
876
877 return 0;
878 }
879
usb_dc_control_ep_read_continue(const struct udc_rpi_ep_state * const ep_state,bool * const arm_out_endpoint)880 static int usb_dc_control_ep_read_continue(const struct udc_rpi_ep_state *const ep_state,
881 bool *const arm_out_endpoint)
882 {
883 const struct usb_setup_packet *const setup = (const void *)&usb_dpram->setup_packet;
884
885 if (state.setup_available) {
886 LOG_DBG("EP0 setup (wLength=%d, is_to_device=%d)",
887 setup->wLength, usb_reqtype_is_to_device(setup));
888 if (setup->wLength != 0U) {
889 /* In the case of a control transfer, we want to prime the OUT endpoint
890 * exactly once, to either:
891 * 1) in the to_device case, to receive the data (only if wLength is not 0)
892 * 2) in the to_host case, to receive a 0-length status stage transfer
893 * (only valid if wLength is not 0)
894 * Note that when wLength = 0, the status stage transfer is always an IN
895 * type so we don't need to consider that case.
896 */
897 *arm_out_endpoint = true;
898 state.control_out_ep_rcvd = 0;
899 }
900
901 state.setup_available = false;
902 } else {
903 const size_t len = udc_rpi_get_ep_buffer_len(USB_CONTROL_EP_OUT);
904
905 LOG_DBG("Control OUT received %u offset: %u",
906 len, ep_state->read_offset);
907 if (usb_reqtype_is_to_device(setup)) {
908 if (state.control_out_ep_rcvd + ep_state->read_offset < setup->wLength) {
909 /* If no more data in the buffer, but we're still waiting
910 * for more, start a new read transaction.
911 */
912 if (len == ep_state->read_offset) {
913 state.control_out_ep_rcvd += ep_state->read_offset;
914 *arm_out_endpoint = true;
915 }
916 }
917 }
918 }
919 return 0;
920 }
921
usb_dc_ep_read_continue(const uint8_t ep)922 int usb_dc_ep_read_continue(const uint8_t ep)
923 {
924 const struct udc_rpi_ep_state *const ep_state = udc_rpi_get_ep_state(ep);
925 bool arm_out_endpoint = false;
926
927 if (!ep_state || !USB_EP_DIR_IS_OUT(ep)) {
928 LOG_ERR("Not valid endpoint: %02x", ep);
929 return -EINVAL;
930 }
931 if (ep == USB_CONTROL_EP_OUT) {
932 int ret = usb_dc_control_ep_read_continue(ep_state, &arm_out_endpoint);
933
934 if (ret != 0) {
935 return ret;
936 }
937 } else {
938 const size_t len = udc_rpi_get_ep_buffer_len(ep);
939
940 LOG_DBG("Endpoint 0x%02x received %u offset: %u",
941 ep, len, ep_state->read_offset);
942 /* If no more data in the buffer, start a new read transaction. */
943 if (len == ep_state->read_offset) {
944 arm_out_endpoint = true;
945 }
946 }
947
948 if (arm_out_endpoint) {
949 LOG_DBG("Arming endpoint 0x%02x", ep);
950 return usb_dc_ep_start_read(ep, DATA_BUFFER_SIZE);
951 } else {
952 LOG_DBG("Not arming endpoint 0x%02x", ep);
953 }
954
955 return 0;
956 }
957
usb_dc_ep_read(const uint8_t ep,uint8_t * const data,const uint32_t max_data_len,uint32_t * const read_bytes)958 int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
959 const uint32_t max_data_len, uint32_t *const read_bytes)
960 {
961 if (usb_dc_ep_read_wait(ep, data, max_data_len, read_bytes) != 0) {
962 return -EINVAL;
963 }
964
965 if (!max_data_len) {
966 return 0;
967 }
968
969 if (usb_dc_ep_read_continue(ep) != 0) {
970 return -EINVAL;
971 }
972
973 return 0;
974 }
975
usb_dc_ep_halt(const uint8_t ep)976 int usb_dc_ep_halt(const uint8_t ep)
977 {
978 return usb_dc_ep_set_stall(ep);
979 }
980
usb_dc_ep_flush(const uint8_t ep)981 int usb_dc_ep_flush(const uint8_t ep)
982 {
983 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
984
985 if (!ep_state) {
986 return -EINVAL;
987 }
988
989 LOG_ERR("Not implemented");
990
991 return 0;
992 }
993
usb_dc_ep_mps(const uint8_t ep)994 int usb_dc_ep_mps(const uint8_t ep)
995 {
996 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(ep);
997
998 if (!ep_state) {
999 return -EINVAL;
1000 }
1001
1002 return ep_state->mps;
1003 }
1004
usb_dc_detach(void)1005 int usb_dc_detach(void)
1006 {
1007 LOG_ERR("Not implemented");
1008
1009 return 0;
1010 }
1011
usb_dc_reset(void)1012 int usb_dc_reset(void)
1013 {
1014 LOG_ERR("Not implemented");
1015
1016 return 0;
1017 }
1018
usb_dc_wakeup_request(void)1019 int usb_dc_wakeup_request(void)
1020 {
1021 LOG_DBG("Remote Wakeup");
1022 state.rwu_pending = true;
1023 hw_set_alias(usb_hw)->sie_ctrl = USB_SIE_CTRL_RESUME_BITS;
1024
1025 return 0;
1026 }
1027
1028 /*
1029 * This thread is only used to not run the USB device stack and endpoint
1030 * callbacks in the ISR context, which happens when an callback function
1031 * is called. TODO: something similar should be implemented in the USB
1032 * device stack so that it can be used by all drivers.
1033 */
udc_rpi_thread_main(void * arg1,void * unused1,void * unused2)1034 static void udc_rpi_thread_main(void *arg1, void *unused1, void *unused2)
1035 {
1036 ARG_UNUSED(arg1);
1037 ARG_UNUSED(unused1);
1038 ARG_UNUSED(unused2);
1039 struct cb_msg msg;
1040
1041 while (true) {
1042 k_msgq_get(&usb_dc_msgq, &msg, K_FOREVER);
1043
1044 if (msg.ep_event) {
1045 struct udc_rpi_ep_state *ep_state = udc_rpi_get_ep_state(msg.ep);
1046
1047 if (msg.type == USB_DC_EP_SETUP) {
1048 state.abort_control_writes = false;
1049 state.setup_available = true;
1050 }
1051
1052 if (ep_state->cb) {
1053 ep_state->cb(msg.ep, msg.type);
1054 }
1055 } else {
1056 if (state.status_cb) {
1057 state.status_cb(msg.type, NULL);
1058 }
1059 }
1060 }
1061 }
1062
usb_rpi_init(void)1063 static int usb_rpi_init(void)
1064 {
1065 int ret;
1066
1067 k_thread_create(&thread, thread_stack,
1068 USBD_THREAD_STACK_SIZE,
1069 udc_rpi_thread_main, NULL, NULL, NULL,
1070 K_PRIO_COOP(2), 0, K_NO_WAIT);
1071 k_thread_name_set(&thread, "usb_rpi");
1072
1073 ret = clock_control_on(CLK_DRV, CLK_ID);
1074 if (ret < 0) {
1075 return ret;
1076 }
1077
1078 return 0;
1079 }
1080
1081 SYS_INIT(usb_rpi_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
1082
