1 /*
2 * Copyright (c) 2023 Nordic Semiconductor ASA
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 #define DT_DRV_COMPAT nordic_npm1300_regulator
7
8 #include <errno.h>
9 #include <string.h>
10
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/regulator.h>
13 #include <zephyr/drivers/mfd/npm1300.h>
14 #include <zephyr/dt-bindings/regulator/npm1300.h>
15 #include <zephyr/sys/linear_range.h>
16 #include <zephyr/sys/util.h>
17
18 /* nPM1300 voltage sources */
19 enum npm1300_sources {
20 NPM1300_SOURCE_BUCK1,
21 NPM1300_SOURCE_BUCK2,
22 NPM1300_SOURCE_LDO1,
23 NPM1300_SOURCE_LDO2,
24 };
25
26 /* nPM1300 gpio control channels */
27 enum npm1300_gpio_type {
28 NPM1300_GPIO_TYPE_ENABLE,
29 NPM1300_GPIO_TYPE_RETENTION,
30 NPM1300_GPIO_TYPE_PWM
31 };
32
33 /* nPM1300 regulator base addresses */
34 #define BUCK_BASE 0x04U
35 #define LDSW_BASE 0x08U
36 #define SHIP_BASE 0x0BU
37
38 /* nPM1300 regulator register offsets */
39 #define BUCK_OFFSET_EN_SET 0x00U
40 #define BUCK_OFFSET_EN_CLR 0x01U
41 #define BUCK_OFFSET_PWM_SET 0x04U
42 #define BUCK_OFFSET_PWM_CLR 0x05U
43 #define BUCK_OFFSET_VOUT_NORM 0x08U
44 #define BUCK_OFFSET_VOUT_RET 0x09U
45 #define BUCK_OFFSET_EN_CTRL 0x0CU
46 #define BUCK_OFFSET_VRET_CTRL 0x0DU
47 #define BUCK_OFFSET_PWM_CTRL 0x0EU
48 #define BUCK_OFFSET_SW_CTRL 0x0FU
49 #define BUCK_OFFSET_VOUT_STAT 0x10U
50 #define BUCK_OFFSET_CTRL0 0x15U
51 #define BUCK_OFFSET_STATUS 0x34U
52
53 /* nPM1300 ldsw register offsets */
54 #define LDSW_OFFSET_EN_SET 0x00U
55 #define LDSW_OFFSET_EN_CLR 0x01U
56 #define LDSW_OFFSET_STATUS 0x04U
57 #define LDSW_OFFSET_GPISEL 0x05U
58 #define LDSW_OFFSET_CONFIG 0x07U
59 #define LDSW_OFFSET_LDOSEL 0x08U
60 #define LDSW_OFFSET_VOUTSEL 0x0CU
61
62 /* nPM1300 ship register offsets */
63 #define SHIP_OFFSET_SHIP 0x02U
64
65 #define BUCK1_ON_MASK 0x04U
66 #define BUCK2_ON_MASK 0x40U
67
68 #define LDSW1_ON_MASK 0x03U
69 #define LDSW2_ON_MASK 0x0CU
70
71 #define LDSW1_SOFTSTART_MASK 0x0CU
72 #define LDSW1_SOFTSTART_SHIFT 2U
73 #define LDSW2_SOFTSTART_MASK 0x30U
74 #define LDSW2_SOFTSTART_SHIFT 4U
75
76 struct regulator_npm1300_pconfig {
77 const struct device *mfd;
78 struct gpio_dt_spec dvs_state_pins[5];
79 };
80
81 struct regulator_npm1300_config {
82 struct regulator_common_config common;
83 const struct device *mfd;
84 uint8_t source;
85 int32_t retention_uv;
86 struct gpio_dt_spec enable_gpios;
87 struct gpio_dt_spec retention_gpios;
88 struct gpio_dt_spec pwm_gpios;
89 uint8_t soft_start;
90 };
91
92 struct regulator_npm1300_data {
93 struct regulator_common_data data;
94 };
95
96 /* Linear range for output voltage, common for all bucks and LDOs on this device */
97 static const struct linear_range buckldo_range = LINEAR_RANGE_INIT(1000000, 100000, 0U, 23U);
98
regulator_npm1300_count_voltages(const struct device * dev)99 unsigned int regulator_npm1300_count_voltages(const struct device *dev)
100 {
101 const struct regulator_npm1300_config *config = dev->config;
102
103 switch (config->source) {
104 case NPM1300_SOURCE_BUCK1:
105 case NPM1300_SOURCE_BUCK2:
106 case NPM1300_SOURCE_LDO1:
107 case NPM1300_SOURCE_LDO2:
108 return linear_range_values_count(&buckldo_range);
109 default:
110 return 0;
111 }
112 }
113
regulator_npm1300_list_voltage(const struct device * dev,unsigned int idx,int32_t * volt_uv)114 int regulator_npm1300_list_voltage(const struct device *dev, unsigned int idx, int32_t *volt_uv)
115 {
116 const struct regulator_npm1300_config *config = dev->config;
117
118 switch (config->source) {
119 case NPM1300_SOURCE_BUCK1:
120 case NPM1300_SOURCE_BUCK2:
121 case NPM1300_SOURCE_LDO1:
122 case NPM1300_SOURCE_LDO2:
123 return linear_range_get_value(&buckldo_range, idx, volt_uv);
124 default:
125 return -EINVAL;
126 }
127 }
128
retention_set_voltage(const struct device * dev,int32_t retention_uv)129 static int retention_set_voltage(const struct device *dev, int32_t retention_uv)
130 {
131 const struct regulator_npm1300_config *config = dev->config;
132 uint16_t idx;
133 uint8_t chan;
134 int ret;
135
136 switch (config->source) {
137 case NPM1300_SOURCE_BUCK1:
138 chan = 0U;
139 break;
140 case NPM1300_SOURCE_BUCK2:
141 chan = 1U;
142 break;
143 default:
144 return -ENOTSUP;
145 }
146
147 ret = linear_range_get_win_index(&buckldo_range, retention_uv, retention_uv, &idx);
148
149 if (ret == -EINVAL) {
150 return ret;
151 }
152
153 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_RET + (chan * 2U),
154 idx);
155 }
156
buck_get_voltage_index(const struct device * dev,uint8_t chan,uint8_t * idx)157 static int buck_get_voltage_index(const struct device *dev, uint8_t chan, uint8_t *idx)
158 {
159 const struct regulator_npm1300_config *config = dev->config;
160 uint8_t sel;
161 int ret;
162
163 ret = mfd_npm1300_reg_read(config->mfd, BUCK_BASE, BUCK_OFFSET_SW_CTRL, &sel);
164
165 if (ret < 0) {
166 return ret;
167 }
168
169 if ((sel >> chan) & 1U) {
170 /* SW control */
171 return mfd_npm1300_reg_read(config->mfd, BUCK_BASE,
172 BUCK_OFFSET_VOUT_NORM + (chan * 2U), idx);
173 }
174
175 /* VSET pin control */
176 return mfd_npm1300_reg_read(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_STAT + chan, idx);
177 }
178
buck_set_voltage(const struct device * dev,uint8_t chan,int32_t min_uv,int32_t max_uv)179 static int buck_set_voltage(const struct device *dev, uint8_t chan, int32_t min_uv, int32_t max_uv)
180 {
181 const struct regulator_npm1300_config *config = dev->config;
182 uint8_t mask;
183 uint8_t curr_idx;
184 uint16_t idx;
185 int ret;
186
187 ret = linear_range_get_win_index(&buckldo_range, min_uv, max_uv, &idx);
188
189 if (ret == -EINVAL) {
190 return ret;
191 }
192
193 /* Get current setting, and return if current and new index match */
194 ret = buck_get_voltage_index(dev, chan, &curr_idx);
195
196 if ((ret < 0) || (idx == curr_idx)) {
197 return ret;
198 }
199
200 ret = mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_VOUT_NORM + (chan * 2U),
201 idx);
202
203 if (ret < 0) {
204 return ret;
205 }
206
207 /* Enable SW control of buck output */
208 mask = BIT(chan);
209 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_SW_CTRL, mask, mask);
210 }
211
ldo_set_voltage(const struct device * dev,uint8_t chan,int32_t min_uv,int32_t max_uv)212 static int ldo_set_voltage(const struct device *dev, uint8_t chan, int32_t min_uv, int32_t max_uv)
213 {
214 const struct regulator_npm1300_config *config = dev->config;
215 uint16_t idx;
216 int ret;
217
218 ret = linear_range_get_win_index(&buckldo_range, min_uv, max_uv, &idx);
219
220 if (ret == -EINVAL) {
221 return ret;
222 }
223
224 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_VOUTSEL + chan, idx);
225 }
226
regulator_npm1300_set_voltage(const struct device * dev,int32_t min_uv,int32_t max_uv)227 int regulator_npm1300_set_voltage(const struct device *dev, int32_t min_uv, int32_t max_uv)
228 {
229 const struct regulator_npm1300_config *config = dev->config;
230
231 switch (config->source) {
232 case NPM1300_SOURCE_BUCK1:
233 return buck_set_voltage(dev, 0, min_uv, max_uv);
234 case NPM1300_SOURCE_BUCK2:
235 return buck_set_voltage(dev, 1, min_uv, max_uv);
236 case NPM1300_SOURCE_LDO1:
237 return ldo_set_voltage(dev, 0, min_uv, max_uv);
238 case NPM1300_SOURCE_LDO2:
239 return ldo_set_voltage(dev, 1, min_uv, max_uv);
240 default:
241 return -ENODEV;
242 }
243 }
244
buck_get_voltage(const struct device * dev,uint8_t chan,int32_t * volt_uv)245 static int buck_get_voltage(const struct device *dev, uint8_t chan, int32_t *volt_uv)
246 {
247 uint8_t idx;
248 int ret;
249
250 ret = buck_get_voltage_index(dev, chan, &idx);
251
252 if (ret < 0) {
253 return ret;
254 }
255
256 return linear_range_get_value(&buckldo_range, idx, volt_uv);
257 }
258
ldo_get_voltage(const struct device * dev,uint8_t chan,int32_t * volt_uv)259 static int ldo_get_voltage(const struct device *dev, uint8_t chan, int32_t *volt_uv)
260 {
261 const struct regulator_npm1300_config *config = dev->config;
262 uint8_t idx;
263 int ret;
264
265 ret = mfd_npm1300_reg_read(config->mfd, LDSW_BASE, LDSW_OFFSET_VOUTSEL + chan, &idx);
266
267 if (ret < 0) {
268 return ret;
269 }
270
271 return linear_range_get_value(&buckldo_range, idx, volt_uv);
272 }
273
regulator_npm1300_get_voltage(const struct device * dev,int32_t * volt_uv)274 int regulator_npm1300_get_voltage(const struct device *dev, int32_t *volt_uv)
275 {
276 const struct regulator_npm1300_config *config = dev->config;
277
278 switch (config->source) {
279 case NPM1300_SOURCE_BUCK1:
280 return buck_get_voltage(dev, 0, volt_uv);
281 case NPM1300_SOURCE_BUCK2:
282 return buck_get_voltage(dev, 1, volt_uv);
283 case NPM1300_SOURCE_LDO1:
284 return ldo_get_voltage(dev, 0, volt_uv);
285 case NPM1300_SOURCE_LDO2:
286 return ldo_get_voltage(dev, 1, volt_uv);
287 default:
288 return -ENODEV;
289 }
290 }
291
set_buck_mode(const struct device * dev,uint8_t chan,regulator_mode_t mode)292 static int set_buck_mode(const struct device *dev, uint8_t chan, regulator_mode_t mode)
293 {
294 const struct regulator_npm1300_config *config = dev->config;
295 uint8_t pfm_mask = BIT(chan);
296 uint8_t pfm_data;
297 uint8_t pwm_reg;
298 int ret;
299
300 switch (mode) {
301 case NPM1300_BUCK_MODE_PWM:
302 pfm_data = 0U;
303 pwm_reg = BUCK_OFFSET_PWM_SET;
304 break;
305 case NPM1300_BUCK_MODE_AUTO:
306 pfm_data = 0U;
307 pwm_reg = BUCK_OFFSET_PWM_CLR;
308 break;
309 case NPM1300_BUCK_MODE_PFM:
310 pfm_data = pfm_mask;
311 pwm_reg = BUCK_OFFSET_PWM_CLR;
312 break;
313 default:
314 return -ENOTSUP;
315 }
316
317 ret = mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_CTRL0, pfm_data, pfm_mask);
318 if (ret < 0) {
319 return ret;
320 }
321
322 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, pwm_reg + (chan * 2U), 1U);
323 }
324
set_ldsw_mode(const struct device * dev,uint8_t chan,regulator_mode_t mode)325 static int set_ldsw_mode(const struct device *dev, uint8_t chan, regulator_mode_t mode)
326 {
327 const struct regulator_npm1300_config *config = dev->config;
328
329 switch (mode) {
330 case NPM1300_LDSW_MODE_LDO:
331 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_LDOSEL + chan, 1U);
332 case NPM1300_LDSW_MODE_LDSW:
333 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_LDOSEL + chan, 0U);
334 default:
335 return -ENOTSUP;
336 }
337 }
338
regulator_npm1300_set_mode(const struct device * dev,regulator_mode_t mode)339 int regulator_npm1300_set_mode(const struct device *dev, regulator_mode_t mode)
340 {
341 const struct regulator_npm1300_config *config = dev->config;
342
343 switch (config->source) {
344 case NPM1300_SOURCE_BUCK1:
345 return set_buck_mode(dev, 0, mode);
346 case NPM1300_SOURCE_BUCK2:
347 return set_buck_mode(dev, 1, mode);
348 case NPM1300_SOURCE_LDO1:
349 return set_ldsw_mode(dev, 0, mode);
350 case NPM1300_SOURCE_LDO2:
351 return set_ldsw_mode(dev, 1, mode);
352 default:
353 return -ENOTSUP;
354 }
355 }
356
regulator_npm1300_enable(const struct device * dev)357 int regulator_npm1300_enable(const struct device *dev)
358 {
359 const struct regulator_npm1300_config *config = dev->config;
360
361 switch (config->source) {
362 case NPM1300_SOURCE_BUCK1:
363 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_SET, 1U);
364 case NPM1300_SOURCE_BUCK2:
365 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_SET + 2U, 1U);
366 case NPM1300_SOURCE_LDO1:
367 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_SET, 1U);
368 case NPM1300_SOURCE_LDO2:
369 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_SET + 2U, 1U);
370 default:
371 return 0;
372 }
373 }
374
regulator_npm1300_disable(const struct device * dev)375 int regulator_npm1300_disable(const struct device *dev)
376 {
377 const struct regulator_npm1300_config *config = dev->config;
378
379 switch (config->source) {
380 case NPM1300_SOURCE_BUCK1:
381 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CLR, 1U);
382 case NPM1300_SOURCE_BUCK2:
383 return mfd_npm1300_reg_write(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CLR + 2U, 1U);
384 case NPM1300_SOURCE_LDO1:
385 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_CLR, 1U);
386 case NPM1300_SOURCE_LDO2:
387 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_EN_CLR + 2U, 1U);
388 default:
389 return 0;
390 }
391 }
392
regulator_npm1300_set_buck_pin_ctrl(const struct device * dev,uint8_t chan,uint8_t pin,uint8_t inv,enum npm1300_gpio_type type)393 static int regulator_npm1300_set_buck_pin_ctrl(const struct device *dev, uint8_t chan, uint8_t pin,
394 uint8_t inv, enum npm1300_gpio_type type)
395 {
396 const struct regulator_npm1300_config *config = dev->config;
397 uint8_t ctrl;
398 uint8_t mask;
399
400 switch (chan) {
401 case 0:
402 /* Invert control in bit 6, pin control in bits 2-0 */
403 ctrl = (inv << 6U) | (pin + 1U);
404 mask = BIT(6U) | BIT_MASK(3U);
405 break;
406 case 1:
407 /* Invert control in bit 7, pin control in bits 5-3 */
408 ctrl = (inv << 7U) | ((pin + 1U) << 3U);
409 mask = BIT(7U) | (BIT_MASK(3U) << 3U);
410 break;
411 default:
412 return -EINVAL;
413 }
414
415 switch (type) {
416 case NPM1300_GPIO_TYPE_ENABLE:
417 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_EN_CTRL, ctrl,
418 mask);
419 case NPM1300_GPIO_TYPE_PWM:
420 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_PWM_CTRL, ctrl,
421 mask);
422 case NPM1300_GPIO_TYPE_RETENTION:
423 return mfd_npm1300_reg_update(config->mfd, BUCK_BASE, BUCK_OFFSET_VRET_CTRL, ctrl,
424 mask);
425 default:
426 return -ENOTSUP;
427 }
428 }
429
regulator_npm1300_set_ldsw_pin_ctrl(const struct device * dev,uint8_t chan,uint8_t pin,uint8_t inv,enum npm1300_gpio_type type)430 static int regulator_npm1300_set_ldsw_pin_ctrl(const struct device *dev, uint8_t chan, uint8_t pin,
431 uint8_t inv, enum npm1300_gpio_type type)
432 {
433 const struct regulator_npm1300_config *config = dev->config;
434 uint8_t ctrl;
435
436 if (type != NPM1300_GPIO_TYPE_ENABLE) {
437 return -ENOTSUP;
438 }
439
440 ctrl = (pin + 1U) | (inv << 3U);
441
442 return mfd_npm1300_reg_write(config->mfd, LDSW_BASE, LDSW_OFFSET_GPISEL + chan, ctrl);
443 }
444
regulator_npm1300_set_pin_ctrl(const struct device * dev,const struct gpio_dt_spec * spec,enum npm1300_gpio_type type)445 int regulator_npm1300_set_pin_ctrl(const struct device *dev, const struct gpio_dt_spec *spec,
446 enum npm1300_gpio_type type)
447 {
448 const struct regulator_npm1300_config *config = dev->config;
449 uint8_t inv;
450
451 if (spec->port == NULL) {
452 return 0;
453 }
454
455 inv = (spec->dt_flags & GPIO_ACTIVE_LOW) != 0U;
456
457 switch (config->source) {
458 case NPM1300_SOURCE_BUCK1:
459 return regulator_npm1300_set_buck_pin_ctrl(dev, 0, spec->pin, inv, type);
460 case NPM1300_SOURCE_BUCK2:
461 return regulator_npm1300_set_buck_pin_ctrl(dev, 1, spec->pin, inv, type);
462 case NPM1300_SOURCE_LDO1:
463 return regulator_npm1300_set_ldsw_pin_ctrl(dev, 0, spec->pin, inv, type);
464 case NPM1300_SOURCE_LDO2:
465 return regulator_npm1300_set_ldsw_pin_ctrl(dev, 1, spec->pin, inv, type);
466 default:
467 return -ENODEV;
468 }
469 }
470
regulator_npm1300_dvs_state_set(const struct device * dev,regulator_dvs_state_t state)471 int regulator_npm1300_dvs_state_set(const struct device *dev, regulator_dvs_state_t state)
472 {
473 const struct regulator_npm1300_pconfig *pconfig = dev->config;
474 const struct gpio_dt_spec *spec;
475 int ret;
476
477 for (size_t idx = 0U; idx < 5U; idx++) {
478 spec = &pconfig->dvs_state_pins[idx];
479
480 if (spec->port != NULL) {
481 ret = gpio_pin_set_dt(spec, ((state >> idx) & 1U) != 0U);
482
483 if (ret != 0) {
484 return ret;
485 }
486 }
487 }
488
489 return 0;
490 }
491
regulator_npm1300_ship_mode(const struct device * dev)492 int regulator_npm1300_ship_mode(const struct device *dev)
493 {
494 const struct regulator_npm1300_pconfig *pconfig = dev->config;
495
496 return mfd_npm1300_reg_write(pconfig->mfd, SHIP_BASE, SHIP_OFFSET_SHIP, 1U);
497 }
498
499 static const struct regulator_parent_driver_api parent_api = {
500 .dvs_state_set = regulator_npm1300_dvs_state_set,
501 .ship_mode = regulator_npm1300_ship_mode,
502 };
503
regulator_npm1300_common_init(const struct device * dev)504 int regulator_npm1300_common_init(const struct device *dev)
505 {
506 const struct regulator_npm1300_pconfig *pconfig = dev->config;
507 const struct gpio_dt_spec *spec;
508 int ret;
509
510 for (size_t idx = 0U; idx < 5U; idx++) {
511 spec = &pconfig->dvs_state_pins[idx];
512
513 if (spec->port != NULL) {
514 if (!gpio_is_ready_dt(spec)) {
515 return -ENODEV;
516 }
517
518 ret = gpio_pin_configure_dt(spec, GPIO_OUTPUT);
519 if (ret != 0) {
520 return ret;
521 }
522 }
523 }
524
525 return 0;
526 }
527
get_enabled_reg(const struct device * dev,uint8_t base,uint8_t offset,uint8_t mask,bool * enabled)528 static int get_enabled_reg(const struct device *dev, uint8_t base, uint8_t offset, uint8_t mask,
529 bool *enabled)
530 {
531 const struct regulator_npm1300_config *config = dev->config;
532 uint8_t data;
533
534 int ret = mfd_npm1300_reg_read(config->mfd, base, offset, &data);
535
536 if (ret != 0) {
537 return ret;
538 }
539
540 *enabled = (data & mask) != 0U;
541
542 return 0;
543 }
544
get_enabled(const struct device * dev,bool * enabled)545 static int get_enabled(const struct device *dev, bool *enabled)
546 {
547 const struct regulator_npm1300_config *config = dev->config;
548
549 switch (config->source) {
550 case NPM1300_SOURCE_BUCK1:
551 return get_enabled_reg(dev, BUCK_BASE, BUCK_OFFSET_STATUS, BUCK1_ON_MASK, enabled);
552 case NPM1300_SOURCE_BUCK2:
553 return get_enabled_reg(dev, BUCK_BASE, BUCK_OFFSET_STATUS, BUCK2_ON_MASK, enabled);
554 case NPM1300_SOURCE_LDO1:
555 return get_enabled_reg(dev, LDSW_BASE, LDSW_OFFSET_STATUS, LDSW1_ON_MASK, enabled);
556 case NPM1300_SOURCE_LDO2:
557 return get_enabled_reg(dev, LDSW_BASE, LDSW_OFFSET_STATUS, LDSW2_ON_MASK, enabled);
558 default:
559 return -ENODEV;
560 }
561 }
562
soft_start_set(const struct device * dev,uint8_t soft_start)563 static int soft_start_set(const struct device *dev, uint8_t soft_start)
564 {
565 const struct regulator_npm1300_config *config = dev->config;
566
567 switch (config->source) {
568 case NPM1300_SOURCE_LDO1:
569 return mfd_npm1300_reg_update(config->mfd, LDSW_BASE, LDSW_OFFSET_CONFIG,
570 soft_start << LDSW1_SOFTSTART_SHIFT,
571 LDSW1_SOFTSTART_MASK);
572 case NPM1300_SOURCE_LDO2:
573 return mfd_npm1300_reg_update(config->mfd, LDSW_BASE, LDSW_OFFSET_CONFIG,
574 soft_start << LDSW2_SOFTSTART_SHIFT,
575 LDSW2_SOFTSTART_MASK);
576 default:
577 return -ENOTSUP;
578 }
579 }
580
regulator_npm1300_init(const struct device * dev)581 int regulator_npm1300_init(const struct device *dev)
582 {
583 const struct regulator_npm1300_config *config = dev->config;
584 bool enabled;
585 int ret = 0;
586
587 if (!device_is_ready(config->mfd)) {
588 return -ENODEV;
589 }
590
591 ret = get_enabled(dev, &enabled);
592 if (ret < 0) {
593 return ret;
594 }
595
596 ret = regulator_common_init(dev, enabled);
597 if (ret < 0) {
598 return ret;
599 }
600
601 /* Configure retention voltage */
602 if (config->retention_uv != 0) {
603 ret = retention_set_voltage(dev, config->retention_uv);
604 if (ret != 0) {
605 return ret;
606 }
607 }
608
609 /* Configure soft start */
610 if (config->soft_start != UINT8_MAX) {
611 ret = soft_start_set(dev, config->soft_start);
612 if (ret != 0) {
613 return ret;
614 }
615 }
616
617 /* Configure GPIO pin control */
618 ret = regulator_npm1300_set_pin_ctrl(dev, &config->enable_gpios, NPM1300_GPIO_TYPE_ENABLE);
619 if (ret != 0) {
620 return ret;
621 }
622
623 ret = regulator_npm1300_set_pin_ctrl(dev, &config->retention_gpios,
624 NPM1300_GPIO_TYPE_RETENTION);
625 if (ret != 0) {
626 return ret;
627 }
628
629 ret = regulator_npm1300_set_pin_ctrl(dev, &config->pwm_gpios, NPM1300_GPIO_TYPE_PWM);
630 if (ret != 0) {
631 return ret;
632 }
633
634 return ret;
635 }
636
637 static const struct regulator_driver_api api = {.enable = regulator_npm1300_enable,
638 .disable = regulator_npm1300_disable,
639 .count_voltages = regulator_npm1300_count_voltages,
640 .list_voltage = regulator_npm1300_list_voltage,
641 .set_voltage = regulator_npm1300_set_voltage,
642 .get_voltage = regulator_npm1300_get_voltage,
643 .set_mode = regulator_npm1300_set_mode};
644
645 #define REGULATOR_NPM1300_DEFINE(node_id, id, _source) \
646 static struct regulator_npm1300_data data_##id; \
647 \
648 static const struct regulator_npm1300_config config_##id = { \
649 .common = REGULATOR_DT_COMMON_CONFIG_INIT(node_id), \
650 .mfd = DEVICE_DT_GET(DT_GPARENT(node_id)), \
651 .source = _source, \
652 .retention_uv = DT_PROP_OR(node_id, retention_microvolt, 0), \
653 .soft_start = DT_ENUM_IDX_OR(node_id, soft_start_microamp, UINT8_MAX), \
654 .enable_gpios = GPIO_DT_SPEC_GET_OR(node_id, enable_gpios, {0}), \
655 .retention_gpios = GPIO_DT_SPEC_GET_OR(node_id, retention_gpios, {0}), \
656 .pwm_gpios = GPIO_DT_SPEC_GET_OR(node_id, pwm_gpios, {0})}; \
657 \
658 DEVICE_DT_DEFINE(node_id, regulator_npm1300_init, NULL, &data_##id, &config_##id, \
659 POST_KERNEL, CONFIG_REGULATOR_NPM1300_INIT_PRIORITY, &api);
660
661 #define REGULATOR_NPM1300_DEFINE_COND(inst, child, source) \
662 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \
663 (REGULATOR_NPM1300_DEFINE(DT_INST_CHILD(inst, child), child##inst, source)), \
664 ())
665
666 #define REGULATOR_NPM1300_DEFINE_ALL(inst) \
667 static const struct regulator_npm1300_pconfig config_##inst = { \
668 .mfd = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
669 .dvs_state_pins = {GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 0, {0}), \
670 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 1, {0}), \
671 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 2, {0}), \
672 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 3, {0}), \
673 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, dvs_gpios, 4, {0})}}; \
674 \
675 DEVICE_DT_INST_DEFINE(inst, regulator_npm1300_common_init, NULL, NULL, &config_##inst, \
676 POST_KERNEL, CONFIG_REGULATOR_NPM1300_COMMON_INIT_PRIORITY, \
677 &parent_api); \
678 \
679 REGULATOR_NPM1300_DEFINE_COND(inst, buck1, NPM1300_SOURCE_BUCK1) \
680 REGULATOR_NPM1300_DEFINE_COND(inst, buck2, NPM1300_SOURCE_BUCK2) \
681 REGULATOR_NPM1300_DEFINE_COND(inst, ldo1, NPM1300_SOURCE_LDO1) \
682 REGULATOR_NPM1300_DEFINE_COND(inst, ldo2, NPM1300_SOURCE_LDO2)
683
684 DT_INST_FOREACH_STATUS_OKAY(REGULATOR_NPM1300_DEFINE_ALL)
685
