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/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.h537 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
567 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
651 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
734 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member