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/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h398 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
427 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
505 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
584 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h399 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
428 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
506 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
585 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h387 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
416 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
494 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
572 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h383 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
412 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
490 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
568 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h391 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
420 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
501 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
582 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h375 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
404 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
482 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
560 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/
Dfsl_clock.h407 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
436 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
514 …uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. … member
595 …uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h433 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
462 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
543 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
624 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/
Dfsl_clock.h415 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
444 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
522 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
603 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.h440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
469 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
550 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
631 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/
Dfsl_clock.h414 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
443 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
521 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
602 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_lpfll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h627 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
658 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
742 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
785 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
849 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_apll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h627 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
658 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
742 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
785 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
849 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_apll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h459 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
491 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
575 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
618 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h466 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
496 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
578 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
620 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h459 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
491 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
575 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
618 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h466 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
496 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
578 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
620 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h460 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
490 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
572 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_firc_enable_mode. */ member
614 uint8_t enableMode; /*!< Enable mode, OR'ed value of _scg_spll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/
Dfsl_clock.h1318 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_sosc_enable_mode. */ member
1334 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_fro_enable_mode. */ member
1349 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_lposc_enable_mode. */ member
1395 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1469 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/
Dfsl_clock.h1318 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_sosc_enable_mode. */ member
1334 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_fro_enable_mode. */ member
1349 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_lposc_enable_mode. */ member
1395 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1469 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/
Dfsl_clock.h1318 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_sosc_enable_mode. */ member
1334 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_fro_enable_mode. */ member
1349 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_lposc_enable_mode. */ member
1395 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1469 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/
Dfsl_clock.h1318 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_sosc_enable_mode. */ member
1334 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_fro_enable_mode. */ member
1349 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_lposc_enable_mode. */ member
1395 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1469 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/
Dfsl_clock.h1318 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_sosc_enable_mode. */ member
1334 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_fro_enable_mode. */ member
1349 uint32_t enableMode; /*!< Enable mode, OR'ed value of _cgc_lposc_enable_mode. */ member
1395 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1440 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
1469 uint8_t enableMode; /*!< Enable mode, OR'ed value of _cgc_pll_enable_mode */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/
Dfsl_clock.h455 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
490 scg_sirc_enable_mode_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
555 uint32_t enableMode; /*!< Enable mode. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/
Dfsl_clock.h425 uint32_t enableMode; /*!< Enable mode, OR'ed value of _scg_sosc_enable_mode. */ member
460 scg_sirc_enable_mode_t enableMode; /*!< Enable mode, OR'ed value of _scg_sirc_enable_mode. */ member
525 uint32_t enableMode; /*!< Enable mode. */ member

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