1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_SCTIMER_H_
9 #define FSL_SCTIMER_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup sctimer
15 * @{
16 */
17
18 /*! @file */
19
20 /*******************************************************************************
21 * Definitions
22 ******************************************************************************/
23
24 /*! @name Driver version */
25 /*! @{ */
26 #define FSL_SCTIMER_DRIVER_VERSION (MAKE_VERSION(2, 5, 1)) /*!< Version */
27 /*! @} */
28
29 #ifndef SCT_EV_STATE_STATEMSKn
30 #define SCT_EV_STATE_STATEMSKn(x) ((uint32_t)(x) & (((uint32_t)1UL << FSL_FEATURE_SCT_NUMBER_OF_STATES) - 1UL))
31 #endif
32
33 /*! @brief SCTimer PWM operation modes */
34 typedef enum _sctimer_pwm_mode
35 {
36 kSCTIMER_EdgeAlignedPwm = 0U, /*!< Edge-aligned PWM */
37 kSCTIMER_CenterAlignedPwm /*!< Center-aligned PWM */
38 } sctimer_pwm_mode_t;
39
40 /*! @brief SCTimer counters type. */
41 typedef enum _sctimer_counter
42 {
43 kSCTIMER_Counter_L = (1U << 0), /*!< 16-bit Low counter. */
44 kSCTIMER_Counter_H = (1U << 1), /*!< 16-bit High counter. */
45 kSCTIMER_Counter_U = (1U << 2), /*!< 32-bit Unified counter. */
46 } sctimer_counter_t;
47
48 /*! @brief List of SCTimer input pins */
49 typedef enum _sctimer_input
50 {
51 kSCTIMER_Input_0 = 0U, /*!< SCTIMER input 0 */
52 kSCTIMER_Input_1, /*!< SCTIMER input 1 */
53 kSCTIMER_Input_2, /*!< SCTIMER input 2 */
54 kSCTIMER_Input_3, /*!< SCTIMER input 3 */
55 kSCTIMER_Input_4, /*!< SCTIMER input 4 */
56 kSCTIMER_Input_5, /*!< SCTIMER input 5 */
57 kSCTIMER_Input_6, /*!< SCTIMER input 6 */
58 kSCTIMER_Input_7 /*!< SCTIMER input 7 */
59 } sctimer_input_t;
60
61 /*! @brief List of SCTimer output pins */
62 typedef enum _sctimer_out
63 {
64 kSCTIMER_Out_0 = 0U, /*!< SCTIMER output 0*/
65 kSCTIMER_Out_1, /*!< SCTIMER output 1 */
66 kSCTIMER_Out_2, /*!< SCTIMER output 2 */
67 kSCTIMER_Out_3, /*!< SCTIMER output 3 */
68 kSCTIMER_Out_4, /*!< SCTIMER output 4 */
69 kSCTIMER_Out_5, /*!< SCTIMER output 5 */
70 kSCTIMER_Out_6, /*!< SCTIMER output 6 */
71 kSCTIMER_Out_7, /*!< SCTIMER output 7 */
72 kSCTIMER_Out_8, /*!< SCTIMER output 8 */
73 kSCTIMER_Out_9 /*!< SCTIMER output 9 */
74 } sctimer_out_t;
75
76 /*! @brief SCTimer PWM output pulse mode: high-true, low-true or no output */
77 typedef enum _sctimer_pwm_level_select
78 {
79 kSCTIMER_LowTrue = 0U, /*!< Low true pulses */
80 kSCTIMER_HighTrue /*!< High true pulses */
81 } sctimer_pwm_level_select_t;
82
83 /*! @brief Options to configure a SCTimer PWM signal */
84 typedef struct _sctimer_pwm_signal_param
85 {
86 sctimer_out_t output; /*!< The output pin to use to generate the PWM signal */
87 sctimer_pwm_level_select_t level; /*!< PWM output active level select. */
88 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
89 0 = always inactive signal (0% duty cycle)
90 100 = always active signal (100% duty cycle).*/
91 } sctimer_pwm_signal_param_t;
92
93 /*! @brief SCTimer clock mode options */
94 typedef enum _sctimer_clock_mode
95 {
96 kSCTIMER_System_ClockMode = 0U, /*!< System Clock Mode */
97 kSCTIMER_Sampled_ClockMode, /*!< Sampled System Clock Mode */
98 kSCTIMER_Input_ClockMode, /*!< SCT Input Clock Mode */
99 kSCTIMER_Asynchronous_ClockMode /*!< Asynchronous Mode */
100 } sctimer_clock_mode_t;
101
102 /*! @brief SCTimer clock select options */
103 typedef enum _sctimer_clock_select
104 {
105 kSCTIMER_Clock_On_Rise_Input_0 = 0U, /*!< Rising edges on input 0 */
106 kSCTIMER_Clock_On_Fall_Input_0, /*!< Falling edges on input 0 */
107 kSCTIMER_Clock_On_Rise_Input_1, /*!< Rising edges on input 1 */
108 kSCTIMER_Clock_On_Fall_Input_1, /*!< Falling edges on input 1 */
109 kSCTIMER_Clock_On_Rise_Input_2, /*!< Rising edges on input 2 */
110 kSCTIMER_Clock_On_Fall_Input_2, /*!< Falling edges on input 2 */
111 kSCTIMER_Clock_On_Rise_Input_3, /*!< Rising edges on input 3 */
112 kSCTIMER_Clock_On_Fall_Input_3, /*!< Falling edges on input 3 */
113 kSCTIMER_Clock_On_Rise_Input_4, /*!< Rising edges on input 4 */
114 kSCTIMER_Clock_On_Fall_Input_4, /*!< Falling edges on input 4 */
115 kSCTIMER_Clock_On_Rise_Input_5, /*!< Rising edges on input 5 */
116 kSCTIMER_Clock_On_Fall_Input_5, /*!< Falling edges on input 5 */
117 kSCTIMER_Clock_On_Rise_Input_6, /*!< Rising edges on input 6 */
118 kSCTIMER_Clock_On_Fall_Input_6, /*!< Falling edges on input 6 */
119 kSCTIMER_Clock_On_Rise_Input_7, /*!< Rising edges on input 7 */
120 kSCTIMER_Clock_On_Fall_Input_7 /*!< Falling edges on input 7 */
121 } sctimer_clock_select_t;
122
123 /*!
124 * @brief SCTimer output conflict resolution options.
125 *
126 * Specifies what action should be taken if multiple events dictate that a given output should be
127 * both set and cleared at the same time
128 */
129 typedef enum _sctimer_conflict_resolution
130 {
131 kSCTIMER_ResolveNone = 0U, /*!< No change */
132 kSCTIMER_ResolveSet, /*!< Set output */
133 kSCTIMER_ResolveClear, /*!< Clear output */
134 kSCTIMER_ResolveToggle /*!< Toggle output */
135 } sctimer_conflict_resolution_t;
136
137 /*! @brief List of SCTimer event generation active direction when the counters are operating in BIDIR mode. */
138 typedef enum _sctimer_event_active_direction
139 {
140 kSCTIMER_ActiveIndependent = 0U, /*!< This event is triggered regardless of the count direction. */
141 kSCTIMER_ActiveInCountUp, /*!< This event is triggered only during up-counting when BIDIR = 1. */
142 kSCTIMER_ActiveInCountDown /*!< This event is triggered only during down-counting when BIDIR = 1. */
143 } sctimer_event_active_direction_t;
144
145 /*! @brief List of SCTimer event types */
146 typedef enum _sctimer_event
147 {
148 kSCTIMER_InputLowOrMatchEvent =
149 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
150 kSCTIMER_InputRiseOrMatchEvent =
151 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
152 kSCTIMER_InputFallOrMatchEvent =
153 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
154 kSCTIMER_InputHighOrMatchEvent =
155 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
156
157 kSCTIMER_MatchEventOnly =
158 (1 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
159
160 kSCTIMER_InputLowEvent =
161 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
162 kSCTIMER_InputRiseEvent =
163 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
164 kSCTIMER_InputFallEvent =
165 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
166 kSCTIMER_InputHighEvent =
167 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
168
169 kSCTIMER_InputLowAndMatchEvent =
170 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
171 kSCTIMER_InputRiseAndMatchEvent =
172 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
173 kSCTIMER_InputFallAndMatchEvent =
174 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
175 kSCTIMER_InputHighAndMatchEvent =
176 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (0 << SCT_EV_CTRL_OUTSEL_SHIFT),
177
178 kSCTIMER_OutputLowOrMatchEvent =
179 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
180 kSCTIMER_OutputRiseOrMatchEvent =
181 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
182 kSCTIMER_OutputFallOrMatchEvent =
183 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
184 kSCTIMER_OutputHighOrMatchEvent =
185 (0 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
186
187 kSCTIMER_OutputLowEvent =
188 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
189 kSCTIMER_OutputRiseEvent =
190 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
191 kSCTIMER_OutputFallEvent =
192 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
193 kSCTIMER_OutputHighEvent =
194 (2 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
195
196 kSCTIMER_OutputLowAndMatchEvent =
197 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (0 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
198 kSCTIMER_OutputRiseAndMatchEvent =
199 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (1 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
200 kSCTIMER_OutputFallAndMatchEvent =
201 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (2 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT),
202 kSCTIMER_OutputHighAndMatchEvent =
203 (3 << SCT_EV_CTRL_COMBMODE_SHIFT) + (3 << SCT_EV_CTRL_IOCOND_SHIFT) + (1 << SCT_EV_CTRL_OUTSEL_SHIFT)
204 } sctimer_event_t;
205
206 /*! @brief SCTimer callback typedef. */
207 typedef void (*sctimer_event_callback_t)(void);
208
209 /*! @brief List of SCTimer interrupts */
210 typedef enum _sctimer_interrupt_enable
211 {
212 kSCTIMER_Event0InterruptEnable = (1U << 0), /*!< Event 0 interrupt */
213 kSCTIMER_Event1InterruptEnable = (1U << 1), /*!< Event 1 interrupt */
214 kSCTIMER_Event2InterruptEnable = (1U << 2), /*!< Event 2 interrupt */
215 kSCTIMER_Event3InterruptEnable = (1U << 3), /*!< Event 3 interrupt */
216 kSCTIMER_Event4InterruptEnable = (1U << 4), /*!< Event 4 interrupt */
217 kSCTIMER_Event5InterruptEnable = (1U << 5), /*!< Event 5 interrupt */
218 kSCTIMER_Event6InterruptEnable = (1U << 6), /*!< Event 6 interrupt */
219 kSCTIMER_Event7InterruptEnable = (1U << 7), /*!< Event 7 interrupt */
220 kSCTIMER_Event8InterruptEnable = (1U << 8), /*!< Event 8 interrupt */
221 kSCTIMER_Event9InterruptEnable = (1U << 9), /*!< Event 9 interrupt */
222 kSCTIMER_Event10InterruptEnable = (1U << 10), /*!< Event 10 interrupt */
223 kSCTIMER_Event11InterruptEnable = (1U << 11), /*!< Event 11 interrupt */
224 kSCTIMER_Event12InterruptEnable = (1U << 12), /*!< Event 12 interrupt */
225 } sctimer_interrupt_enable_t;
226
227 /*! @brief List of SCTimer flags */
228 typedef enum _sctimer_status_flags
229 {
230 kSCTIMER_Event0Flag = (1U << 0), /*!< Event 0 Flag */
231 kSCTIMER_Event1Flag = (1U << 1), /*!< Event 1 Flag */
232 kSCTIMER_Event2Flag = (1U << 2), /*!< Event 2 Flag */
233 kSCTIMER_Event3Flag = (1U << 3), /*!< Event 3 Flag */
234 kSCTIMER_Event4Flag = (1U << 4), /*!< Event 4 Flag */
235 kSCTIMER_Event5Flag = (1U << 5), /*!< Event 5 Flag */
236 kSCTIMER_Event6Flag = (1U << 6), /*!< Event 6 Flag */
237 kSCTIMER_Event7Flag = (1U << 7), /*!< Event 7 Flag */
238 kSCTIMER_Event8Flag = (1U << 8), /*!< Event 8 Flag */
239 kSCTIMER_Event9Flag = (1U << 9), /*!< Event 9 Flag */
240 kSCTIMER_Event10Flag = (1U << 10), /*!< Event 10 Flag */
241 kSCTIMER_Event11Flag = (1U << 11), /*!< Event 11 Flag */
242 kSCTIMER_Event12Flag = (1U << 12), /*!< Event 12 Flag */
243 kSCTIMER_BusErrorLFlag =
244 (1U << SCT_CONFLAG_BUSERRL_SHIFT), /*!< Bus error due to write when L counter was not halted */
245 kSCTIMER_BusErrorHFlag =
246 (int)(1U << SCT_CONFLAG_BUSERRH_SHIFT) /*!< Bus error due to write when H counter was not halted */
247 } sctimer_status_flags_t;
248
249 /*!
250 * @brief SCTimer configuration structure
251 *
252 * This structure holds the configuration settings for the SCTimer peripheral. To initialize this
253 * structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a
254 * pointer to the configuration structure instance.
255 *
256 * The configuration structure can be made constant so as to reside in flash.
257 */
258 typedef struct _sctimer_config
259 {
260 bool enableCounterUnify; /*!< true: SCT operates as a unified 32-bit counter;
261 false: SCT operates as two 16-bit counters.
262 User can use the 16-bit low counter and the 16-bit high counters at the
263 same time; for Hardware limit, user can not use unified 32-bit counter
264 and any 16-bit low/high counter at the same time. */
265 sctimer_clock_mode_t clockMode; /*!< SCT clock mode value */
266 sctimer_clock_select_t clockSelect; /*!< SCT clock select value */
267 bool enableBidirection_l; /*!< true: Up-down count mode for the L or unified counter
268 false: Up count mode only for the L or unified counter */
269 bool enableBidirection_h; /*!< true: Up-down count mode for the H or unified counter
270 false: Up count mode only for the H or unified counter.
271 This field is used only if the enableCounterUnify is set
272 to false */
273 uint8_t prescale_l; /*!< Prescale value to produce the L or unified counter clock */
274 uint8_t prescale_h; /*!< Prescale value to produce the H counter clock.
275 This field is used only if the enableCounterUnify is set
276 to false */
277 uint8_t outInitState; /*!< Defines the initial output value */
278 uint8_t inputsync; /*!< SCT INSYNC value, INSYNC field in the CONFIG register, from bit9 to bit 16.
279 it is used to define synchronization for input N:
280 bit 9 = input 0
281 bit 10 = input 1
282 bit 11 = input 2
283 bit 12 = input 3
284 All other bits are reserved (bit13 ~bit 16).
285 How User to set the the value for the member inputsync.
286 IE: delay for input0, and input 1, bypasses for input 2 and input 3
287 MACRO definition in user level.
288 \#define INPUTSYNC0 (0U)
289 \#define INPUTSYNC1 (1U)
290 \#define INPUTSYNC2 (2U)
291 \#define INPUTSYNC3 (3U)
292 User Code.
293 sctimerInfo.inputsync = (1 << INPUTSYNC2) | (1 << INPUTSYNC3); */
294 } sctimer_config_t;
295
296 /*******************************************************************************
297 * API
298 ******************************************************************************/
299
300 #if defined(__cplusplus)
301 extern "C" {
302 #endif
303
304 /*!
305 * @name Initialization and deinitialization
306 * @{
307 */
308
309 /*!
310 * @brief Ungates the SCTimer clock and configures the peripheral for basic operation.
311 *
312 * @note This API should be called at the beginning of the application using the SCTimer driver.
313 *
314 * @param base SCTimer peripheral base address
315 * @param config Pointer to the user configuration structure.
316 *
317 * @return kStatus_Success indicates success; Else indicates failure.
318 */
319 status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config);
320
321 /*!
322 * @brief Gates the SCTimer clock.
323 *
324 * @param base SCTimer peripheral base address
325 */
326 void SCTIMER_Deinit(SCT_Type *base);
327
328 /*!
329 * @brief Fills in the SCTimer configuration structure with the default settings.
330 *
331 * The default values are:
332 * @code
333 * config->enableCounterUnify = true;
334 * config->clockMode = kSCTIMER_System_ClockMode;
335 * config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
336 * config->enableBidirection_l = false;
337 * config->enableBidirection_h = false;
338 * config->prescale_l = 0U;
339 * config->prescale_h = 0U;
340 * config->outInitState = 0U;
341 * config->inputsync = 0xFU;
342 * @endcode
343 * @param config Pointer to the user configuration structure.
344 */
345 void SCTIMER_GetDefaultConfig(sctimer_config_t *config);
346
347 /*! @}*/
348
349 /*!
350 * @name PWM setup operations
351 * @{
352 */
353
354 /*!
355 * @brief Configures the PWM signal parameters.
356 *
357 * Call this function to configure the PWM signal period, mode, duty cycle, and edge. This
358 * function will create 2 events; one of the events will trigger on match with the pulse value
359 * and the other will trigger when the counter matches the PWM period. The PWM period event is
360 * also used as a limit event to reset the counter or change direction. Both events are enabled
361 * for the same state. The state number can be retrieved by calling the function
362 * SCTIMER_GetCurrentStateNumber().
363 * The counter is set to operate as one 32-bit counter (unify bit is set to 1).
364 * The counter operates in bi-directional mode when generating a center-aligned PWM.
365 *
366 * @note When setting PWM output from multiple output pins, they all should use the same PWM mode
367 * i.e all PWM's should be either edge-aligned or center-aligned.
368 * When using this API, the PWM signal frequency of all the initialized channels must be the same.
369 * Otherwise all the initialized channels' PWM signal frequency is equal to the last call to the
370 * API's pwmFreq_Hz.
371 *
372 * @param base SCTimer peripheral base address
373 * @param pwmParams PWM parameters to configure the output
374 * @param mode PWM operation mode, options available in enumeration ::sctimer_pwm_mode_t
375 * @param pwmFreq_Hz PWM signal frequency in Hz
376 * @param srcClock_Hz SCTimer counter clock in Hz
377 * @param event Pointer to a variable where the PWM period event number is stored
378 *
379 * @return kStatus_Success on success
380 * kStatus_Fail If we have hit the limit in terms of number of events created or if
381 * an incorrect PWM dutycylce is passed in.
382 */
383 status_t SCTIMER_SetupPwm(SCT_Type *base,
384 const sctimer_pwm_signal_param_t *pwmParams,
385 sctimer_pwm_mode_t mode,
386 uint32_t pwmFreq_Hz,
387 uint32_t srcClock_Hz,
388 uint32_t *event);
389
390 /*!
391 * @brief Updates the duty cycle of an active PWM signal.
392 *
393 * Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).
394 *
395 * @param base SCTimer peripheral base address
396 * @param output The output to configure
397 * @param dutyCyclePercent New PWM pulse width; the value should be between 1 to 100
398 * @param event Event number associated with this PWM signal. This was returned to the user by the
399 * function SCTIMER_SetupPwm().
400 */
401 void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event);
402
403 /*!
404 * @name Interrupt Interface
405 * @{
406 */
407
408 /*!
409 * @brief Enables the selected SCTimer interrupts.
410 *
411 * @param base SCTimer peripheral base address
412 * @param mask The interrupts to enable. This is a logical OR of members of the
413 * enumeration ::sctimer_interrupt_enable_t
414 */
SCTIMER_EnableInterrupts(SCT_Type * base,uint32_t mask)415 static inline void SCTIMER_EnableInterrupts(SCT_Type *base, uint32_t mask)
416 {
417 base->EVEN |= mask;
418 }
419
420 /*!
421 * @brief Disables the selected SCTimer interrupts.
422 *
423 * @param base SCTimer peripheral base address
424 * @param mask The interrupts to enable. This is a logical OR of members of the
425 * enumeration ::sctimer_interrupt_enable_t
426 */
SCTIMER_DisableInterrupts(SCT_Type * base,uint32_t mask)427 static inline void SCTIMER_DisableInterrupts(SCT_Type *base, uint32_t mask)
428 {
429 base->EVEN &= ~mask;
430 }
431
432 /*!
433 * @brief Gets the enabled SCTimer interrupts.
434 *
435 * @param base SCTimer peripheral base address
436 *
437 * @return The enabled interrupts. This is the logical OR of members of the
438 * enumeration ::sctimer_interrupt_enable_t
439 */
SCTIMER_GetEnabledInterrupts(SCT_Type * base)440 static inline uint32_t SCTIMER_GetEnabledInterrupts(SCT_Type *base)
441 {
442 return (base->EVEN & 0xFFFFU);
443 }
444
445 /*! @}*/
446
447 /*!
448 * @name Status Interface
449 * @{
450 */
451
452 /*!
453 * @brief Gets the SCTimer status flags.
454 *
455 * @param base SCTimer peripheral base address
456 *
457 * @return The status flags. This is the logical OR of members of the
458 * enumeration ::sctimer_status_flags_t
459 */
SCTIMER_GetStatusFlags(SCT_Type * base)460 static inline uint32_t SCTIMER_GetStatusFlags(SCT_Type *base)
461 {
462 uint32_t statusFlags = 0;
463
464 /* Add the recorded events */
465 statusFlags = (base->EVFLAG & 0xFFFFU);
466
467 /* Add bus error flags */
468 statusFlags |= (base->CONFLAG & (SCT_CONFLAG_BUSERRL_MASK | SCT_CONFLAG_BUSERRH_MASK));
469
470 return statusFlags;
471 }
472
473 /*!
474 * @brief Clears the SCTimer status flags.
475 *
476 * @param base SCTimer peripheral base address
477 * @param mask The status flags to clear. This is a logical OR of members of the
478 * enumeration ::sctimer_status_flags_t
479 */
SCTIMER_ClearStatusFlags(SCT_Type * base,uint32_t mask)480 static inline void SCTIMER_ClearStatusFlags(SCT_Type *base, uint32_t mask)
481 {
482 /* Write to the flag registers */
483 base->EVFLAG = (mask & 0xFFFFU);
484 base->CONFLAG = (mask & (SCT_CONFLAG_BUSERRL_MASK | SCT_CONFLAG_BUSERRH_MASK));
485 }
486
487 /*! @}*/
488
489 /*!
490 * @name Counter Start and Stop
491 * @{
492 */
493
494 /*!
495 * @brief Starts the SCTimer counter.
496 *
497 * @note In 16-bit mode, we can enable both Counter_L and Counter_H, In 32-bit mode, we only can select Counter_U.
498 *
499 * @param base SCTimer peripheral base address
500 * @param countertoStart The SCTimer counters to enable. This is a logical OR of members of the
501 * enumeration ::sctimer_counter_t.
502 */
SCTIMER_StartTimer(SCT_Type * base,uint32_t countertoStart)503 static inline void SCTIMER_StartTimer(SCT_Type *base, uint32_t countertoStart)
504 {
505 switch (countertoStart)
506 {
507 case (uint32_t)kSCTIMER_Counter_L:
508 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
509 /* Clear HALT_L bit when user wants to start the Low counter */
510 base->CTRL_ACCESS16BIT.CTRLL &= ~((uint16_t)SCT_CTRLL_HALT_L_MASK);
511 break;
512
513 case (uint32_t)kSCTIMER_Counter_H:
514 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
515 /* Clear HALT_H bit when user wants to start the High counter */
516 base->CTRL &= ~(SCT_CTRL_HALT_H_MASK);
517 break;
518
519 case (uint32_t)kSCTIMER_Counter_L | (uint32_t)kSCTIMER_Counter_H:
520 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
521 /* Clear HALT_L/HALT_H bit when user wants to H counter and L counter at same time */
522 base->CTRL &= ~(SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK);
523 break;
524
525 case (uint32_t)kSCTIMER_Counter_U:
526 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
527 /* Clear HALT_L bit when the counter is operating in 32-bit mode (unify counter). */
528 base->CTRL &= ~(SCT_CTRL_HALT_L_MASK);
529 break;
530
531 default:
532 /* Counter_L/Counter_H can't work together with Counter_U. */
533 assert(false);
534 break;
535 }
536 }
537
538 /*!
539 * @brief Halts the SCTimer counter.
540 *
541 * @param base SCTimer peripheral base address
542 * @param countertoStop The SCTimer counters to stop. This is a logical OR of members of the
543 * enumeration ::sctimer_counter_t.
544 */
SCTIMER_StopTimer(SCT_Type * base,uint32_t countertoStop)545 static inline void SCTIMER_StopTimer(SCT_Type *base, uint32_t countertoStop)
546 {
547 switch (countertoStop)
548 {
549 case (uint32_t)kSCTIMER_Counter_L:
550 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
551 /* Set HALT_L bit when user wants to start the Low counter */
552 base->CTRL_ACCESS16BIT.CTRLL |= (SCT_CTRLL_HALT_L_MASK);
553 break;
554
555 case (uint32_t)kSCTIMER_Counter_H:
556 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
557 /* Set HALT_H bit when user wants to start the High counter */
558 base->CTRL |= (SCT_CTRL_HALT_H_MASK);
559 break;
560
561 case (uint32_t)kSCTIMER_Counter_L | (uint32_t)kSCTIMER_Counter_H:
562 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
563 /* Clear HALT_L/HALT_H bit when user wants to H counter and L counter at same time */
564 base->CTRL |= (SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK);
565 break;
566
567 case (uint32_t)kSCTIMER_Counter_U:
568 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
569 /* Set HALT_L bit when the counter is operating in 32-bit mode (unify counter). */
570 base->CTRL |= (SCT_CTRL_HALT_L_MASK);
571 break;
572
573 default:
574 /* Counter_L/Counter_H can't work together with Counter_U. */
575 assert(false);
576 break;
577 }
578 }
579
580 /*! @}*/
581
582 /*!
583 * @name Functions to create a new event and manage the state logic
584 * @{
585 */
586
587 /*!
588 * @brief Create an event that is triggered on a match or IO and schedule in current state.
589 *
590 * This function will configure an event using the options provided by the user. If the event type uses
591 * the counter match, then the function will set the user provided match value into a match register
592 * and put this match register number into the event control register.
593 * The event is enabled for the current state and the event number is increased by one at the end.
594 * The function returns the event number; this event number can be used to configure actions to be
595 * done when this event is triggered.
596 *
597 * @param base SCTimer peripheral base address
598 * @param howToMonitor Event type; options are available in the enumeration ::sctimer_interrupt_enable_t
599 * @param matchValue The match value that will be programmed to a match register
600 * @param whichIO The input or output that will be involved in event triggering. This field
601 * is ignored if the event type is "match only"
602 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
603 * In 32-bit mode, we can select Counter_U.
604 * @param event Pointer to a variable where the new event number is stored
605 *
606 * @return kStatus_Success on success
607 * kStatus_Error if we have hit the limit in terms of number of events created or
608 if we have reached the limit in terms of number of match registers
609 */
610 status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base,
611 sctimer_event_t howToMonitor,
612 uint32_t matchValue,
613 uint32_t whichIO,
614 sctimer_counter_t whichCounter,
615 uint32_t *event);
616
617 /*!
618 * @brief Enable an event in the current state.
619 *
620 * This function will allow the event passed in to trigger in the current state. The event must
621 * be created earlier by either calling the function SCTIMER_SetupPwm() or function
622 * SCTIMER_CreateAndScheduleEvent() .
623 *
624 * @param base SCTimer peripheral base address
625 * @param event Event number to enable in the current state
626 *
627 */
628 void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event);
629
630 /*!
631 * @brief Increase the state by 1
632 *
633 * All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new
634 * state.
635 *
636 * @param base SCTimer peripheral base address
637 *
638 * @return kStatus_Success on success
639 * kStatus_Error if we have hit the limit in terms of states used
640
641 */
642 status_t SCTIMER_IncreaseState(SCT_Type *base);
643
644 /*!
645 * @brief Provides the current state
646 *
647 * User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().
648 *
649 * @param base SCTimer peripheral base address
650 *
651 * @return The current state
652 */
653 uint32_t SCTIMER_GetCurrentState(SCT_Type *base);
654
655 /*!
656 * @brief Set the counter current state.
657 *
658 * The function is to set the state variable bit field of STATE register. Writing to the STATE_L, STATE_H, or unified
659 * register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).
660 *
661 * @param base SCTimer peripheral base address
662 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
663 * In 32-bit mode, we can select Counter_U.
664 * @param state The counter current state number (only support range from 0~31).
665 */
SCTIMER_SetCounterState(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t state)666 static inline void SCTIMER_SetCounterState(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t state)
667 {
668 /* SCT only support 0 ~ FSL_FEATURE_SCT_NUMBER_OF_STATES state value. */
669 assert(state < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_STATES);
670
671 SCTIMER_StopTimer(base, (uint32_t)whichCounter);
672
673 switch (whichCounter)
674 {
675 case kSCTIMER_Counter_L:
676 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
677 /* Use STATE_L bits when user wants to setup the Low counter */
678 base->STATE_ACCESS16BIT.STATEL = SCT_STATEL_STATEL(state);
679 break;
680
681 case kSCTIMER_Counter_H:
682 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
683 /* Use STATE_H bits when user wants to start the High counter */
684 base->STATE = (uint32_t)base->STATE_ACCESS16BIT.STATEL | SCT_STATE_STATE_H(state);
685 break;
686
687 case kSCTIMER_Counter_U:
688 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
689 /* Use STATE_L bits when counter is operating in 32-bit mode (unify counter). */
690 base->STATE = SCT_STATE_STATE_L(state);
691 break;
692
693 default:
694 /* Fix the MISRA C-2012 issue rule 16.4. */
695 break;
696 }
697
698 SCTIMER_StartTimer(base, (uint32_t)whichCounter);
699 }
700
701 /*!
702 * @brief Get the counter current state value.
703 *
704 * The function is to get the state variable bit field of STATE register.
705 *
706 * @param base SCTimer peripheral base address
707 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
708 * In 32-bit mode, we can select Counter_U.
709 * @return The the counter current state value.
710 */
SCTIMER_GetCounterState(SCT_Type * base,sctimer_counter_t whichCounter)711 static inline uint16_t SCTIMER_GetCounterState(SCT_Type *base, sctimer_counter_t whichCounter)
712 {
713 uint16_t regs;
714
715 switch (whichCounter)
716 {
717 case kSCTIMER_Counter_L:
718 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
719 /* Use STATE_L bits when user wants to setup the Low counter */
720 regs = base->STATE_ACCESS16BIT.STATEL & SCT_STATEL_STATEL_MASK;
721 break;
722
723 case kSCTIMER_Counter_H:
724 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
725 /* Use STATE_H bits when user wants to start the High counter */
726 regs = base->STATE_ACCESS16BIT.STATEH & SCT_STATEH_STATEH_MASK;
727 break;
728
729 case kSCTIMER_Counter_U:
730 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
731 /* Use STATE_L bits when counter is operating in 32-bit mode (unify counter). */
732 regs = (uint16_t)(base->STATE & SCT_STATE_STATE_L_MASK);
733 break;
734
735 default:
736 /* Fix the MISRA C-2012 issue rule 16.4. */
737 break;
738 }
739
740 return regs;
741 }
742
743 /*! @}*/
744
745 /*!
746 * @name Actions to take in response to an event
747 * @{
748 */
749
750 /*!
751 * @brief Setup capture of the counter value on trigger of a selected event
752 *
753 * @param base SCTimer peripheral base address
754 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
755 * In 32-bit mode, we can select Counter_U.
756 * @param captureRegister Pointer to a variable where the capture register number will be returned. User
757 * can read the captured value from this register when the specified event is triggered.
758 * @param event Event number that will trigger the capture
759 *
760 * @return kStatus_Success on success
761 * kStatus_Error if we have hit the limit in terms of number of match/capture registers available
762 */
763 status_t SCTIMER_SetupCaptureAction(SCT_Type *base,
764 sctimer_counter_t whichCounter,
765 uint32_t *captureRegister,
766 uint32_t event);
767
768 /*!
769 * @brief Receive noticification when the event trigger an interrupt.
770 *
771 * If the interrupt for the event is enabled by the user, then a callback can be registered
772 * which will be invoked when the event is triggered
773 *
774 * @param base SCTimer peripheral base address
775 * @param event Event number that will trigger the interrupt
776 * @param callback Function to invoke when the event is triggered
777 */
778
779 void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event);
780
781 /*!
782 * @brief Change the load method of transition to the specified state.
783 *
784 * Change the load method of transition, it will be triggered by the event number that is passed in by the user.
785 *
786 * @param base SCTimer peripheral base address
787 * @param event Event number that will change the method to trigger the state transition
788 * @param fgLoad The method to load highest-numbered event occurring for that state to the STATE register.
789 * - true: Load the STATEV value to STATE when the event occurs to be the next state.
790 * - false: Add the STATEV value to STATE when the event occurs to be the next state.
791 */
SCTIMER_SetupStateLdMethodAction(SCT_Type * base,uint32_t event,bool fgLoad)792 static inline void SCTIMER_SetupStateLdMethodAction(SCT_Type *base, uint32_t event, bool fgLoad)
793 {
794 uint32_t reg = base->EV[event].CTRL;
795
796 if (fgLoad)
797 {
798 /* Load the STATEV value to STATE when the event occurs to be the next state */
799 reg |= SCT_EV_CTRL_STATELD_MASK;
800 }
801 else
802 {
803 /* Add the STATEV value to STATE when the event occurs to be the next state */
804 reg &= ~SCT_EV_CTRL_STATELD_MASK;
805 }
806
807 base->EV[event].CTRL = reg;
808 }
809
810 /*!
811 * @brief Transition to the specified state with Load method.
812 *
813 * This transition will be triggered by the event number that is passed in by the user, the method decide how to load
814 * the highest-numbered event occurring for that state to the STATE register.
815 *
816 * @param base SCTimer peripheral base address
817 * @param nextState The next state SCTimer will transition to
818 * @param event Event number that will trigger the state transition
819 * @param fgLoad The method to load the highest-numbered event occurring for that state to the STATE register.
820 * - true: Load the STATEV value to STATE when the event occurs to be the next state.
821 * - false: Add the STATEV value to STATE when the event occurs to be the next state.
822 */
SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type * base,uint32_t nextState,uint32_t event,bool fgLoad)823 static inline void SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type *base,
824 uint32_t nextState,
825 uint32_t event,
826 bool fgLoad)
827 {
828 uint32_t reg = base->EV[event].CTRL;
829
830 reg &= ~(SCT_EV_CTRL_STATEV_MASK | SCT_EV_CTRL_STATELD_MASK);
831
832 reg |= SCT_EV_CTRL_STATEV(nextState);
833
834 if (fgLoad)
835 {
836 /* Load the STATEV value when the event occurs to be the next state */
837 reg |= SCT_EV_CTRL_STATELD_MASK;
838 }
839
840 base->EV[event].CTRL = reg;
841 }
842
843 /*!
844 * @brief Transition to the specified state.
845 * @deprecated Do not use this function. It has been superceded by @ref SCTIMER_SetupNextStateActionwithLdMethod
846 *
847 * This transition will be triggered by the event number that is passed in by the user.
848 *
849 * @param base SCTimer peripheral base address
850 * @param nextState The next state SCTimer will transition to
851 * @param event Event number that will trigger the state transition
852 */
SCTIMER_SetupNextStateAction(SCT_Type * base,uint32_t nextState,uint32_t event)853 static inline void SCTIMER_SetupNextStateAction(SCT_Type *base, uint32_t nextState, uint32_t event)
854 {
855 uint32_t reg = base->EV[event].CTRL;
856
857 reg &= ~(SCT_EV_CTRL_STATEV_MASK);
858 /* Load the STATEV value when the event occurs to be the next state */
859 reg |= SCT_EV_CTRL_STATEV(nextState) | SCT_EV_CTRL_STATELD_MASK;
860
861 base->EV[event].CTRL = reg;
862 }
863
864 /*!
865 * @brief Setup event active direction when the counters are operating in BIDIR mode.
866 *
867 * @param base SCTimer peripheral base address
868 * @param activeDirection Event generation active direction, see @ref sctimer_event_active_direction_t.
869 * @param event Event number that need setup the active direction.
870 */
SCTIMER_SetupEventActiveDirection(SCT_Type * base,sctimer_event_active_direction_t activeDirection,uint32_t event)871 static inline void SCTIMER_SetupEventActiveDirection(SCT_Type *base,
872 sctimer_event_active_direction_t activeDirection,
873 uint32_t event)
874 {
875 uint32_t reg = base->EV[event].CTRL;
876
877 reg &= ~(SCT_EV_CTRL_DIRECTION_MASK);
878
879 reg |= SCT_EV_CTRL_DIRECTION(activeDirection);
880
881 base->EV[event].CTRL = reg;
882 }
883
884 /*!
885 * @brief Set the Output.
886 *
887 * This output will be set when the event number that is passed in by the user is triggered.
888 *
889 * @param base SCTimer peripheral base address
890 * @param whichIO The output to set
891 * @param event Event number that will trigger the output change
892 */
SCTIMER_SetupOutputSetAction(SCT_Type * base,uint32_t whichIO,uint32_t event)893 static inline void SCTIMER_SetupOutputSetAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
894 {
895 assert(whichIO < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);
896
897 base->OUT[whichIO].SET |= (1UL << event);
898 }
899
900 /*!
901 * @brief Clear the Output.
902 *
903 * This output will be cleared when the event number that is passed in by the user is triggered.
904 *
905 * @param base SCTimer peripheral base address
906 * @param whichIO The output to clear
907 * @param event Event number that will trigger the output change
908 */
SCTIMER_SetupOutputClearAction(SCT_Type * base,uint32_t whichIO,uint32_t event)909 static inline void SCTIMER_SetupOutputClearAction(SCT_Type *base, uint32_t whichIO, uint32_t event)
910 {
911 assert(whichIO < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);
912
913 base->OUT[whichIO].CLR |= (1UL << event);
914 }
915
916 /*!
917 * @brief Toggle the output level.
918 *
919 * This change in the output level is triggered by the event number that is passed in by the user.
920 *
921 * @param base SCTimer peripheral base address
922 * @param whichIO The output to toggle
923 * @param event Event number that will trigger the output change
924 */
925 void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event);
926
927 /*!
928 * @brief Limit the running counter.
929 *
930 * The counter is limited when the event number that is passed in by the user is triggered.
931 *
932 * @param base SCTimer peripheral base address
933 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
934 * In 32-bit mode, we can select Counter_U.
935 * @param event Event number that will trigger the counter to be limited
936 */
SCTIMER_SetupCounterLimitAction(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t event)937 static inline void SCTIMER_SetupCounterLimitAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
938 {
939 switch (whichCounter)
940 {
941 case kSCTIMER_Counter_L:
942 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
943 /* Use Counter_L bits when user wants to setup the Low counter */
944 base->LIMIT_ACCESS16BIT.LIMITL |= SCT_LIMITL_LIMITL(1UL << event);
945 break;
946
947 case kSCTIMER_Counter_H:
948 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
949 /* Use Counter_H bits when user wants to setup the High counter */
950 base->LIMIT |= SCT_LIMIT_LIMMSK_H(1UL << event);
951 break;
952
953 case kSCTIMER_Counter_U:
954 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
955 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
956 base->LIMIT |= SCT_LIMIT_LIMMSK_L(1UL << event);
957 break;
958
959 default:
960 /* Fix the MISRA C-2012 issue rule 16.4. */
961 break;
962 }
963 }
964
965 /*!
966 * @brief Stop the running counter.
967 *
968 * The counter is stopped when the event number that is passed in by the user is triggered.
969 *
970 * @param base SCTimer peripheral base address
971 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
972 * In 32-bit mode, we can select Counter_U.
973 * @param event Event number that will trigger the counter to be stopped
974 */
SCTIMER_SetupCounterStopAction(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t event)975 static inline void SCTIMER_SetupCounterStopAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
976 {
977 switch (whichCounter)
978 {
979 case kSCTIMER_Counter_L:
980 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
981 /* Use Counter_L bits when user wants to setup the Low counter */
982 base->STOP_ACCESS16BIT.STOPL |= SCT_STOPL_STOPL(1UL << event);
983 break;
984
985 case kSCTIMER_Counter_H:
986 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
987 /* Use Counter_H bits when user wants to start the High counter */
988 base->STOP |= SCT_STOP_STOPMSK_H(1UL << event);
989 break;
990
991 case kSCTIMER_Counter_U:
992 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
993 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
994 base->STOP |= SCT_STOP_STOPMSK_L(1UL << event);
995 break;
996
997 default:
998 /* Fix the MISRA C-2012 issue rule 16.4. */
999 break;
1000 }
1001 }
1002
1003 /*!
1004 * @brief Re-start the stopped counter.
1005 *
1006 * The counter will re-start when the event number that is passed in by the user is triggered.
1007 *
1008 * @param base SCTimer peripheral base address
1009 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
1010 * In 32-bit mode, we can select Counter_U.
1011 * @param event Event number that will trigger the counter to re-start
1012 */
SCTIMER_SetupCounterStartAction(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t event)1013 static inline void SCTIMER_SetupCounterStartAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
1014 {
1015 switch (whichCounter)
1016 {
1017 case kSCTIMER_Counter_L:
1018 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1019 /* Use Counter_L bits when user wants to setup the Low counter */
1020 base->START_ACCESS16BIT.STARTL |= SCT_STARTL_STARTL(1UL << event);
1021 break;
1022
1023 case kSCTIMER_Counter_H:
1024 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1025 /* Use Counter_H bits when user wants to start the High counter */
1026 base->START |= SCT_START_STARTMSK_H(1UL << event);
1027 break;
1028
1029 case kSCTIMER_Counter_U:
1030 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1031 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
1032 base->START |= SCT_START_STARTMSK_L(1UL << event);
1033 break;
1034
1035 default:
1036 /* Fix the MISRA C-2012 issue rule 16.4. */
1037 break;
1038 }
1039 }
1040
1041 /*!
1042 * @brief Halt the running counter.
1043 *
1044 * The counter is disabled (halted) when the event number that is passed in by the user is
1045 * triggered. When the counter is halted, all further events are disabled. The HALT condition
1046 * can only be removed by calling the SCTIMER_StartTimer() function.
1047 *
1048 * @param base SCTimer peripheral base address
1049 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
1050 * In 32-bit mode, we can select Counter_U.
1051 * @param event Event number that will trigger the counter to be halted
1052 */
SCTIMER_SetupCounterHaltAction(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t event)1053 static inline void SCTIMER_SetupCounterHaltAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)
1054 {
1055 switch (whichCounter)
1056 {
1057 case kSCTIMER_Counter_L:
1058 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1059 /* Use Counter_L bits when user wants to setup the Low counter */
1060 base->HALT_ACCESS16BIT.HALTL |= SCT_HALTL_HALTL(1UL << event);
1061 break;
1062
1063 case kSCTIMER_Counter_H:
1064 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1065 /* Use Counter_H bits when user wants to start the High counter */
1066 base->HALT |= SCT_HALT_HALTMSK_H(1UL << event);
1067 break;
1068
1069 case kSCTIMER_Counter_U:
1070 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1071 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
1072 base->HALT |= SCT_HALT_HALTMSK_L(1UL << event);
1073 break;
1074
1075 default:
1076 /* Fix the MISRA C-2012 issue rule 16.4. */
1077 break;
1078 }
1079 }
1080
1081 #if !(defined(FSL_FEATURE_SCT_HAS_NO_DMA_REQUEST) && FSL_FEATURE_SCT_HAS_NO_DMA_REQUEST)
1082 /*!
1083 * @brief Generate a DMA request.
1084 *
1085 * DMA request will be triggered by the event number that is passed in by the user.
1086 *
1087 * @param base SCTimer peripheral base address
1088 * @param dmaNumber The DMA request to generate
1089 * @param event Event number that will trigger the DMA request
1090 */
SCTIMER_SetupDmaTriggerAction(SCT_Type * base,uint32_t dmaNumber,uint32_t event)1091 static inline void SCTIMER_SetupDmaTriggerAction(SCT_Type *base, uint32_t dmaNumber, uint32_t event)
1092 {
1093 if (dmaNumber == 0U)
1094 {
1095 base->DMAREQ0 |= (1UL << event);
1096 }
1097 else
1098 {
1099 base->DMAREQ1 |= (1UL << event);
1100 }
1101 }
1102 #endif /* FSL_FEATURE_SCT_HAS_NO_DMA_REQUEST */
1103
1104 /*!
1105 * @brief Set the value of counter.
1106 *
1107 * The function is to set the value of Count register, Writing to the COUNT_L, COUNT_H, or unified register
1108 * is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).
1109 *
1110 * @param base SCTimer peripheral base address
1111 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
1112 * In 32-bit mode, we can select Counter_U.
1113 * @param value the counter value update to the COUNT register.
1114 */
SCTIMER_SetCOUNTValue(SCT_Type * base,sctimer_counter_t whichCounter,uint32_t value)1115 static inline void SCTIMER_SetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t value)
1116 {
1117 SCTIMER_StopTimer(base, (uint32_t)whichCounter);
1118
1119 switch (whichCounter)
1120 {
1121 case kSCTIMER_Counter_L:
1122 assert(value <= 0xFFFFU);
1123 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1124 /* Use Counter_L bits when user wants to setup the Low counter */
1125 base->COUNT_ACCESS16BIT.COUNTL = (uint16_t)value;
1126 break;
1127
1128 case kSCTIMER_Counter_H:
1129 assert(value <= 0xFFFFU);
1130 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1131 /* Use Counter_H bits when user wants to setup the High counter */
1132 base->COUNT = (uint32_t)base->COUNT_ACCESS16BIT.COUNTL | SCT_COUNT_CTR_H(value);
1133 break;
1134
1135 case kSCTIMER_Counter_U:
1136 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1137 /* Use both Counter_L/Counter_H bits when counter is operating in 32-bit mode (unify counter). */
1138 base->COUNT = value;
1139 break;
1140
1141 default:
1142 /* Fix the MISRA C-2012 issue rule 16.4. */
1143 break;
1144 }
1145
1146 SCTIMER_StartTimer(base, (uint32_t)whichCounter);
1147 }
1148
1149 /*!
1150 * @brief Get the value of counter.
1151 *
1152 * The function is to read the value of Count register, software can read the counter registers at any time..
1153 *
1154 * @param base SCTimer peripheral base address
1155 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
1156 * In 32-bit mode, we can select Counter_U.
1157 * @return The value of counter selected.
1158 */
SCTIMER_GetCOUNTValue(SCT_Type * base,sctimer_counter_t whichCounter)1159 static inline uint32_t SCTIMER_GetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter)
1160 {
1161 uint32_t value;
1162
1163 switch (whichCounter)
1164 {
1165 case kSCTIMER_Counter_L:
1166 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1167 /* Use Counter_L bits when user wants to setup the Low counter */
1168 value = base->COUNT_ACCESS16BIT.COUNTL;
1169 break;
1170
1171 case kSCTIMER_Counter_H:
1172 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1173 /* Use Counter_H bits when user wants to start the High counter */
1174 value = base->COUNT_ACCESS16BIT.COUNTH;
1175 break;
1176
1177 case kSCTIMER_Counter_U:
1178 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK));
1179 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
1180 value = base->COUNT;
1181 break;
1182
1183 default:
1184 /* Fix the MISRA C-2012 issue rule 16.4. */
1185 break;
1186 }
1187
1188 return value;
1189 }
1190
1191 /*!
1192 * @brief Set the state mask bit field of EV_STATE register.
1193 *
1194 * @param base SCTimer peripheral base address
1195 * @param event The EV_STATE register be set.
1196 * @param state The state value in which the event is enabled to occur.
1197 */
SCTIMER_SetEventInState(SCT_Type * base,uint32_t event,uint32_t state)1198 static inline void SCTIMER_SetEventInState(SCT_Type *base, uint32_t event, uint32_t state)
1199 {
1200 assert(state < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_STATES);
1201 assert(event < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS);
1202
1203 base->EV[event].STATE |= SCT_EV_STATE_STATEMSKn((uint32_t)1U << state);
1204 }
1205
1206 /*!
1207 * @brief Clear the state mask bit field of EV_STATE register.
1208 *
1209 * @param base SCTimer peripheral base address
1210 * @param event The EV_STATE register be clear.
1211 * @param state The state value in which the event is disabled to occur.
1212 */
SCTIMER_ClearEventInState(SCT_Type * base,uint32_t event,uint32_t state)1213 static inline void SCTIMER_ClearEventInState(SCT_Type *base, uint32_t event, uint32_t state)
1214 {
1215 assert(state < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_STATES);
1216 assert(event < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS);
1217
1218 base->EV[event].STATE &= ~SCT_EV_STATE_STATEMSKn((uint32_t)1U << state);
1219 }
1220
1221 /*!
1222 * @brief Get the state mask bit field of EV_STATE register.
1223 *
1224 * @note This function is to check whether the event is enabled in a specific state.
1225 *
1226 * @param base SCTimer peripheral base address
1227 * @param event The EV_STATE register be read.
1228 * @param state The state value.
1229 *
1230 * @return The the state mask bit field of EV_STATE register.
1231 * - true: The event is enable in state.
1232 * - false: The event is disable in state.
1233 */
SCTIMER_GetEventInState(SCT_Type * base,uint32_t event,uint32_t state)1234 static inline bool SCTIMER_GetEventInState(SCT_Type *base, uint32_t event, uint32_t state)
1235 {
1236 assert(state < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_STATES);
1237 assert(event < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_EVENTS);
1238
1239 return (0U != (base->EV[event].STATE & SCT_EV_STATE_STATEMSKn((uint32_t)1U << state)));
1240 }
1241
1242 /*!
1243 * @brief Get the value of capture register.
1244 *
1245 * This function returns the captured value upon occurrence of the events selected by the corresponding
1246 * Capture Control registers occurred.
1247 *
1248 * @param base SCTimer peripheral base address
1249 * @param whichCounter SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H,
1250 * In 32-bit mode, we can select Counter_U.
1251 * @param capChannel SCTimer capture register of capture channel.
1252 *
1253 * @return The SCTimer counter value at which this register was last captured.
1254 */
SCTIMER_GetCaptureValue(SCT_Type * base,sctimer_counter_t whichCounter,uint8_t capChannel)1255 static inline uint32_t SCTIMER_GetCaptureValue(SCT_Type *base, sctimer_counter_t whichCounter, uint8_t capChannel)
1256 {
1257 uint32_t value = 0;
1258
1259 switch (whichCounter)
1260 {
1261 case kSCTIMER_Counter_L:
1262 assert(capChannel < SCT_CAPL_COUNT);
1263 /* Use Counter_L bits when user wants to setup the Low counter */
1264 value = base->CAP_ACCESS16BIT[capChannel].CAPL;
1265 break;
1266
1267 case kSCTIMER_Counter_H:
1268 assert(capChannel < SCT_CAPH_COUNT);
1269 /* Use Counter_H bits when user wants to start the High counter */
1270 value = base->CAP_ACCESS16BIT[capChannel].CAPH;
1271 break;
1272
1273 case kSCTIMER_Counter_U:
1274 assert(capChannel < SCT_CAP_COUNT);
1275 /* Use Counter_L bits when counter is operating in 32-bit mode (unify counter). */
1276 value = base->CAP[capChannel];
1277 break;
1278
1279 default:
1280 /* Fix the MISRA C-2012 issue rule 16.4. */
1281 break;
1282 }
1283
1284 return value;
1285 }
1286
1287 /*!
1288 * @brief SCTimer interrupt handler.
1289 *
1290 * @param base SCTimer peripheral base address.
1291 */
1292 void SCTIMER_EventHandleIRQ(SCT_Type *base);
1293
1294 /*! @}*/
1295
1296 #if defined(__cplusplus)
1297 }
1298 #endif
1299
1300 /*! @}*/
1301
1302 #endif /* FSL_SCTIMER_H_ */
1303
