1 /*
2  * Copyright 2018-2021, NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef __FSL_ANACTRL_H__
10 #define __FSL_ANACTRL_H__
11 
12 #include "fsl_common.h"
13 
14 /*!
15  * @addtogroup anactrl
16  * @{
17  */
18 
19 /*******************************************************************************
20  * Definitions
21  ******************************************************************************/
22 /*! @brief ANACTRL driver version. */
23 #define FSL_ANACTRL_DRIVER_VERSION (MAKE_VERSION(2, 3, 1)) /*!< Version 2.3.1. */`
24 
25 /*!
26  * @brief ANACTRL interrupt flags
27  */
28 enum _anactrl_interrupt_flags
29 {
30 #if (defined(FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN) && FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN)
31     kANACTRL_BodVDDMainFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVDDMAIN_STATUS_MASK, /*!< BOD VDDMAIN Interrupt status
32                                                                                before Interrupt Enable. */
33     kANACTRL_BodVDDMainInterruptFlag =
34         ANACTRL_BOD_DCDC_INT_STATUS_BODVDDMAIN_INT_STATUS_MASK,                     /*!< BOD VDDMAIN Interrupt status
35                                                                                  after Interrupt Enable. */
36     kANACTRL_BodVDDMainPowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVDDMAIN_VAL_MASK, /*!< Current value of BOD VDDMAIN
37                                                                                    power status output. */
38 #else
39     kANACTRL_BodVbatFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_STATUS_MASK, /*!< BOD VBAT Interrupt status before
40                                                                                 Interrupt Enable. */
41     kANACTRL_BodVbatInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_INT_STATUS_MASK, /*!< BOD VBAT Interrupt status
42                                                                                             after Interrupt Enable. */
43     kANACTRL_BodVbatPowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_VAL_MASK, /*!< Current value of BOD VBAT power
44                                                                                     status output. */
45 #endif /* defined(FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN) && FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN */
46     kANACTRL_BodCoreFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_STATUS_MASK, /*!< BOD CORE Interrupt status before
47                                                                                 Interrupt Enable. */
48     kANACTRL_BodCoreInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_INT_STATUS_MASK, /*!< BOD CORE Interrupt status
49                                                                                             after Interrupt Enable. */
50     kANACTRL_BodCorePowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_VAL_MASK,      /*!< Current value of BOD CORE power
51                                                                                          status output. */
52     kANACTRL_DcdcFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_STATUS_MASK,              /*!< DCDC Interrupt status before
53                                                                                          Interrupt Enable. */
54     kANACTRL_DcdcInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_INT_STATUS_MASK, /*!< DCDC Interrupt status after
55                                                                                         Interrupt Enable. */
56     kANACTRL_DcdcPowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_VAL_MASK,            /*!< Current value of DCDC power
57                                                                                        status output. */
58 };
59 
60 /*!
61  * @brief ANACTRL interrupt control
62  */
63 enum _anactrl_interrupt
64 {
65 #if (defined(FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN) && FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN)
66     kANACTRL_BodVDDMainInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_BODVDDMAIN_INT_ENABLE_MASK, /*!< BOD VDDMAIN
67                                                                                             interrupt control. */
68 #else
69     kANACTRL_BodVbatInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_BODVBAT_INT_ENABLE_MASK, /*!< BOD VBAT interrupt
70                                                                                             control. */
71 #endif /* defined(FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN) && FSL_FEATURE_ANACTRL_CONTROL_VDD_MAIN */
72     kANACTRL_BodCoreInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_BODCORE_INT_ENABLE_MASK, /*!< BOD CORE interrupt
73                                                                                             control. */
74     kANACTRL_DcdcInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_DCDC_INT_ENABLE_MASK,       /*!< DCDC interrupt control. */
75 };
76 
77 /*!
78  * @brief ANACTRL status flags
79  */
80 enum _anactrl_flags
81 {
82     kANACTRL_FlashPowerDownFlag = ANACTRL_ANALOG_CTRL_STATUS_FLASH_PWRDWN_MASK,     /*!< Flash power-down status. */
83     kANACTRL_FlashInitErrorFlag = ANACTRL_ANALOG_CTRL_STATUS_FLASH_INIT_ERROR_MASK, /*!< Flash initialization
84                                                                                           error status. */
85 };
86 
87 /*!
88  * @brief ANACTRL FRO192M and XO32M status flags
89  */
90 enum _anactrl_osc_flags
91 {
92     kANACTRL_OutputClkValidFlag      = ANACTRL_FRO192M_STATUS_CLK_VALID_MASK,  /*!< Output clock valid signal. */
93     kANACTRL_CCOThresholdVoltageFlag = ANACTRL_FRO192M_STATUS_ATB_VCTRL_MASK,  /*!< CCO threshold voltage detector
94                                                                                      output (signal vcco_ok). */
95     kANACTRL_XO32MOutputReadyFlag = ANACTRL_XO32M_STATUS_XO_READY_MASK << 16U, /*!< Indicates XO out
96                                                                                     frequency statibilty. */
97 };
98 
99 /*!
100  * @brief Configuration for FRO192M
101  *
102  * This structure holds the configuration settings for the on-chip high-speed Free Running Oscillator. To initialize
103  * this structure to reasonable defaults, call the ANACTRL_GetDefaultFro192MConfig() function and pass a
104  * pointer to your config structure instance.
105  */
106 typedef struct _anactrl_fro192M_config
107 {
108     bool enable12MHzClk; /*!< Enable 12MHz clock. */
109     bool enable96MHzClk; /*!< Enable 96MHz clock. */
110 } anactrl_fro192M_config_t;
111 
112 /*!
113  * @brief Configuration for XO32M
114  *
115  * This structure holds the configuration settings for the 32 MHz crystal oscillator. To initialize this
116  * structure to reasonable defaults, call the ANACTRL_GetDefaultXo32MConfig() function and pass a
117  * pointer to your config structure instance.
118  */
119 typedef struct _anactrl_xo32M_config
120 {
121     bool enableACBufferBypass; /*!< Enable XO AC buffer bypass in pll and top level. */
122 #if !(defined(FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD) && \
123       FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD)
124     bool enablePllUsbOutput; /*!< Enable XO 32 MHz output to USB HS PLL. */
125 #endif                       /* FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD */
126     bool enableSysCLkOutput; /*!< Enable XO 32 MHz output to CPU system, SCT, and CLKOUT */
127 #if (defined(FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD) && \
128      FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD)
129     bool enableADCOutput; /*!< Enable High speed crystal oscillator output to ADC. */
130 #endif                    /* FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD */
131 } anactrl_xo32M_config_t;
132 
133 /*******************************************************************************
134  * API
135  ******************************************************************************/
136 
137 #if defined(__cplusplus)
138 extern "C" {
139 #endif
140 
141 /*!
142  * @name Initialization and deinitialization
143  * @{
144  */
145 
146 /*!
147  * @brief Initializes the ANACTRL mode, the module's clock will be enabled by invoking this function.
148  *
149  * @param base ANACTRL peripheral base address.
150  */
151 void ANACTRL_Init(ANACTRL_Type *base);
152 
153 /*!
154  * @brief De-initializes ANACTRL module, the module's clock will be disabled by invoking this function.
155  *
156  * @param base ANACTRL peripheral base address.
157  */
158 void ANACTRL_Deinit(ANACTRL_Type *base);
159 /* @} */
160 
161 /*!
162  * @name Set oscillators
163  * @{
164  */
165 
166 /*!
167  * @brief Configs the on-chip high-speed Free Running Oscillator(FRO192M), such as enabling/disabling 12 MHZ clock
168  * output and enable/disable 96MHZ clock output.
169  *
170  * @param base ANACTRL peripheral base address.
171  * @param config Pointer to FRO192M configuration structure. Refer to @ref anactrl_fro192M_config_t structure.
172  */
173 void ANACTRL_SetFro192M(ANACTRL_Type *base, const anactrl_fro192M_config_t *config);
174 
175 /*!
176  * @brief Gets the default configuration of FRO192M.
177  * The default values are:
178  * @code
179     config->enable12MHzClk = true;
180     config->enable96MHzClk = false;
181     @endcode
182  * @param config Pointer to FRO192M configuration structure. Refer to @ref anactrl_fro192M_config_t structure.
183  */
184 void ANACTRL_GetDefaultFro192MConfig(anactrl_fro192M_config_t *config);
185 
186 /*!
187  * @brief Configs the 32 MHz Crystal oscillator(High-speed crystal oscillator), such as enable/disable output to CPU
188  * system, and so on.
189  *
190  * @param base ANACTRL peripheral base address.
191  * @param config Pointer to XO32M configuration structure. Refer to @ref anactrl_xo32M_config_t structure.
192  */
193 void ANACTRL_SetXo32M(ANACTRL_Type *base, const anactrl_xo32M_config_t *config);
194 
195 /*!
196  * @brief Gets the default configuration of XO32M.
197  * The default values are:
198  * @code
199     config->enableSysCLkOutput = false;
200     config->enableACBufferBypass = false;
201     @endcode
202  * @param config Pointer to XO32M configuration structure. Refer to @ref anactrl_xo32M_config_t structure.
203  */
204 void ANACTRL_GetDefaultXo32MConfig(anactrl_xo32M_config_t *config);
205 
206 /* @} */
207 
208 #if !(defined(FSL_FEATURE_ANACTRL_HAS_NO_FREQ_ME_CTRL) && FSL_FEATURE_ANACTRL_HAS_NO_FREQ_ME_CTRL)
209 /*!
210  * @name Measure Frequency
211  * @{
212  */
213 
214 /*!
215  * @brief Measures the frequency of the target clock source.
216  *
217  * This function measures target frequency according to a accurate reference frequency.The formula is:
218  * Ftarget = (CAPVAL * Freference) / ((1<<SCALE)-1)
219  *
220  * @note Both tartget and reference clocks are selectable by programming the target clock select FREQMEAS_TARGET
221  * register in INPUTMUX and reference clock select FREQMEAS_REF register in INPUTMUX.
222  *
223  * @param base ANACTRL peripheral base address.
224  * @param scale Define the power of 2 count that ref counter counts to during measurement, ranges from 2 to 31.
225  * @param refClkFreq frequency of the reference clock.
226  *
227  * @return frequency of the target clock.
228  */
229 uint32_t ANACTRL_MeasureFrequency(ANACTRL_Type *base, uint8_t scale, uint32_t refClkFreq);
230 /* @} */
231 #endif /* FSL_FEATURE_ANACTRL_HAS_NO_FREQ_ME_CTRL */
232 
233 /*!
234  * @name Interrupt Interface
235  * @{
236  */
237 
238 /*!
239  * @brief Enables the ANACTRL interrupts.
240  *
241  * @param base ANACTRL peripheral base address.
242  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
243  */
ANACTRL_EnableInterrupts(ANACTRL_Type * base,uint32_t mask)244 static inline void ANACTRL_EnableInterrupts(ANACTRL_Type *base, uint32_t mask)
245 {
246     base->BOD_DCDC_INT_CTRL |= (0x15U & mask);
247 }
248 
249 /*!
250  * @brief Disables the ANACTRL interrupts.
251  *
252  * @param base ANACTRL peripheral base address.
253  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
254  */
ANACTRL_DisableInterrupts(ANACTRL_Type * base,uint32_t mask)255 static inline void ANACTRL_DisableInterrupts(ANACTRL_Type *base, uint32_t mask)
256 {
257     base->BOD_DCDC_INT_CTRL &= ~(0x15U & mask);
258 }
259 
260 /*!
261  * @brief Clears the ANACTRL interrupts.
262  *
263  * @param base ANACTRL peripheral base address.
264  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
265  */
ANACTRL_ClearInterrupts(ANACTRL_Type * base,uint32_t mask)266 static inline void ANACTRL_ClearInterrupts(ANACTRL_Type *base, uint32_t mask)
267 {
268     base->BOD_DCDC_INT_CTRL |= (uint32_t)(mask << 1UL);
269 }
270 /* @} */
271 
272 /*!
273  * @name Status Interface
274  * @{
275  */
276 
277 /*!
278  * @brief Gets ANACTRL status flags.
279  *
280  * This function gets Analog control status flags. The flags are returned as the logical
281  * OR value of the enumerators @ref _anactrl_flags. To check for a specific status,
282  * compare the return value with enumerators in the @ref _anactrl_flags.
283  * For example, to check whether the flash is in power down mode:
284  * @code
285  *     if (kANACTRL_FlashPowerDownFlag & ANACTRL_ANACTRL_GetStatusFlags(ANACTRL))
286  *     {
287  *         ...
288  *     }
289  * @endcode
290  *
291  * @param base ANACTRL peripheral base address.
292  * @return ANACTRL status flags which are given in the enumerators in the @ref _anactrl_flags.
293  */
ANACTRL_GetStatusFlags(ANACTRL_Type * base)294 static inline uint32_t ANACTRL_GetStatusFlags(ANACTRL_Type *base)
295 {
296     return base->ANALOG_CTRL_STATUS;
297 }
298 
299 /*!
300  * @brief Gets ANACTRL oscillators status flags.
301  *
302  * This function gets Anactrl oscillators status flags. The flags are returned as the logical
303  * OR value of the enumerators @ref _anactrl_osc_flags. To check for a specific status,
304  * compare the return value with enumerators in the @ref _anactrl_osc_flags.
305  * For example, to check whether the FRO192M clock output is valid:
306  * @code
307  *     if (kANACTRL_OutputClkValidFlag & ANACTRL_ANACTRL_GetOscStatusFlags(ANACTRL))
308  *     {
309  *         ...
310  *     }
311  * @endcode
312  *
313  * @param base ANACTRL peripheral base address.
314  * @return ANACTRL oscillators status flags which are given in the enumerators in the @ref _anactrl_osc_flags.
315  */
ANACTRL_GetOscStatusFlags(ANACTRL_Type * base)316 static inline uint32_t ANACTRL_GetOscStatusFlags(ANACTRL_Type *base)
317 {
318     return (base->FRO192M_STATUS & 0xFFU) | ((base->XO32M_STATUS & 0xFFU) << 16U);
319 }
320 
321 /*!
322  * @brief Gets ANACTRL interrupt status flags.
323  *
324  * This function gets Anactrl interrupt status flags. The flags are returned as the logical
325  * OR value of the enumerators @ref _anactrl_interrupt_flags. To check for a specific status,
326  * compare the return value with enumerators in the @ref _anactrl_interrupt_flags.
327  * For example, to check whether the VBAT voltage level is above the threshold:
328  * @code
329  *     if (kANACTRL_BodVbatPowerFlag & ANACTRL_ANACTRL_GetInterruptStatusFlags(ANACTRL))
330  *     {
331  *         ...
332  *     }
333  * @endcode
334  *
335  * @param base ANACTRL peripheral base address.
336  * @return ANACTRL oscillators status flags which are given in the enumerators in the @ref _anactrl_osc_flags.
337  */
ANACTRL_GetInterruptStatusFlags(ANACTRL_Type * base)338 static inline uint32_t ANACTRL_GetInterruptStatusFlags(ANACTRL_Type *base)
339 {
340     return base->BOD_DCDC_INT_STATUS & 0x1FFU;
341 }
342 /* @} */
343 
344 #if (defined(FSL_FEATURE_ANACTRL_HAS_AUX_BIAS_REG) && (FSL_FEATURE_ANACTRL_HAS_AUX_BIAS_REG == 1U))
345 /*!
346  * @brief Aux_Bias Control Interfaces
347  * @{
348  */
349 
350 /*!
351  * @brief Enables/disabless 1V reference voltage buffer.
352  *
353  * @param base ANACTRL peripheral base address.
354  * @param enable Used to enable or disable 1V reference voltage buffer.
355  */
ANACTRL_EnableVref1V(ANACTRL_Type * base,bool enable)356 static inline void ANACTRL_EnableVref1V(ANACTRL_Type *base, bool enable)
357 {
358     if (enable)
359     {
360         base->AUX_BIAS |= ANACTRL_AUX_BIAS_VREF1VENABLE_MASK;
361     }
362     else
363     {
364         base->AUX_BIAS &= ~ANACTRL_AUX_BIAS_VREF1VENABLE_MASK;
365     }
366 }
367 
368 /* @} */
369 #endif /* defined(FSL_FEATURE_ANACTRL_HAS_AUX_BIAS_REG) */
370 
371 #if defined(__cplusplus)
372 }
373 #endif
374 
375 /* @}*/
376 
377 #endif /* __FSL_ANACTRL_H__ */
378